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8d811ca3 NI |
1 | /* |
2 | * Copyright (C) 2012 Nobuhiro Iwamatsu <[email protected]> | |
3 | * Copyright (C) 2012 Renesas Solutions Corp. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License as | |
7 | * published by the Free Software Foundation; either version 2 of | |
8 | * the License, or (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
18 | * MA 02111-1307 USA | |
19 | */ | |
20 | ||
21 | #ifndef __KZM9G_H | |
22 | #define __KZM9G_H | |
23 | ||
24 | #undef DEBUG | |
25 | ||
8d811ca3 NI |
26 | #define CONFIG_RMOBILE |
27 | #define CONFIG_SH73A0 | |
28 | #define CONFIG_KZM_A9_GT | |
29 | #define CONFIG_RMOBILE_BOARD_STRING "KMC KZM-A9-GT" | |
30 | #define CONFIG_MACH_TYPE MACH_TYPE_KZM9G | |
31 | ||
32 | #include <asm/arch/rmobile.h> | |
33 | ||
34 | #define CONFIG_ARCH_CPU_INIT | |
35 | #define CONFIG_DISPLAY_CPUINFO | |
36 | #define CONFIG_DISPLAY_BOARDINFO | |
37 | #define CONFIG_BOARD_EARLY_INIT_F | |
15f2aa79 NI |
38 | #define CONFIG_L2_OFF |
39 | #define CONFIG_OF_LIBFDT | |
8d811ca3 NI |
40 | |
41 | #include <config_cmd_default.h> | |
42 | #define CONFIG_CMDLINE_TAG | |
43 | #define CONFIG_SETUP_MEMORY_TAGS | |
44 | #define CONFIG_INITRD_TAG | |
45 | #define CONFIG_DOS_PARTITION | |
46 | #define CONFIG_CMD_FAT | |
47 | #define CONFIG_CMD_BOOTZ | |
48 | ||
18a65af4 | 49 | #define CONFIG_BAUDRATE 115200 |
8d811ca3 | 50 | #define CONFIG_BOOTARGS "root=/dev/null console=ttySC4,115200" |
8d811ca3 NI |
51 | #define CONFIG_BOOTDELAY 3 |
52 | ||
53 | #define CONFIG_VERSION_VARIABLE | |
54 | #undef CONFIG_SHOW_BOOT_PROGRESS | |
55 | ||
56 | /* MEMORY */ | |
57 | #define KZM_SDRAM_BASE (0x40000000) | |
58 | #define PHYS_SDRAM KZM_SDRAM_BASE | |
59 | #define PHYS_SDRAM_SIZE (512 * 1024 * 1024) | |
60 | #define CONFIG_NR_DRAM_BANKS (1) | |
61 | ||
62 | /* NOR Flash */ | |
63 | #define KZM_FLASH_BASE (0x00000000) | |
64 | #define CONFIG_SYS_FLASH_BASE (KZM_FLASH_BASE) | |
65 | #define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT) | |
66 | #define CONFIG_SYS_MAX_FLASH_BANKS (1) | |
67 | #define CONFIG_SYS_MAX_FLASH_SECT (512) | |
68 | ||
69 | /* prompt */ | |
70 | #define CONFIG_SYS_LONGHELP | |
087a277b | 71 | #define CONFIG_SYS_PROMPT "KZM-A9-GT# " |
8d811ca3 NI |
72 | #define CONFIG_SYS_CBSIZE 256 |
73 | #define CONFIG_SYS_PBSIZE 256 | |
74 | #define CONFIG_SYS_MAXARGS 16 | |
75 | #define CONFIG_SYS_BARGSIZE 512 | |
76 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } | |
77 | ||
78 | /* SCIF */ | |
79 | #define CONFIG_SCIF_CONSOLE | |
80 | #define CONFIG_CONS_SCIF4 | |
81 | #undef CONFIG_SYS_CONSOLE_INFO_QUIET | |
82 | #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE | |
83 | #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE | |
84 | ||
85 | #define CONFIG_SYS_MEMTEST_START (KZM_SDRAM_BASE) | |
86 | #define CONFIG_SYS_MEMTEST_END \ | |
87 | (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) | |
88 | #undef CONFIG_SYS_ALT_MEMTEST | |
89 | #undef CONFIG_SYS_MEMTEST_SCRATCH | |
90 | #undef CONFIG_SYS_LOADS_BAUD_CHANGE | |
91 | ||
92 | #define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */ | |
93 | #define CONFIG_SYS_INIT_RAM_SIZE (0x10000) | |
94 | #define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4) | |
95 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | |
96 | CONFIG_SYS_INIT_RAM_SIZE - \ | |
97 | GENERATED_GBL_DATA_SIZE) | |
9415cf93 TK |
98 | #define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024) |
99 | #define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT) | |
100 | #define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT) | |
8d811ca3 NI |
101 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024) |
102 | ||
103 | #define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE) | |
104 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) | |
105 | #define CONFIG_SYS_GBL_DATA_SIZE (256) | |
106 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) | |
107 | ||
108 | #define CONFIG_SYS_TEXT_BASE 0x00000000 | |
109 | #define CONFIG_STANDALONE_LOAD_ADDR 0x41000000 | |
110 | ||
111 | /* FLASH */ | |
112 | #define CONFIG_FLASH_CFI_DRIVER | |
113 | #define CONFIG_SYS_FLASH_CFI | |
114 | #undef CONFIG_SYS_FLASH_QUIET_TEST | |
115 | #define CONFIG_SYS_FLASH_EMPTY_INFO | |
116 | #define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */ | |
117 | #define CONFIG_ENV_SIZE FLASH_SECTOR_SIZE | |
118 | #define CONFIG_ENV_OFFSET FLASH_SECTOR_SIZE | |
119 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) | |
120 | ||
121 | /* Timeout for Flash erase operations (in ms) */ | |
122 | #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) | |
123 | /* Timeout for Flash write operations (in ms) */ | |
124 | #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) | |
125 | /* Timeout for Flash set sector lock bit operations (in ms) */ | |
126 | #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) | |
127 | /* Timeout for Flash clear lock bit operations (in ms) */ | |
128 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) | |
129 | ||
130 | #undef CONFIG_SYS_FLASH_PROTECTION | |
131 | #undef CONFIG_SYS_DIRECT_FLASH_TFTP | |
132 | #define CONFIG_ENV_IS_IN_FLASH | |
133 | ||
134 | /* GPIO / PFC */ | |
135 | #define CONFIG_SH_GPIO_PFC | |
136 | ||
137 | /* Clock */ | |
eae6c8ab | 138 | #define CONFIG_GLOBAL_TIMER |
8d811ca3 NI |
139 | #define CONFIG_SYS_CLK_FREQ (48000000) |
140 | #define CONFIG_SYS_CPU_CLK (1196000000) | |
141 | #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ | |
142 | #define CFG_HZ (1000) | |
143 | #define CONFIG_SYS_HZ CFG_HZ | |
144 | ||
145 | /* Ether */ | |
146 | #define CONFIG_NET_MULTI | |
147 | #define CONFIG_CMD_PING | |
148 | #define CONFIG_CMD_DHCP | |
149 | #define CONFIG_SMC911X | |
150 | #define CONFIG_SMC911X_BASE (0x10000000) | |
151 | #define CONFIG_SMC911X_32_BIT | |
38263df8 | 152 | #define CONFIG_NFS_TIMEOUT 10000UL |
8d811ca3 NI |
153 | |
154 | /* I2C */ | |
155 | #define CONFIG_CMD_I2C | |
156 | #define CONFIG_SH_I2C 1 | |
b1af67fe | 157 | #define CONFIG_SH_I2C_8BIT |
8d811ca3 NI |
158 | #define CONFIG_HARD_I2C |
159 | #define CONFIG_I2C_MULTI_BUS | |
020ec727 | 160 | #define CONFIG_SYS_MAX_I2C_BUS (5) |
8d811ca3 NI |
161 | #define CONFIG_SYS_I2C_MODULE |
162 | #define CONFIG_SYS_I2C_SPEED (100000) /* 100 kHz */ | |
163 | #define CONFIG_SYS_I2C_SLAVE (0x7F) | |
164 | #define CONFIG_SH_I2C_DATA_HIGH (4) | |
165 | #define CONFIG_SH_I2C_DATA_LOW (5) | |
3ce2703d | 166 | #define CONFIG_SH_I2C_CLOCK (104000000) /* 104 MHz */ |
8d811ca3 NI |
167 | #define CONFIG_SH_I2C_BASE0 (0xE6820000) |
168 | #define CONFIG_SH_I2C_BASE1 (0xE6822000) | |
020ec727 TK |
169 | #define CONFIG_SH_I2C_BASE2 (0xE6824000) |
170 | #define CONFIG_SH_I2C_BASE3 (0xE6826000) | |
171 | #define CONFIG_SH_I2C_BASE4 (0xE6828000) | |
8d811ca3 NI |
172 | |
173 | #endif /* __KZM9G_H */ |