[J-u-boot.git] / include / configs / tx25.h

/*
 * (C) Copyright 2009 DENX Software Engineering
 * Author: John Rigby <[email protected]>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/arch/imx-regs.h>

/*
 * KARO TX25 board - SoC Configuration
 */
#define CONFIG_MX25
#define CONFIG_MX25_CLK32		32000	/* OSC32K frequency */
#define CONFIG_SYS_TIMER_RATE		CONFIG_MX25_CLK32
#define CONFIG_SYS_TIMER_COUNTER	\
	(&((struct gpt_regs *)IMX_GPT1_BASE)->counter)

#define	CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* 256 kB for U-Boot */

#define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
#define CONFIG_SPL_LDSCRIPT		"arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE		2048
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT

#define CONFIG_SPL_TEXT_BASE		0x810c0000
#define CONFIG_SYS_TEXT_BASE		0x81200000

#ifndef MACH_TYPE_TX25
#define MACH_TYPE_TX25	2177
#endif

#define CONFIG_MACH_TYPE MACH_TYPE_TX25

#ifdef CONFIG_SPL_BUILD
/* Start copying real U-boot from the second page */
#define CONFIG_SYS_NAND_U_BOOT_OFFS	CONFIG_SPL_PAD_TO
#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x30000

#define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_NAND_U_BOOT_DST

#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_SIZE		(128 * 1024 * 1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
#else
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif

#define CONFIG_DISPLAY_CPUINFO

#define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

/*
 * Memory Info
 */
/* malloc() len */
#define CONFIG_SYS_MALLOC_LEN		(1 << 20)	/* 1 MiB */
/*
 * Board has 2 32MB banks of DRAM but there is a bug when using
 * both so only the first is configured
 */
#define CONFIG_NR_DRAM_BANKS	1

#define PHYS_SDRAM_1		0x80000000
#define PHYS_SDRAM_1_SIZE	0x02000000
#if (CONFIG_NR_DRAM_BANKS == 2)
#define PHYS_SDRAM_2		0x90000000
#define PHYS_SDRAM_2_SIZE	0x02000000
#endif
/* 8MB DRAM test */
#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_1
#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_1+0x0800000)

/*
 * Serial Info
 */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	UART1_BASE
#define CONFIG_CONS_INDEX	1	/* use UART0 for console */
#define CONFIG_BAUDRATE		115200	/* Default baud rate */

#define CONFIG_MXC_GPIO

/*
 * Flash & Environment
 */
/* No NOR flash present */
#define CONFIG_SYS_NO_FLASH
#define	CONFIG_ENV_IS_IN_NAND
#define	CONFIG_ENV_OFFSET	CONFIG_SYS_MONITOR_LEN
#define CONFIG_ENV_SIZE		(128 * 1024)	/* 128 kB NAND block size */
#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)

/* NAND */
#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE	(0xBB000000)
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		(0xBB000000)
#define CONFIG_JFFS2_NAND
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_SYS_NAND_LARGEPAGE

/* U-Boot general configuration */
#define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size  */
/* Print buffer sz */
#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
		sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS	32	/* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_LONGHELP

/* U-Boot commands */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_CACHE

/*
 * Ethernet
 */
#define CONFIG_FEC_MXC
#define CONFIG_FEC_MXC_PHYADDR		0x1f
#define CONFIG_MII
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_ENV_OVERWRITE

#define CONFIG_BOOTDELAY	5

#define CONFIG_LOADADDR		0x81000000	/* loadaddr env var */
#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth0\0"							\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
	"addip=setenv bootargs ${bootargs} "				\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"addtty=setenv bootargs ${bootargs}"				\
		" console=ttymxc0,${baudrate}\0"			\
	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
	"addmisc=setenv bootargs ${bootargs}\0"				\
	"u-boot=tx25/u-boot.bin\0"					\
	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0"		\
	"hostname=tx25\0"						\
	"bootfile=tx25/uImage\0"					\
	"rootpath=/opt/eldk/arm\0"					\
	"net_nfs=tftp ${kernel_addr_r} ${bootfile};"			\
		"run nfsargs addip addtty addmtd addmisc;"		\
		"bootm\0"						\
	"bootcmd=run net_nfs\0"						\
	"load=tftp ${loadaddr} ${u-boot}\0"				\
	"update=nand erase 0 40000;nand write ${loadaddr} 0 40000\0"	\
	"upd=run load update\0"						\

/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_INIT_SP_ADDR		(IMX_RAM_BASE + IMX_RAM_SIZE)

#endif /* __CONFIG_H */
Commit	Line	Data
6895d451 JR	1	/*
	2	* (C) Copyright 2009 DENX Software Engineering
	3	* Author: John Rigby <[email protected]>
	4	*
3765b3e7	5	* SPDX-License-Identifier: GPL-2.0+
6895d451 JR	6	*/
	7
	8	#ifndef __CONFIG_H
	9	#define __CONFIG_H
	10
da962b71	11	#include <asm/arch/imx-regs.h>
6895d451 JR	12
	13	/*
	14	* KARO TX25 board - SoC Configuration
	15	*/
6895d451	16	#define CONFIG_MX25
6895d451	17	#define CONFIG_MX25_CLK32 32000 /* OSC32K frequency */
3dae5b51 RH	18	#define CONFIG_SYS_TIMER_RATE CONFIG_MX25_CLK32
	19	#define CONFIG_SYS_TIMER_COUNTER \
	20	(&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
6895d451 JR	21
	22	#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
	23
da962b71 BT	24	#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
	25	#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
	26	#define CONFIG_SPL_MAX_SIZE 2048
	27	#define CONFIG_SPL_NAND_SUPPORT
b0dac5b1	28	#define CONFIG_SPL_LIBGENERIC_SUPPORT
da962b71 BT	29
	30	#define CONFIG_SPL_TEXT_BASE 0x810c0000
	31	#define CONFIG_SYS_TEXT_BASE 0x81200000
6895d451	32
0e0a5366 SB	33	#ifndef MACH_TYPE_TX25
	34	#define MACH_TYPE_TX25 2177
	35	#endif
	36
	37	#define CONFIG_MACH_TYPE MACH_TYPE_TX25
	38
da962b71	39	#ifdef CONFIG_SPL_BUILD
6895d451	40	/* Start copying real U-boot from the second page */
da962b71	41	#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
6895d451	42	#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x30000
ab86f72c	43
da962b71	44	#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
ab86f72c	45	#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
6895d451 JR	46
6895d451 JR	47	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
da962b71	48	#define CONFIG_SYS_NAND_OOBSIZE 64
6895d451 JR	49	#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
	50	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	51	#define CONFIG_SYS_NAND_SIZE (128 * 1024 * 1024)
	52	#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
	53	#else
	54	#define CONFIG_SKIP_LOWLEVEL_INIT
6895d451 JR	55	#endif
	56
	57	#define CONFIG_DISPLAY_CPUINFO
	58
043cfcfb FE	59	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	60	#define CONFIG_SETUP_MEMORY_TAGS
	61	#define CONFIG_INITRD_TAG
6895d451 JR	62
	63	/*
	64	* Memory Info
	65	*/
	66	/* malloc() len */
	67	#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
6895d451 JR	68	/*
	69	* Board has 2 32MB banks of DRAM but there is a bug when using
	70	* both so only the first is configured
	71	*/
	72	#define CONFIG_NR_DRAM_BANKS 1
	73
	74	#define PHYS_SDRAM_1 0x80000000
	75	#define PHYS_SDRAM_1_SIZE 0x02000000
	76	#if (CONFIG_NR_DRAM_BANKS == 2)
	77	#define PHYS_SDRAM_2 0x90000000
	78	#define PHYS_SDRAM_2_SIZE 0x02000000
	79	#endif
	80	/* 8MB DRAM test */
	81	#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
	82	#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000)
6895d451 JR	83
	84	/*
	85	* Serial Info
	86	*/
043cfcfb	87	#define CONFIG_MXC_UART
40f6fffe	88	#define CONFIG_MXC_UART_BASE UART1_BASE
6895d451 JR	89	#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
6895d451 JR	90	#define CONFIG_BAUDRATE 115200 /* Default baud rate */
6895d451	91
c2205f4d FE	92	#define CONFIG_MXC_GPIO
c2205f4d FE	93
6895d451 JR	94	/*
	95	* Flash & Environment
	96	*/
	97	/* No NOR flash present */
043cfcfb	98	#define CONFIG_SYS_NO_FLASH
6895d451 JR	99	#define CONFIG_ENV_IS_IN_NAND
	100	#define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN
	101	#define CONFIG_ENV_SIZE (128 * 1024) /* 128 kB NAND block size */
	102	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
	103
	104	/* NAND */
	105	#define CONFIG_NAND_MXC
6895d451 JR	106	#define CONFIG_MXC_NAND_REGS_BASE (0xBB000000)
	107	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	108	#define CONFIG_SYS_NAND_BASE (0xBB000000)
	109	#define CONFIG_JFFS2_NAND
	110	#define CONFIG_MXC_NAND_HWECC
	111	#define CONFIG_SYS_NAND_LARGEPAGE
	112
6895d451	113	/* U-Boot general configuration */
6895d451 JR	114	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
	115	/* Print buffer sz */
	116	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	117	sizeof(CONFIG_SYS_PROMPT) + 16)
	118	#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
	119	/* Boot Argument Buffer Size */
	120	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	121	#define CONFIG_CMDLINE_EDITING
	122	#define CONFIG_SYS_LONGHELP
	123
	124	/* U-Boot commands */
6895d451	125	#define CONFIG_CMD_NAND
c3330e9d	126	#define CONFIG_CMD_CACHE
6895d451 JR	127
	128	/*
	129	* Ethernet
	130	*/
	131	#define CONFIG_FEC_MXC
	132	#define CONFIG_FEC_MXC_PHYADDR 0x1f
	133	#define CONFIG_MII
9660e442	134	#define CONFIG_BOARD_LATE_INIT
6895d451 JR	135	#define CONFIG_ENV_OVERWRITE
	136
	137	#define CONFIG_BOOTDELAY 5
	138
	139	#define CONFIG_LOADADDR 0x81000000 /* loadaddr env var */
	140	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	141
6895d451 JR	142	#define CONFIG_EXTRA_ENV_SETTINGS \
	143	"netdev=eth0\0" \
	144	"nfsargs=setenv bootargs root=/dev/nfs rw " \
	145	"nfsroot=${serverip}:${rootpath}\0" \
	146	"ramargs=setenv bootargs root=/dev/ram rw\0" \
	147	"addip=setenv bootargs ${bootargs} " \
	148	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	149	":${hostname}:${netdev}:off panic=1\0" \
	150	"addtty=setenv bootargs ${bootargs}" \
	151	" console=ttymxc0,${baudrate}\0" \
	152	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
	153	"addmisc=setenv bootargs ${bootargs}\0" \
	154	"u-boot=tx25/u-boot.bin\0" \
93ea89f0	155	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
6895d451 JR	156	"hostname=tx25\0" \
	157	"bootfile=tx25/uImage\0" \
	158	"rootpath=/opt/eldk/arm\0" \
	159	"net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
	160	"run nfsargs addip addtty addmtd addmisc;" \
	161	"bootm\0" \
	162	"bootcmd=run net_nfs\0" \
	163	"load=tftp ${loadaddr} ${u-boot}\0" \
	164	"update=nand erase 0 40000;nand write ${loadaddr} 0 40000\0" \
	165	"upd=run load update\0" \
	166
a784c01a	167	/* additions for new relocation code, must be added to all boards */
ab86f72c	168	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
da962b71	169	#define CONFIG_SYS_INIT_SP_ADDR (IMX_RAM_BASE + IMX_RAM_SIZE)
ab86f72c	170
6895d451	171	#endif /* __CONFIG_H */