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Commit | Line | Data |
---|---|---|
4e805c19 | 1 | CONFIG_ARM=y |
4e805c19 | 2 | CONFIG_ARCH_IMX8M=y |
98463903 | 3 | CONFIG_TEXT_BASE=0x40200000 |
9802154a | 4 | CONFIG_SYS_MALLOC_LEN=0x2000000 |
83061dbd | 5 | CONFIG_SPL_GPIO=y |
4e805c19 PF |
6 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
7 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
4e805c19 PF |
8 | CONFIG_ENV_SIZE=0x1000 |
9 | CONFIG_ENV_OFFSET=0x400000 | |
4e805c19 | 10 | CONFIG_DM_GPIO=y |
73d57e0a | 11 | CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-evk" |
4e805c19 PF |
12 | CONFIG_SPL_TEXT_BASE=0x912000 |
13 | CONFIG_TARGET_IMX8MN_EVK=y | |
c90e1893 | 14 | CONFIG_SYS_MONITOR_LEN=524288 |
6e3cef06 | 15 | CONFIG_SPL_MMC=y |
2a736066 | 16 | CONFIG_SPL_SERIAL=y |
9ca00684 | 17 | CONFIG_SPL_DRIVERS_MISC=y |
fcb5117d | 18 | CONFIG_SPL_STACK=0x980000 |
18e791c4 TR |
19 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
20 | CONFIG_SPL_BSS_START_ADDR=0x950000 | |
21 | CONFIG_SPL_BSS_MAX_SIZE=0x2000 | |
4e805c19 PF |
22 | CONFIG_SPL=y |
23 | CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 | |
d173b107 | 24 | CONFIG_SYS_LOAD_ADDR=0x42000000 |
4e805c19 PF |
25 | CONFIG_FIT=y |
26 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | |
27 | CONFIG_SPL_LOAD_FIT=y | |
42fb448a | 28 | CONFIG_SYS_BOOTM_LEN=0x2000000 |
c358af81 | 29 | CONFIG_DISTRO_DEFAULTS=y |
ec6f06bd | 30 | CONFIG_OF_SYSTEM_SETUP=y |
4e805c19 | 31 | CONFIG_DEFAULT_FDT_FILE="imx8mn-evk.dtb" |
42fb448a TR |
32 | CONFIG_SYS_CBSIZE=2048 |
33 | CONFIG_SYS_PBSIZE=2074 | |
79b0f08d | 34 | CONFIG_ARCH_MISC_INIT=y |
4e805c19 | 35 | CONFIG_BOARD_LATE_INIT=y |
ca8a329a | 36 | CONFIG_SPL_MAX_SIZE=0x25000 |
4e805c19 PF |
37 | CONFIG_SPL_BOARD_INIT=y |
38 | CONFIG_SPL_BOOTROM_SUPPORT=y | |
6e3cef06 | 39 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
6665ab17 | 40 | CONFIG_SPL_LEGACY_IMAGE_FORMAT=y |
6e3cef06 | 41 | CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y |
f113d7d3 | 42 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
82e26e0d SG |
43 | CONFIG_SPL_SYS_MALLOC=y |
44 | CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y | |
45 | CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000 | |
46 | CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 | |
2a00d73d | 47 | CONFIG_SPL_SYS_MMCSD_RAW_MODE=y |
f76750d1 TR |
48 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y |
49 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 | |
975e7cf3 | 50 | CONFIG_SPL_I2C=y |
933b2f09 | 51 | CONFIG_SPL_POWER=y |
078111b9 | 52 | CONFIG_SPL_WATCHDOG=y |
ba6d575e | 53 | CONFIG_SYS_PROMPT="u-boot=> " |
08f512cf | 54 | CONFIG_CMD_CPU=y |
4e805c19 PF |
55 | # CONFIG_CMD_EXPORTENV is not set |
56 | # CONFIG_CMD_IMPORTENV is not set | |
57 | CONFIG_CMD_ERASEENV=y | |
58 | # CONFIG_CMD_CRC32 is not set | |
59 | CONFIG_CMD_CLK=y | |
60 | CONFIG_CMD_FUSE=y | |
61 | CONFIG_CMD_GPIO=y | |
62 | CONFIG_CMD_I2C=y | |
63 | CONFIG_CMD_MMC=y | |
64 | CONFIG_CMD_CACHE=y | |
65 | CONFIG_CMD_REGULATOR=y | |
4e805c19 | 66 | CONFIG_CMD_EXT4_WRITE=y |
4e805c19 PF |
67 | CONFIG_OF_CONTROL=y |
68 | CONFIG_SPL_OF_CONTROL=y | |
69 | CONFIG_ENV_OVERWRITE=y | |
70 | CONFIG_ENV_IS_IN_MMC=y | |
71 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | |
72 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | |
73 | CONFIG_SPL_DM=y | |
4e805c19 PF |
74 | CONFIG_SPL_CLK_IMX8MN=y |
75 | CONFIG_CLK_IMX8MN=y | |
08f512cf TR |
76 | CONFIG_CPU=y |
77 | CONFIG_CPU_IMX=y | |
4e805c19 PF |
78 | CONFIG_MXC_GPIO=y |
79 | CONFIG_DM_I2C=y | |
4e805c19 PF |
80 | CONFIG_SUPPORT_EMMC_BOOT=y |
81 | CONFIG_MMC_IO_VOLTAGE=y | |
6e3cef06 | 82 | CONFIG_SPL_MMC_IO_VOLTAGE=y |
4e805c19 | 83 | CONFIG_MMC_UHS_SUPPORT=y |
6e3cef06 | 84 | CONFIG_SPL_MMC_UHS_SUPPORT=y |
4e805c19 PF |
85 | CONFIG_MMC_HS400_ES_SUPPORT=y |
86 | CONFIG_MMC_HS400_SUPPORT=y | |
6e3cef06 | 87 | CONFIG_SPL_MMC_HS400_SUPPORT=y |
1ed68f92 | 88 | CONFIG_FSL_USDHC=y |
4e805c19 | 89 | CONFIG_PHYLIB=y |
827ded0e | 90 | CONFIG_PHY_ATHEROS=y |
827ded0e FE |
91 | CONFIG_DM_ETH_PHY=y |
92 | CONFIG_PHY_GIGE=y | |
93 | CONFIG_FEC_MXC=y | |
94 | CONFIG_MII=y | |
4e805c19 PF |
95 | CONFIG_PINCTRL=y |
96 | CONFIG_SPL_PINCTRL=y | |
97 | CONFIG_PINCTRL_IMX8M=y | |
98 | CONFIG_DM_PMIC=y | |
99 | CONFIG_SPL_DM_PMIC_PCA9450=y | |
100 | CONFIG_DM_REGULATOR=y | |
6e3cef06 | 101 | CONFIG_SPL_DM_REGULATOR=y |
4e805c19 PF |
102 | CONFIG_DM_REGULATOR_FIXED=y |
103 | CONFIG_DM_REGULATOR_GPIO=y | |
ff1c7961 | 104 | CONFIG_DM_SERIAL=y |
4e805c19 PF |
105 | CONFIG_MXC_UART=y |
106 | CONFIG_SYSRESET=y | |
107 | CONFIG_SPL_SYSRESET=y | |
108 | CONFIG_SYSRESET_PSCI=y | |
109 | CONFIG_SYSRESET_WATCHDOG=y | |
110 | CONFIG_DM_THERMAL=y | |
111 | CONFIG_IMX_WATCHDOG=y |