[J-u-boot.git] / include / configs / flea3.h

/*
 * (C) Copyright 2011, Stefano Babic <[email protected]>
 *
 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
 *
 * Copyright (C) 2007, Guennadi Liakhovetski <[email protected]>
 *
 * Configuration for the flea3 board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/arch/imx-regs.h>

 /* High Level Configuration Options */
#define CONFIG_MX35

#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_SYS_CACHELINE_SIZE	32

#define CONFIG_DISPLAY_CPUINFO

/* Only in case the value is not present in mach-types.h */
#ifndef MACH_TYPE_FLEA3
#define MACH_TYPE_FLEA3                3668
#endif

#define CONFIG_MACH_TYPE		MACH_TYPE_FLEA3

/* Set TEXT at the beginning of the NOR flash */
#define CONFIG_SYS_TEXT_BASE	0xA0000000

/* This is required to setup the ESDC controller */
#define CONFIG_BOARD_EARLY_INIT_F

#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)

/*
 * Hardware drivers
 */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_SPD_BUS_NUM		2 /* I2C3 */
#define CONFIG_SYS_MXC_I2C3_SLAVE	0xfe
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO

/*
 * UART (console)
 */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	UART3_BASE

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	1
#define CONFIG_BAUDRATE		115200

/*
 * Command definition
 */
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_DNS

#define CONFIG_CMD_NAND
#define CONFIG_CMD_CACHE

#define CONFIG_CMD_I2C
#define CONFIG_CMD_SPI
#define CONFIG_CMD_MII
#define CONFIG_NET_RETRY_COUNT	100

#define CONFIG_BOOTDELAY	3

#define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */


/*
 * Ethernet on SOC (FEC)
 */
#define CONFIG_FEC_MXC
#define IMX_FEC_BASE	FEC_BASE_ADDR
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_FEC_MXC_PHYADDR	0x1

#define CONFIG_MII

#define CONFIG_ARP_TIMEOUT	200UL

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP	/* undef to save memory */
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_HUSH_PARSER	/* Use the HUSH parser */

#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */

#define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x10000

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

/*
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1
#define PHYS_SDRAM_1		CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)

#define CONFIG_SYS_SDRAM_BASE		CSD0_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR + 0x10000)
#define CONFIG_SYS_INIT_RAM_SIZE		(IRAM_SIZE / 2)
#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
					GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					CONFIG_SYS_GBL_DATA_OFFSET)

/*
 * MTD Command for mtdparts
 */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
#define CONFIG_FLASH_CFI_MTD
#define CONFIG_MTD_PARTITIONS
#define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
#define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:50m(root1)," \
				"32m(rootfb)," \
				"64m(pcache)," \
				"64m(app1)," \
				"10m(app2),-(spool);" \
				"physmap-flash.0:512k(u-boot),64k(env1)," \
				"64k(env2),3776k(kernel1),3776k(kernel2)"

/*
 * FLASH and environment organization
 */
#define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
#define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
/* Monitor at beginning of flash */
#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)

#define CONFIG_ENV_SECT_SIZE	(64 * 1024)
#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE

/* Address and size of Redundant Environment Sector	*/
#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE

#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
				CONFIG_SYS_MONITOR_LEN)

#define CONFIG_ENV_IS_IN_FLASH

/*
 * CFI FLASH driver setup
 */
#define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
#define CONFIG_FLASH_CFI_DRIVER

/* A non-standard buffered write algorithm */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* faster */
#define CONFIG_SYS_FLASH_PROTECTION	/* Use hardware sector protection */

/*
 * NAND FLASH driver setup
 */
#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_SYS_NAND_LARGEPAGE

/*
 * Default environment and default scripts
 * to update uboot and load kernel
 */

#define CONFIG_HOSTNAME flea3
#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth0\0"							\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
	"addip_sta=setenv bootargs ${bootargs} "			\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
		"else run addip_sta;fi\0"				\
	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
	"addtty=setenv bootargs ${bootargs}"				\
		" console=ttymxc2,${baudrate}\0"			\
	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
	"loadaddr=80800000\0"						\
	"kernel_addr_r=80800000\0"					\
	"hostname=" __stringify(CONFIG_HOSTNAME) "\0"			\
	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"		\
	"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0"	\
	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr}\0"				\
	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
		"run nfsargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr_r}\0"				\
	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
	"net_self=if run net_self_load;then "				\
		"run ramargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr_r} ${ramdisk_addr_r};"		\
		"else echo Images not loades;fi\0"			\
	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"		\
	"load=tftp ${loadaddr} ${u-boot}\0"				\
	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"		\
	"update=protect off ${uboot_addr} +40000;"			\
		"erase ${uboot_addr} +40000;"				\
		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
	"upd=if run load;then echo Updating u-boot;if run update;"	\
		"then echo U-Boot updated;"				\
			"else echo Error updating u-boot !;"		\
			"echo Board without bootloader !!;"		\
		"fi;"							\
		"else echo U-Boot not downloaded..exiting;fi\0"		\
	"bootcmd=run net_nfs\0"

/* Enable FIT images support */
#define CONFIG_CMD_FDT

#endif				/* __CONFIG_H */
Commit	Line	Data
deb53483 SB	1	/*
	2	* (C) Copyright 2011, Stefano Babic <[email protected]>
	3	*
	4	* (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
	5	*
	6	* Copyright (C) 2007, Guennadi Liakhovetski <[email protected]>
	7	*
	8	* Configuration for the flea3 board.
	9	*
3765b3e7	10	* SPDX-License-Identifier: GPL-2.0+
deb53483 SB	11	*/
	12
	13	#ifndef __CONFIG_H
	14	#define __CONFIG_H
	15
	16	#include <asm/arch/imx-regs.h>
	17
	18	/* High Level Configuration Options */
deb53483	19	#define CONFIG_MX35
deb53483 SB	20
deb53483 SB	21	#define CONFIG_SYS_DCACHE_OFF
81b1c9eb	22	#define CONFIG_SYS_CACHELINE_SIZE 32
deb53483 SB	23
	24	#define CONFIG_DISPLAY_CPUINFO
	25
	26	/* Only in case the value is not present in mach-types.h */
	27	#ifndef MACH_TYPE_FLEA3
	28	#define MACH_TYPE_FLEA3 3668
	29	#endif
	30
	31	#define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
	32
	33	/* Set TEXT at the beginning of the NOR flash */
	34	#define CONFIG_SYS_TEXT_BASE 0xA0000000
	35
deb53483 SB	36	/* This is required to setup the ESDC controller */
	37	#define CONFIG_BOARD_EARLY_INIT_F
	38
	39	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	40	#define CONFIG_REVISION_TAG
	41	#define CONFIG_SETUP_MEMORY_TAGS
	42	#define CONFIG_INITRD_TAG
	43
	44	/*
	45	* Size of malloc() pool
	46	*/
	47	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
	48
	49	/*
	50	* Hardware drivers
	51	*/
b089d039	52	#define CONFIG_SYS_I2C
b089d039	53	#define CONFIG_SYS_I2C_MXC
03544c66 AA	54	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	55	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e	56	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
b089d039	57	#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
b089d039	58	#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
deb53483 SB	59	#define CONFIG_MXC_SPI
	60	#define CONFIG_MXC_GPIO
	61
	62	/*
	63	* UART (console)
	64	*/
	65	#define CONFIG_MXC_UART
40f6fffe	66	#define CONFIG_MXC_UART_BASE UART3_BASE
deb53483 SB	67
	68	/* allow to overwrite serial and ethaddr */
	69	#define CONFIG_ENV_OVERWRITE
	70	#define CONFIG_CONS_INDEX 1
	71	#define CONFIG_BAUDRATE 115200
deb53483 SB	72
	73	/*
	74	* Command definition
	75	*/
deb53483 SB	76	#define CONFIG_CMD_PING
	77	#define CONFIG_CMD_DHCP
	78	#define CONFIG_BOOTP_SUBNETMASK
	79	#define CONFIG_BOOTP_GATEWAY
	80	#define CONFIG_BOOTP_DNS
	81
	82	#define CONFIG_CMD_NAND
81b1c9eb	83	#define CONFIG_CMD_CACHE
deb53483 SB	84
	85	#define CONFIG_CMD_I2C
	86	#define CONFIG_CMD_SPI
	87	#define CONFIG_CMD_MII
deb53483 SB	88	#define CONFIG_NET_RETRY_COUNT 100
	89
	90	#define CONFIG_BOOTDELAY 3
	91
fda241d5	92	#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
deb53483 SB	93
	94
	95	/*
	96	* Ethernet on SOC (FEC)
	97	*/
deb53483 SB	98	#define CONFIG_FEC_MXC
	99	#define IMX_FEC_BASE FEC_BASE_ADDR
	100	#define CONFIG_PHYLIB
	101	#define CONFIG_PHY_MICREL
	102	#define CONFIG_FEC_MXC_PHYADDR 0x1
	103
	104	#define CONFIG_MII
deb53483 SB	105
	106	#define CONFIG_ARP_TIMEOUT 200UL
	107
	108	/*
	109	* Miscellaneous configurable options
	110	*/
	111	#define CONFIG_SYS_LONGHELP /* undef to save memory */
deb53483 SB	112	#define CONFIG_CMDLINE_EDITING
deb53483 SB	113	#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
deb53483 SB	114
	115	#define CONFIG_AUTO_COMPLETE
	116	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	117	/* Print Buffer Size */
	118	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	119	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	120	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
	121
	122	#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
	123	#define CONFIG_SYS_MEMTEST_END 0x10000
	124
deb53483 SB	125	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
deb53483 SB	126
deb53483 SB	127	/*
	128	* Physical Memory Map
	129	*/
	130	#define CONFIG_NR_DRAM_BANKS 1
fda241d5	131	#define PHYS_SDRAM_1 CSD0_BASE_ADDR
deb53483 SB	132	#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
deb53483 SB	133
fda241d5	134	#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
deb53483 SB	135	#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
	136	#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
	137	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
	138	GENERATED_GBL_DATA_SIZE)
	139	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	140	CONFIG_SYS_GBL_DATA_OFFSET)
	141
	142	/*
	143	* MTD Command for mtdparts
	144	*/
	145	#define CONFIG_CMD_MTDPARTS
	146	#define CONFIG_MTD_DEVICE
	147	#define CONFIG_FLASH_CFI_MTD
	148	#define CONFIG_MTD_PARTITIONS
	149	#define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
fda241d5 SB	150	#define MTDPARTS_DEFAULT "mtdparts=mxc_nand:50m(root1)," \
	151	"32m(rootfb)," \
	152	"64m(pcache)," \
	153	"64m(app1)," \
	154	"10m(app2),-(spool);" \
deb53483 SB	155	"physmap-flash.0:512k(u-boot),64k(env1)," \
deb53483 SB	156	"64k(env2),3776k(kernel1),3776k(kernel2)"
fda241d5	157
deb53483 SB	158	/*
	159	* FLASH and environment organization
	160	*/
	161	#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
	162	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
	163	#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
	164	/* Monitor at beginning of flash */
	165	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	166	#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
	167
	168	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
	169	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
	170
	171	/* Address and size of Redundant Environment Sector */
	172	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
	173	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
	174
	175	#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
	176	CONFIG_SYS_MONITOR_LEN)
	177
	178	#define CONFIG_ENV_IS_IN_FLASH
	179
	180	/*
	181	* CFI FLASH driver setup
	182	*/
	183	#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
	184	#define CONFIG_FLASH_CFI_DRIVER
	185
	186	/* A non-standard buffered write algorithm */
	187	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
	188	#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
	189
	190	/*
	191	* NAND FLASH driver setup
	192	*/
	193	#define CONFIG_NAND_MXC
deb53483 SB	194	#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
	195	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	196	#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
	197	#define CONFIG_MXC_NAND_HWECC
	198	#define CONFIG_SYS_NAND_LARGEPAGE
	199
	200	/*
	201	* Default environment and default scripts
	202	* to update uboot and load kernel
	203	*/
deb53483 SB	204
	205	#define CONFIG_HOSTNAME flea3
	206	#define CONFIG_EXTRA_ENV_SETTINGS \
	207	"netdev=eth0\0" \
	208	"nfsargs=setenv bootargs root=/dev/nfs rw " \
	209	"nfsroot=${serverip}:${rootpath}\0" \
	210	"ramargs=setenv bootargs root=/dev/ram rw\0" \
	211	"addip_sta=setenv bootargs ${bootargs} " \
	212	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	213	":${hostname}:${netdev}:off panic=1\0" \
	214	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
	215	"addip=if test -n ${ipdyn};then run addip_dyn;" \
93ea89f0	216	"else run addip_sta;fi\0" \
deb53483 SB	217	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
deb53483 SB	218	"addtty=setenv bootargs ${bootargs}" \
fda241d5	219	" console=ttymxc2,${baudrate}\0" \
deb53483	220	"addmisc=setenv bootargs ${bootargs} ${misc}\0" \
fda241d5 SB	221	"loadaddr=80800000\0" \
fda241d5 SB	222	"kernel_addr_r=80800000\0" \
93ea89f0 MV	223	"hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
	224	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
	225	"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \
deb53483 SB	226	"flash_self=run ramargs addip addtty addmtd addmisc;" \
	227	"bootm ${kernel_addr} ${ramdisk_addr}\0" \
	228	"flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
	229	"bootm ${kernel_addr}\0" \
	230	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
	231	"run nfsargs addip addtty addmtd addmisc;" \
	232	"bootm ${kernel_addr_r}\0" \
	233	"net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
	234	"tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
	235	"net_self=if run net_self_load;then " \
	236	"run ramargs addip addtty addmtd addmisc;" \
	237	"bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
	238	"else echo Images not loades;fi\0" \
93ea89f0	239	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
deb53483	240	"load=tftp ${loadaddr} ${u-boot}\0" \
93ea89f0	241	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
deb53483 SB	242	"update=protect off ${uboot_addr} +40000;" \
	243	"erase ${uboot_addr} +40000;" \
	244	"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
	245	"upd=if run load;then echo Updating u-boot;if run update;" \
	246	"then echo U-Boot updated;" \
	247	"else echo Error updating u-boot !;" \
	248	"echo Board without bootloader !!;" \
	249	"fi;" \
	250	"else echo U-Boot not downloaded..exiting;fi\0" \
	251	"bootcmd=run net_nfs\0"
	252
6f8fae8b HS	253	/* Enable FIT images support */
6f8fae8b HS	254	#define CONFIG_CMD_FDT
6f8fae8b	255
deb53483	256	#endif /* __CONFIG_H */