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Commit | Line | Data |
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16c8d5e7 WD |
1 | /* |
2 | * Copyright (C) 2006 by Bryan O'Donoghue, CodeHermit | |
386eda02 | 3 | * [email protected] |
16c8d5e7 WD |
4 | * |
5 | * References | |
7817cb20 MZ |
6 | * DasUBoot/drivers/usb/usbdcore_omap1510.c, for design and implementation |
7 | * ideas. | |
16c8d5e7 WD |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
386eda02 | 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
16c8d5e7 WD |
17 | * GNU General Public License for more details. |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the | |
21 | * Free Software Foundation, Inc., | |
22 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
23 | * | |
24 | */ | |
25 | ||
26 | /* | |
27 | * Notes : | |
386eda02 | 28 | * 1. #define __SIMULATE_ERROR__ to inject a CRC error into every 2nd TX |
16c8d5e7 WD |
29 | * packet to force the USB re-transmit protocol. |
30 | * | |
31 | * 2. #define __DEBUG_UDC__ to switch on debug tracing to serial console | |
386eda02 WD |
32 | * be careful that tracing doesn't create Hiesen-bugs with respect to |
33 | * response timeouts to control requests. | |
16c8d5e7 WD |
34 | * |
35 | * 3. This driver should be able to support any higher level driver that | |
36 | * that wants to do either of the two standard UDC implementations | |
37 | * Control-Bulk-Interrupt or Bulk-IN/Bulk-Out standards. Hence | |
38 | * gserial and cdc_acm should work with this code. | |
39 | * | |
40 | * 4. NAK events never actually get raised at all, the documentation | |
41 | * is just wrong ! | |
42 | * | |
43 | * 5. For some reason, cbd_datlen is *always* +2 the value it should be. | |
44 | * this means that having an RX cbd of 16 bytes is not possible, since | |
386eda02 | 45 | * the same size is reported for 14 bytes received as 16 bytes received |
16c8d5e7 WD |
46 | * until we can find out why this happens, RX cbds must be limited to 8 |
47 | * bytes. TODO: check errata for this behaviour. | |
48 | * | |
49 | * 6. Right now this code doesn't support properly powering up with the USB | |
386eda02 WD |
50 | * cable attached to the USB host my development board the Adder87x doesn't |
51 | * have a pull-up fitted to allow this, so it is necessary to power the | |
52 | * board and *then* attached the USB cable to the host. However somebody | |
53 | * with a different design in their board may be able to keep the cable | |
54 | * constantly connected and simply enable/disable a pull-up re | |
55 | * figure 31.1 in MPC885RM.pdf instead of having to power up the board and | |
56 | * then attach the cable ! | |
16c8d5e7 WD |
57 | * |
58 | */ | |
59 | #include <common.h> | |
60 | #include <config.h> | |
16c8d5e7 | 61 | #include <commproc.h> |
386eda02 | 62 | #include "usbdcore.h" |
16c8d5e7 WD |
63 | #include "usbdcore_mpc8xx.h" |
64 | #include "usbdcore_ep0.h" | |
65 | ||
1218abf1 WD |
66 | DECLARE_GLOBAL_DATA_PTR; |
67 | ||
16c8d5e7 WD |
68 | #define ERR(fmt, args...)\ |
69 | serial_printf("ERROR : [%s] %s:%d: "fmt,\ | |
70 | __FILE__,__FUNCTION__,__LINE__, ##args) | |
71 | #ifdef __DEBUG_UDC__ | |
386eda02 | 72 | #define DBG(fmt,args...)\ |
16c8d5e7 WD |
73 | serial_printf("[%s] %s:%d: "fmt,\ |
74 | __FILE__,__FUNCTION__,__LINE__, ##args) | |
75 | #else | |
386eda02 | 76 | #define DBG(fmt,args...) |
16c8d5e7 WD |
77 | #endif |
78 | ||
79 | /* Static Data */ | |
80 | #ifdef __SIMULATE_ERROR__ | |
386eda02 | 81 | static char err_poison_test = 0; |
16c8d5e7 WD |
82 | #endif |
83 | static struct mpc8xx_ep ep_ref[MAX_ENDPOINTS]; | |
84 | static u32 address_base = STATE_NOT_READY; | |
85 | static mpc8xx_udc_state_t udc_state = 0; | |
86 | static struct usb_device_instance *udc_device = 0; | |
386eda02 WD |
87 | static volatile usb_epb_t *endpoints[MAX_ENDPOINTS]; |
88 | static volatile cbd_t *tx_cbd[TX_RING_SIZE]; | |
89 | static volatile cbd_t *rx_cbd[RX_RING_SIZE]; | |
16c8d5e7 WD |
90 | static volatile immap_t *immr = 0; |
91 | static volatile cpm8xx_t *cp = 0; | |
92 | static volatile usb_pram_t *usb_paramp = 0; | |
93 | static volatile usb_t *usbp = 0; | |
94 | static int rx_ct = 0; | |
95 | static int tx_ct = 0; | |
96 | ||
97 | /* Static Function Declarations */ | |
98 | static void mpc8xx_udc_state_transition_up (usb_device_state_t initial, | |
386eda02 | 99 | usb_device_state_t final); |
16c8d5e7 | 100 | static void mpc8xx_udc_state_transition_down (usb_device_state_t initial, |
386eda02 | 101 | usb_device_state_t final); |
16c8d5e7 | 102 | static void mpc8xx_udc_stall (unsigned int ep); |
386eda02 WD |
103 | static void mpc8xx_udc_flush_tx_fifo (int epid); |
104 | static void mpc8xx_udc_flush_rx_fifo (void); | |
16c8d5e7 | 105 | static void mpc8xx_udc_clear_rxbd (volatile cbd_t * rx_cbdp); |
386eda02 WD |
106 | static void mpc8xx_udc_init_tx (struct usb_endpoint_instance *epi, |
107 | struct urb *tx_urb); | |
108 | static void mpc8xx_udc_dump_request (struct usb_device_request *request); | |
109 | static void mpc8xx_udc_clock_init (volatile immap_t * immr, | |
110 | volatile cpm8xx_t * cp); | |
16c8d5e7 WD |
111 | static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi); |
112 | static int mpc8xx_udc_epn_rx (unsigned int epid, volatile cbd_t * rx_cbdp); | |
386eda02 | 113 | static void mpc8xx_udc_ep0_rx (volatile cbd_t * rx_cbdp); |
16c8d5e7 WD |
114 | static void mpc8xx_udc_cbd_init (void); |
115 | static void mpc8xx_udc_endpoint_init (void); | |
116 | static void mpc8xx_udc_cbd_attach (int ep, uchar tx_size, uchar rx_size); | |
117 | static u32 mpc8xx_udc_alloc (u32 data_size, u32 alignment); | |
118 | static int mpc8xx_udc_ep0_rx_setup (volatile cbd_t * rx_cbdp); | |
119 | static void mpc8xx_udc_set_nak (unsigned int ep); | |
386eda02 WD |
120 | static short mpc8xx_udc_handle_txerr (void); |
121 | static void mpc8xx_udc_advance_rx (volatile cbd_t ** rx_cbdp, int epid); | |
16c8d5e7 WD |
122 | |
123 | /****************************************************************************** | |
386eda02 | 124 | Global Linkage |
16c8d5e7 WD |
125 | *****************************************************************************/ |
126 | ||
127 | /* udc_init | |
128 | * | |
129 | * Do initial bus gluing | |
130 | */ | |
386eda02 | 131 | int udc_init (void) |
16c8d5e7 WD |
132 | { |
133 | /* Init various pointers */ | |
6d0f6bcf | 134 | immr = (immap_t *) CONFIG_SYS_IMMR; |
386eda02 WD |
135 | cp = (cpm8xx_t *) & (immr->im_cpm); |
136 | usb_paramp = (usb_pram_t *) & (cp->cp_dparam[PROFF_USB]); | |
137 | usbp = (usb_t *) & (cp->cp_scc[0]); | |
138 | ||
139 | memset (ep_ref, 0x00, (sizeof (struct mpc8xx_ep) * MAX_ENDPOINTS)); | |
16c8d5e7 | 140 | |
16c8d5e7 WD |
141 | udc_device = 0; |
142 | udc_state = STATE_NOT_READY; | |
386eda02 WD |
143 | |
144 | usbp->usmod = 0x00; | |
145 | usbp->uscom = 0; | |
146 | ||
16c8d5e7 WD |
147 | /* Set USB Frame #0, Respond at Address & Get a clock source */ |
148 | usbp->usaddr = 0x00; | |
149 | mpc8xx_udc_clock_init (immr, cp); | |
386eda02 | 150 | |
16c8d5e7 | 151 | /* PA15, PA14 as perhiperal USBRXD and USBOE */ |
386eda02 WD |
152 | immr->im_ioport.iop_padir &= ~0x0003; |
153 | immr->im_ioport.iop_papar |= 0x0003; | |
154 | ||
16c8d5e7 | 155 | /* PC11/PC10 as peripheral USBRXP USBRXN */ |
386eda02 WD |
156 | immr->im_ioport.iop_pcso |= 0x0030; |
157 | ||
16c8d5e7 | 158 | /* PC7/PC6 as perhiperal USBTXP and USBTXN */ |
386eda02 WD |
159 | immr->im_ioport.iop_pcdir |= 0x0300; |
160 | immr->im_ioport.iop_pcpar |= 0x0300; | |
161 | ||
16c8d5e7 | 162 | /* Set the base address */ |
386eda02 | 163 | address_base = (u32) (cp->cp_dpmem + CPM_USB_BASE); |
16c8d5e7 WD |
164 | |
165 | /* Initialise endpoints and circular buffers */ | |
386eda02 WD |
166 | mpc8xx_udc_endpoint_init (); |
167 | mpc8xx_udc_cbd_init (); | |
168 | ||
16c8d5e7 | 169 | /* Assign allocated Dual Port Endpoint descriptors */ |
386eda02 WD |
170 | usb_paramp->ep0ptr = (u32) endpoints[0]; |
171 | usb_paramp->ep1ptr = (u32) endpoints[1]; | |
172 | usb_paramp->ep2ptr = (u32) endpoints[2]; | |
173 | usb_paramp->ep3ptr = (u32) endpoints[3]; | |
16c8d5e7 WD |
174 | usb_paramp->frame_n = 0; |
175 | ||
386eda02 WD |
176 | DBG ("ep0ptr=0x%08x ep1ptr=0x%08x ep2ptr=0x%08x ep3ptr=0x%08x\n", |
177 | usb_paramp->ep0ptr, usb_paramp->ep1ptr, usb_paramp->ep2ptr, | |
178 | usb_paramp->ep3ptr); | |
179 | ||
16c8d5e7 WD |
180 | return 0; |
181 | } | |
182 | ||
183 | /* udc_irq | |
184 | * | |
185 | * Poll for whatever events may have occured | |
186 | */ | |
386eda02 | 187 | void udc_irq (void) |
16c8d5e7 WD |
188 | { |
189 | int epid = 0; | |
386eda02 WD |
190 | volatile cbd_t *rx_cbdp = 0; |
191 | volatile cbd_t *rx_cbdp_base = 0; | |
16c8d5e7 | 192 | |
386eda02 | 193 | if (udc_state != STATE_READY) { |
16c8d5e7 WD |
194 | return; |
195 | } | |
386eda02 WD |
196 | |
197 | if (usbp->usber & USB_E_BSY) { | |
16c8d5e7 | 198 | /* This shouldn't happen. If it does then it's a bug ! */ |
386eda02 WD |
199 | usbp->usber |= USB_E_BSY; |
200 | mpc8xx_udc_flush_rx_fifo (); | |
16c8d5e7 WD |
201 | } |
202 | ||
16c8d5e7 | 203 | /* Scan all RX/Bidirectional Endpoints for RX data. */ |
386eda02 WD |
204 | for (epid = 0; epid < MAX_ENDPOINTS; epid++) { |
205 | if (!ep_ref[epid].prx) { | |
16c8d5e7 WD |
206 | continue; |
207 | } | |
16c8d5e7 | 208 | rx_cbdp = rx_cbdp_base = ep_ref[epid].prx; |
386eda02 WD |
209 | |
210 | do { | |
211 | if (!(rx_cbdp->cbd_sc & RX_BD_E)) { | |
212 | ||
213 | if (rx_cbdp->cbd_sc & 0x1F) { | |
16c8d5e7 | 214 | /* Corrupt data discard it. |
386eda02 | 215 | * Controller has NAK'd this packet. |
16c8d5e7 | 216 | */ |
386eda02 | 217 | mpc8xx_udc_clear_rxbd (rx_cbdp); |
16c8d5e7 | 218 | |
386eda02 WD |
219 | } else { |
220 | if (!epid) { | |
221 | mpc8xx_udc_ep0_rx (rx_cbdp); | |
16c8d5e7 | 222 | |
386eda02 | 223 | } else { |
16c8d5e7 | 224 | /* Process data */ |
386eda02 WD |
225 | mpc8xx_udc_set_nak (epid); |
226 | mpc8xx_udc_epn_rx (epid, rx_cbdp); | |
227 | mpc8xx_udc_clear_rxbd (rx_cbdp); | |
228 | } | |
16c8d5e7 | 229 | } |
386eda02 | 230 | |
16c8d5e7 | 231 | /* Advance RX CBD pointer */ |
386eda02 | 232 | mpc8xx_udc_advance_rx (&rx_cbdp, epid); |
16c8d5e7 | 233 | ep_ref[epid].prx = rx_cbdp; |
386eda02 | 234 | } else { |
16c8d5e7 | 235 | /* Advance RX CBD pointer */ |
386eda02 | 236 | mpc8xx_udc_advance_rx (&rx_cbdp, epid); |
16c8d5e7 WD |
237 | } |
238 | ||
386eda02 | 239 | } while (rx_cbdp != rx_cbdp_base); |
16c8d5e7 WD |
240 | } |
241 | ||
242 | /* Handle TX events as appropiate, the correct place to do this is | |
243 | * in a tx routine. Perhaps TX on epn was pre-empted by ep0 | |
244 | */ | |
245 | ||
386eda02 WD |
246 | if (usbp->usber & USB_E_TXB) { |
247 | usbp->usber |= USB_E_TXB; | |
16c8d5e7 | 248 | } |
386eda02 WD |
249 | |
250 | if (usbp->usber & (USB_TX_ERRMASK)) { | |
251 | mpc8xx_udc_handle_txerr (); | |
16c8d5e7 WD |
252 | } |
253 | ||
254 | /* Switch to the default state, respond at the default address */ | |
386eda02 WD |
255 | if (usbp->usber & USB_E_RESET) { |
256 | usbp->usber |= USB_E_RESET; | |
257 | usbp->usaddr = 0x00; | |
16c8d5e7 WD |
258 | udc_device->device_state = STATE_DEFAULT; |
259 | } | |
260 | ||
386eda02 WD |
261 | /* if(usbp->usber&USB_E_IDLE){ |
262 | We could suspend here ! | |
263 | usbp->usber|=USB_E_IDLE; | |
264 | DBG("idle state change\n"); | |
265 | } | |
266 | if(usbp->usbs){ | |
267 | We could resume here when IDLE is deasserted ! | |
268 | Not worth doing, so long as we are self powered though. | |
269 | } | |
270 | */ | |
16c8d5e7 WD |
271 | |
272 | return; | |
273 | } | |
274 | ||
16c8d5e7 WD |
275 | /* udc_endpoint_write |
276 | * | |
277 | * Write some data to an endpoint | |
278 | */ | |
386eda02 | 279 | int udc_endpoint_write (struct usb_endpoint_instance *epi) |
16c8d5e7 WD |
280 | { |
281 | int ep = 0; | |
282 | short epid = 1, unnak = 0, ret = 0; | |
283 | ||
386eda02 WD |
284 | if (udc_state != STATE_READY) { |
285 | ERR ("invalid udc_state != STATE_READY!\n"); | |
16c8d5e7 WD |
286 | return -1; |
287 | } | |
288 | ||
386eda02 | 289 | if (!udc_device || !epi) { |
16c8d5e7 WD |
290 | return -1; |
291 | } | |
386eda02 WD |
292 | |
293 | if (udc_device->device_state != STATE_CONFIGURED) { | |
16c8d5e7 WD |
294 | return -1; |
295 | } | |
296 | ||
297 | ep = epi->endpoint_address & 0x03; | |
386eda02 | 298 | if (ep >= MAX_ENDPOINTS) { |
16c8d5e7 WD |
299 | return -1; |
300 | } | |
386eda02 | 301 | |
16c8d5e7 | 302 | /* Set NAK for all RX endpoints during TX */ |
386eda02 | 303 | for (epid = 1; epid < MAX_ENDPOINTS; epid++) { |
16c8d5e7 WD |
304 | |
305 | /* Don't set NAK on DATA IN/CONTROL endpoints */ | |
386eda02 | 306 | if (ep_ref[epid].sc & USB_DIR_IN) { |
16c8d5e7 WD |
307 | continue; |
308 | } | |
309 | ||
386eda02 WD |
310 | if (!(usbp->usep[epid] & (USEP_THS_NAK | USEP_RHS_NAK))) { |
311 | unnak |= 1 << epid; | |
16c8d5e7 WD |
312 | } |
313 | ||
386eda02 | 314 | mpc8xx_udc_set_nak (epid); |
16c8d5e7 WD |
315 | } |
316 | ||
386eda02 WD |
317 | mpc8xx_udc_init_tx (&udc_device->bus->endpoint_array[ep], |
318 | epi->tx_urb); | |
319 | ret = mpc8xx_udc_ep_tx (&udc_device->bus->endpoint_array[ep]); | |
320 | ||
16c8d5e7 | 321 | /* Remove temporary NAK */ |
386eda02 WD |
322 | for (epid = 1; epid < MAX_ENDPOINTS; epid++) { |
323 | if (unnak & (1 << epid)) { | |
324 | udc_unset_nak (epid); | |
16c8d5e7 WD |
325 | } |
326 | } | |
386eda02 | 327 | |
16c8d5e7 WD |
328 | return ret; |
329 | } | |
330 | ||
331 | /* mpc8xx_udc_assign_urb | |
332 | * | |
333 | * Associate a given urb to an endpoint TX or RX transmit/receive buffers | |
334 | */ | |
386eda02 | 335 | static int mpc8xx_udc_assign_urb (int ep, char direction) |
16c8d5e7 WD |
336 | { |
337 | struct usb_endpoint_instance *epi = 0; | |
386eda02 WD |
338 | |
339 | if (ep >= MAX_ENDPOINTS) { | |
16c8d5e7 WD |
340 | goto err; |
341 | } | |
342 | epi = &udc_device->bus->endpoint_array[ep]; | |
386eda02 | 343 | if (!epi) { |
16c8d5e7 WD |
344 | goto err; |
345 | } | |
346 | ||
386eda02 WD |
347 | if (!ep_ref[ep].urb) { |
348 | ep_ref[ep].urb = usbd_alloc_urb (udc_device, udc_device->bus->endpoint_array); | |
349 | if (!ep_ref[ep].urb) { | |
16c8d5e7 WD |
350 | goto err; |
351 | } | |
386eda02 | 352 | } else { |
16c8d5e7 WD |
353 | ep_ref[ep].urb->actual_length = 0; |
354 | } | |
355 | ||
386eda02 WD |
356 | switch (direction) { |
357 | case USB_DIR_IN: | |
358 | epi->tx_urb = ep_ref[ep].urb; | |
359 | break; | |
360 | case USB_DIR_OUT: | |
361 | epi->rcv_urb = ep_ref[ep].urb; | |
362 | break; | |
363 | default: | |
364 | goto err; | |
16c8d5e7 WD |
365 | } |
366 | return 0; | |
367 | ||
386eda02 | 368 | err: |
16c8d5e7 WD |
369 | udc_state = STATE_ERROR; |
370 | return -1; | |
371 | } | |
372 | ||
373 | /* udc_setup_ep | |
374 | * | |
375 | * Associate U-Boot software endpoints to mpc8xx endpoint parameter ram | |
376 | * Isochronous endpoints aren't yet supported! | |
377 | */ | |
386eda02 WD |
378 | void udc_setup_ep (struct usb_device_instance *device, unsigned int ep, |
379 | struct usb_endpoint_instance *epi) | |
16c8d5e7 WD |
380 | { |
381 | uchar direction = 0; | |
382 | int ep_attrib = 0; | |
383 | ||
386eda02 | 384 | if (epi && (ep < MAX_ENDPOINTS)) { |
16c8d5e7 | 385 | |
386eda02 WD |
386 | if (ep == 0) { |
387 | if (epi->rcv_attributes != USB_ENDPOINT_XFER_CONTROL | |
388 | || epi->tx_attributes != | |
389 | USB_ENDPOINT_XFER_CONTROL) { | |
390 | ||
391 | /* ep0 must be a control endpoint */ | |
16c8d5e7 WD |
392 | udc_state = STATE_ERROR; |
393 | return; | |
394 | ||
395 | } | |
386eda02 WD |
396 | if (!(ep_ref[ep].sc & EP_ATTACHED)) { |
397 | mpc8xx_udc_cbd_attach (ep, epi->tx_packetSize, | |
398 | epi->rcv_packetSize); | |
16c8d5e7 WD |
399 | } |
400 | usbp->usep[ep] = 0x0000; | |
401 | return; | |
402 | } | |
386eda02 WD |
403 | |
404 | if ((epi->endpoint_address & USB_ENDPOINT_DIR_MASK) | |
405 | == USB_DIR_IN) { | |
16c8d5e7 WD |
406 | |
407 | direction = 1; | |
408 | ep_attrib = epi->tx_attributes; | |
409 | epi->rcv_packetSize = 0; | |
386eda02 | 410 | ep_ref[ep].sc |= USB_DIR_IN; |
16c8d5e7 | 411 | } else { |
386eda02 | 412 | |
16c8d5e7 WD |
413 | direction = 0; |
414 | ep_attrib = epi->rcv_attributes; | |
386eda02 | 415 | epi->tx_packetSize = 0; |
16c8d5e7 WD |
416 | ep_ref[ep].sc &= ~USB_DIR_IN; |
417 | } | |
418 | ||
386eda02 WD |
419 | if (mpc8xx_udc_assign_urb (ep, epi->endpoint_address |
420 | & USB_ENDPOINT_DIR_MASK)) { | |
16c8d5e7 WD |
421 | return; |
422 | } | |
423 | ||
386eda02 WD |
424 | switch (ep_attrib) { |
425 | case USB_ENDPOINT_XFER_CONTROL: | |
426 | if (!(ep_ref[ep].sc & EP_ATTACHED)) { | |
427 | mpc8xx_udc_cbd_attach (ep, | |
428 | epi->tx_packetSize, | |
429 | epi->rcv_packetSize); | |
430 | } | |
431 | usbp->usep[ep] = ep << 12; | |
432 | epi->rcv_urb = epi->tx_urb = ep_ref[ep].urb; | |
433 | ||
434 | break; | |
435 | case USB_ENDPOINT_XFER_BULK: | |
436 | case USB_ENDPOINT_XFER_INT: | |
437 | if (!(ep_ref[ep].sc & EP_ATTACHED)) { | |
438 | if (direction) { | |
16c8d5e7 | 439 | mpc8xx_udc_cbd_attach (ep, |
386eda02 WD |
440 | epi->tx_packetSize, |
441 | 0); | |
442 | } else { | |
443 | mpc8xx_udc_cbd_attach (ep, | |
444 | 0, | |
445 | epi->rcv_packetSize); | |
16c8d5e7 | 446 | } |
386eda02 WD |
447 | } |
448 | usbp->usep[ep] = (ep << 12) | ((ep_attrib) << 8); | |
16c8d5e7 | 449 | |
386eda02 WD |
450 | break; |
451 | case USB_ENDPOINT_XFER_ISOC: | |
452 | default: | |
453 | serial_printf ("Error endpoint attrib %d>3\n", ep_attrib); | |
454 | udc_state = STATE_ERROR; | |
455 | break; | |
16c8d5e7 WD |
456 | } |
457 | } | |
458 | ||
459 | } | |
460 | ||
461 | /* udc_connect | |
462 | * | |
463 | * Move state, switch on the USB | |
464 | */ | |
386eda02 | 465 | void udc_connect (void) |
16c8d5e7 | 466 | { |
386eda02 | 467 | /* Enable pull-up resistor on D+ |
16c8d5e7 WD |
468 | * TODO: fit a pull-up resistor to drive SE0 for > 2.5us |
469 | */ | |
386eda02 WD |
470 | |
471 | if (udc_state != STATE_ERROR) { | |
16c8d5e7 | 472 | udc_state = STATE_READY; |
386eda02 | 473 | usbp->usmod |= USMOD_EN; |
16c8d5e7 | 474 | } |
386eda02 | 475 | } |
16c8d5e7 WD |
476 | |
477 | /* udc_disconnect | |
478 | * | |
479 | * Disconnect is not used but, is included for completeness | |
480 | */ | |
386eda02 | 481 | void udc_disconnect (void) |
16c8d5e7 WD |
482 | { |
483 | /* Disable pull-up resistor on D- | |
484 | * TODO: fix a pullup resistor to control this | |
485 | */ | |
486 | ||
386eda02 | 487 | if (udc_state != STATE_ERROR) { |
16c8d5e7 WD |
488 | udc_state = STATE_NOT_READY; |
489 | } | |
386eda02 | 490 | usbp->usmod &= ~USMOD_EN; |
16c8d5e7 WD |
491 | } |
492 | ||
493 | /* udc_enable | |
386eda02 | 494 | * |
16c8d5e7 WD |
495 | * Grab an EP0 URB, register interest in a subset of USB events |
496 | */ | |
386eda02 | 497 | void udc_enable (struct usb_device_instance *device) |
16c8d5e7 | 498 | { |
386eda02 | 499 | if (udc_state == STATE_ERROR) { |
16c8d5e7 WD |
500 | return; |
501 | } | |
502 | ||
503 | udc_device = device; | |
386eda02 WD |
504 | |
505 | if (!ep_ref[0].urb) { | |
506 | ep_ref[0].urb = usbd_alloc_urb (device, device->bus->endpoint_array); | |
16c8d5e7 WD |
507 | } |
508 | ||
509 | /* Register interest in all events except SOF, enable transceiver */ | |
386eda02 WD |
510 | usbp->usber = 0x03FF; |
511 | usbp->usbmr = 0x02F7; | |
16c8d5e7 WD |
512 | |
513 | return; | |
514 | } | |
515 | ||
516 | /* udc_disable | |
517 | * | |
518 | * disable the currently hooked device | |
519 | */ | |
386eda02 | 520 | void udc_disable (void) |
16c8d5e7 WD |
521 | { |
522 | int i = 0; | |
523 | ||
386eda02 WD |
524 | if (udc_state == STATE_ERROR) { |
525 | DBG ("Won't disable UDC. udc_state==STATE_ERROR !\n"); | |
16c8d5e7 WD |
526 | return; |
527 | } | |
528 | ||
529 | udc_device = 0; | |
530 | ||
386eda02 WD |
531 | for (; i < MAX_ENDPOINTS; i++) { |
532 | if (ep_ref[i].urb) { | |
533 | usbd_dealloc_urb (ep_ref[i].urb); | |
16c8d5e7 WD |
534 | ep_ref[i].urb = 0; |
535 | } | |
536 | } | |
386eda02 WD |
537 | |
538 | usbp->usbmr = 0x00; | |
539 | usbp->usmod = ~USMOD_EN; | |
16c8d5e7 WD |
540 | udc_state = STATE_NOT_READY; |
541 | } | |
542 | ||
543 | /* udc_startup_events | |
544 | * | |
545 | * Enable the specified device | |
546 | */ | |
386eda02 | 547 | void udc_startup_events (struct usb_device_instance *device) |
16c8d5e7 | 548 | { |
386eda02 WD |
549 | udc_enable (device); |
550 | if (udc_state == STATE_READY) { | |
16c8d5e7 WD |
551 | usbd_device_event_irq (device, DEVICE_CREATE, 0); |
552 | } | |
553 | } | |
554 | ||
555 | /* udc_set_nak | |
386eda02 | 556 | * |
16c8d5e7 WD |
557 | * Allow upper layers to signal lower layers should not accept more RX data |
558 | * | |
559 | */ | |
386eda02 | 560 | void udc_set_nak (int epid) |
16c8d5e7 | 561 | { |
386eda02 WD |
562 | if (epid) { |
563 | mpc8xx_udc_set_nak (epid); | |
16c8d5e7 WD |
564 | } |
565 | } | |
566 | ||
386eda02 WD |
567 | /* udc_unset_nak |
568 | * | |
16c8d5e7 WD |
569 | * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint. |
570 | * Switch off NAKing on this endpoint to accept more data output from host. | |
571 | * | |
572 | */ | |
573 | void udc_unset_nak (int epid) | |
574 | { | |
386eda02 | 575 | if (epid > MAX_ENDPOINTS) { |
16c8d5e7 WD |
576 | return; |
577 | } | |
578 | ||
386eda02 WD |
579 | if (usbp->usep[epid] & (USEP_THS_NAK | USEP_RHS_NAK)) { |
580 | usbp->usep[epid] &= ~(USEP_THS_NAK | USEP_RHS_NAK); | |
16c8d5e7 WD |
581 | __asm__ ("eieio"); |
582 | } | |
583 | } | |
584 | ||
585 | /****************************************************************************** | |
386eda02 | 586 | Static Linkage |
16c8d5e7 WD |
587 | ******************************************************************************/ |
588 | ||
589 | /* udc_state_transition_up | |
590 | * udc_state_transition_down | |
591 | * | |
592 | * Helper functions to implement device state changes. The device states and | |
593 | * the events that transition between them are: | |
594 | * | |
595 | * STATE_ATTACHED | |
596 | * || /\ | |
597 | * \/ || | |
598 | * DEVICE_HUB_CONFIGURED DEVICE_HUB_RESET | |
599 | * || /\ | |
600 | * \/ || | |
601 | * STATE_POWERED | |
602 | * || /\ | |
603 | * \/ || | |
604 | * DEVICE_RESET DEVICE_POWER_INTERRUPTION | |
605 | * || /\ | |
606 | * \/ || | |
607 | * STATE_DEFAULT | |
608 | * || /\ | |
609 | * \/ || | |
610 | * DEVICE_ADDRESS_ASSIGNED DEVICE_RESET | |
611 | * || /\ | |
612 | * \/ || | |
613 | * STATE_ADDRESSED | |
614 | * || /\ | |
615 | * \/ || | |
616 | * DEVICE_CONFIGURED DEVICE_DE_CONFIGURED | |
617 | * || /\ | |
618 | * \/ || | |
619 | * STATE_CONFIGURED | |
620 | * | |
621 | * udc_state_transition_up transitions up (in the direction from STATE_ATTACHED | |
622 | * to STATE_CONFIGURED) from the specified initial state to the specified final | |
623 | * state, passing through each intermediate state on the way. If the initial | |
624 | * state is at or above (i.e. nearer to STATE_CONFIGURED) the final state, then | |
625 | * no state transitions will take place. | |
626 | * | |
627 | * udc_state_transition_down transitions down (in the direction from | |
628 | * STATE_CONFIGURED to STATE_ATTACHED) from the specified initial state to the | |
629 | * specified final state, passing through each intermediate state on the way. | |
630 | * If the initial state is at or below (i.e. nearer to STATE_ATTACHED) the final | |
631 | * state, then no state transitions will take place. | |
632 | * | |
633 | */ | |
386eda02 | 634 | |
16c8d5e7 | 635 | static void mpc8xx_udc_state_transition_up (usb_device_state_t initial, |
386eda02 WD |
636 | usb_device_state_t final) |
637 | { | |
16c8d5e7 WD |
638 | if (initial < final) { |
639 | switch (initial) { | |
640 | case STATE_ATTACHED: | |
641 | usbd_device_event_irq (udc_device, | |
642 | DEVICE_HUB_CONFIGURED, 0); | |
643 | if (final == STATE_POWERED) | |
644 | break; | |
645 | case STATE_POWERED: | |
646 | usbd_device_event_irq (udc_device, DEVICE_RESET, 0); | |
647 | if (final == STATE_DEFAULT) | |
648 | break; | |
649 | case STATE_DEFAULT: | |
650 | usbd_device_event_irq (udc_device, | |
651 | DEVICE_ADDRESS_ASSIGNED, 0); | |
652 | if (final == STATE_ADDRESSED) | |
653 | break; | |
654 | case STATE_ADDRESSED: | |
655 | usbd_device_event_irq (udc_device, DEVICE_CONFIGURED, | |
656 | 0); | |
657 | case STATE_CONFIGURED: | |
658 | break; | |
659 | default: | |
660 | break; | |
661 | } | |
662 | } | |
663 | } | |
664 | ||
665 | static void mpc8xx_udc_state_transition_down (usb_device_state_t initial, | |
386eda02 | 666 | usb_device_state_t final) |
16c8d5e7 WD |
667 | { |
668 | if (initial > final) { | |
669 | switch (initial) { | |
670 | case STATE_CONFIGURED: | |
386eda02 WD |
671 | usbd_device_event_irq (udc_device, |
672 | DEVICE_DE_CONFIGURED, 0); | |
16c8d5e7 WD |
673 | if (final == STATE_ADDRESSED) |
674 | break; | |
675 | case STATE_ADDRESSED: | |
676 | usbd_device_event_irq (udc_device, DEVICE_RESET, 0); | |
677 | if (final == STATE_DEFAULT) | |
678 | break; | |
679 | case STATE_DEFAULT: | |
386eda02 WD |
680 | usbd_device_event_irq (udc_device, |
681 | DEVICE_POWER_INTERRUPTION, 0); | |
16c8d5e7 WD |
682 | if (final == STATE_POWERED) |
683 | break; | |
684 | case STATE_POWERED: | |
685 | usbd_device_event_irq (udc_device, DEVICE_HUB_RESET, | |
386eda02 | 686 | 0); |
16c8d5e7 WD |
687 | case STATE_ATTACHED: |
688 | break; | |
689 | default: | |
690 | break; | |
691 | } | |
692 | } | |
693 | } | |
694 | ||
695 | /* mpc8xx_udc_stall | |
696 | * | |
697 | * Force returning of STALL tokens on the given endpoint. Protocol or function | |
698 | * STALL conditions are permissable here | |
699 | */ | |
700 | static void mpc8xx_udc_stall (unsigned int ep) | |
701 | { | |
702 | usbp->usep[ep] |= STALL_BITMASK; | |
703 | } | |
704 | ||
705 | /* mpc8xx_udc_set_nak | |
706 | * | |
707 | * Force returning of NAK responses for the given endpoint as a kind of very | |
708 | * simple flow control | |
386eda02 | 709 | */ |
16c8d5e7 WD |
710 | static void mpc8xx_udc_set_nak (unsigned int ep) |
711 | { | |
712 | usbp->usep[ep] |= NAK_BITMASK; | |
713 | __asm__ ("eieio"); | |
714 | } | |
715 | ||
716 | /* mpc8xx_udc_handle_txerr | |
717 | * | |
718 | * Handle errors relevant to TX. Return a status code to allow calling | |
719 | * indicative of what if anything happened | |
720 | */ | |
386eda02 | 721 | static short mpc8xx_udc_handle_txerr () |
16c8d5e7 WD |
722 | { |
723 | short ep = 0, ret = 0; | |
386eda02 WD |
724 | |
725 | for (; ep < TX_RING_SIZE; ep++) { | |
726 | if (usbp->usber & (0x10 << ep)) { | |
727 | ||
16c8d5e7 | 728 | /* Timeout or underrun */ |
386eda02 | 729 | if (tx_cbd[ep]->cbd_sc & 0x06) { |
16c8d5e7 | 730 | ret = 1; |
386eda02 | 731 | mpc8xx_udc_flush_tx_fifo (ep); |
16c8d5e7 | 732 | |
386eda02 WD |
733 | } else { |
734 | if (usbp->usep[ep] & STALL_BITMASK) { | |
735 | if (!ep) { | |
736 | usbp->usep[ep] &= ~STALL_BITMASK; | |
16c8d5e7 | 737 | } |
386eda02 | 738 | } /* else NAK */ |
16c8d5e7 | 739 | } |
386eda02 | 740 | usbp->usber |= (0x10 << ep); |
16c8d5e7 WD |
741 | } |
742 | } | |
743 | return ret; | |
744 | } | |
745 | ||
746 | /* mpc8xx_udc_advance_rx | |
747 | * | |
748 | * Advance cbd rx | |
749 | */ | |
386eda02 | 750 | static void mpc8xx_udc_advance_rx (volatile cbd_t ** rx_cbdp, int epid) |
16c8d5e7 | 751 | { |
386eda02 | 752 | if ((*rx_cbdp)->cbd_sc & RX_BD_W) { |
6d0f6bcf | 753 | *rx_cbdp = (volatile cbd_t *) (endpoints[epid]->rbase + CONFIG_SYS_IMMR); |
386eda02 WD |
754 | |
755 | } else { | |
16c8d5e7 WD |
756 | (*rx_cbdp)++; |
757 | } | |
758 | } | |
759 | ||
760 | ||
761 | /* mpc8xx_udc_flush_tx_fifo | |
762 | * | |
763 | * Flush a given TX fifo. Assumes one tx cbd per endpoint | |
764 | */ | |
386eda02 WD |
765 | static void mpc8xx_udc_flush_tx_fifo (int epid) |
766 | { | |
767 | volatile cbd_t *tx_cbdp = 0; | |
16c8d5e7 | 768 | |
386eda02 | 769 | if (epid > MAX_ENDPOINTS) { |
16c8d5e7 WD |
770 | return; |
771 | } | |
772 | ||
773 | /* TX stop */ | |
386eda02 | 774 | immr->im_cpm.cp_cpcr = ((epid << 2) | 0x1D01); |
16c8d5e7 | 775 | __asm__ ("eieio"); |
386eda02 WD |
776 | while (immr->im_cpm.cp_cpcr & 0x01); |
777 | ||
16c8d5e7 | 778 | usbp->uscom = 0x40 | 0; |
386eda02 | 779 | |
16c8d5e7 | 780 | /* reset ring */ |
6d0f6bcf | 781 | tx_cbdp = (cbd_t *) (endpoints[epid]->tbptr + CONFIG_SYS_IMMR); |
16c8d5e7 WD |
782 | tx_cbdp->cbd_sc = (TX_BD_I | TX_BD_W); |
783 | ||
386eda02 | 784 | |
16c8d5e7 | 785 | endpoints[epid]->tptr = endpoints[epid]->tbase; |
386eda02 WD |
786 | endpoints[epid]->tstate = 0x00; |
787 | endpoints[epid]->tbcnt = 0x00; | |
16c8d5e7 WD |
788 | |
789 | /* TX start */ | |
386eda02 | 790 | immr->im_cpm.cp_cpcr = ((epid << 2) | 0x2D01); |
16c8d5e7 | 791 | __asm__ ("eieio"); |
386eda02 | 792 | while (immr->im_cpm.cp_cpcr & 0x01); |
16c8d5e7 WD |
793 | |
794 | return; | |
795 | } | |
796 | ||
797 | /* mpc8xx_udc_flush_rx_fifo | |
798 | * | |
799 | * For the sake of completeness of the namespace, it seems like | |
800 | * a good-design-decision (tm) to include mpc8xx_udc_flush_rx_fifo(); | |
801 | * If RX_BD_E is true => a driver bug either here or in an upper layer | |
802 | * not polling frequently enough. If RX_BD_E is true we have told the host | |
803 | * we have accepted data but, the CPM found it had no-where to put that data | |
804 | * which needless to say would be a bad thing. | |
805 | */ | |
386eda02 | 806 | static void mpc8xx_udc_flush_rx_fifo () |
16c8d5e7 WD |
807 | { |
808 | int i = 0; | |
386eda02 WD |
809 | |
810 | for (i = 0; i < RX_RING_SIZE; i++) { | |
811 | if (!(rx_cbd[i]->cbd_sc & RX_BD_E)) { | |
812 | ERR ("buf %p used rx data len = 0x%x sc=0x%x!\n", | |
813 | rx_cbd[i], rx_cbd[i]->cbd_datlen, | |
814 | rx_cbd[i]->cbd_sc); | |
16c8d5e7 WD |
815 | |
816 | } | |
817 | } | |
386eda02 | 818 | ERR ("BUG : Input over-run\n"); |
16c8d5e7 WD |
819 | } |
820 | ||
821 | /* mpc8xx_udc_clear_rxbd | |
386eda02 | 822 | * |
16c8d5e7 WD |
823 | * Release control of RX CBD to CP. |
824 | */ | |
386eda02 | 825 | static void mpc8xx_udc_clear_rxbd (volatile cbd_t * rx_cbdp) |
16c8d5e7 WD |
826 | { |
827 | rx_cbdp->cbd_datlen = 0x0000; | |
386eda02 | 828 | rx_cbdp->cbd_sc = ((rx_cbdp->cbd_sc & RX_BD_W) | (RX_BD_E | RX_BD_I)); |
16c8d5e7 WD |
829 | __asm__ ("eieio"); |
830 | } | |
831 | ||
832 | /* mpc8xx_udc_tx_irq | |
833 | * | |
834 | * Parse for tx timeout, control RX or USB reset/busy conditions | |
835 | * Return -1 on timeout, -2 on fatal error, else return zero | |
836 | */ | |
386eda02 | 837 | static int mpc8xx_udc_tx_irq (int ep) |
16c8d5e7 WD |
838 | { |
839 | int i = 0; | |
840 | ||
386eda02 WD |
841 | if (usbp->usber & (USB_TX_ERRMASK)) { |
842 | if (mpc8xx_udc_handle_txerr ()) { | |
16c8d5e7 WD |
843 | /* Timeout, controlling function must retry send */ |
844 | return -1; | |
845 | } | |
846 | } | |
847 | ||
386eda02 | 848 | if (usbp->usber & (USB_E_RESET | USB_E_BSY)) { |
16c8d5e7 WD |
849 | /* Fatal, abandon TX transaction */ |
850 | return -2; | |
851 | } | |
386eda02 WD |
852 | |
853 | if (usbp->usber & USB_E_RXB) { | |
854 | for (i = 0; i < RX_RING_SIZE; i++) { | |
855 | if (!(rx_cbd[i]->cbd_sc & RX_BD_E)) { | |
856 | if ((rx_cbd[i] == ep_ref[0].prx) || ep) { | |
857 | return -2; | |
16c8d5e7 WD |
858 | } |
859 | } | |
860 | } | |
861 | } | |
862 | ||
863 | return 0; | |
864 | } | |
865 | ||
866 | /* mpc8xx_udc_ep_tx | |
867 | * | |
868 | * Transmit in a re-entrant fashion outbound USB packets. | |
869 | * Implement retry/timeout mechanism described in USB specification | |
870 | * Toggle DATA0/DATA1 pids as necessary | |
871 | * Introduces non-standard tx_retry. The USB standard has no scope for slave | |
872 | * devices to give up TX, however tx_retry stops us getting stuck in an endless | |
873 | * TX loop. | |
874 | */ | |
386eda02 | 875 | static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi) |
16c8d5e7 WD |
876 | { |
877 | struct urb *urb = epi->tx_urb; | |
386eda02 | 878 | volatile cbd_t *tx_cbdp = 0; |
16c8d5e7 WD |
879 | unsigned int ep = 0, pkt_len = 0, x = 0, tx_retry = 0; |
880 | int ret = 0; | |
386eda02 WD |
881 | |
882 | if (!epi || (epi->endpoint_address & 0x03) >= MAX_ENDPOINTS || !urb) { | |
16c8d5e7 WD |
883 | return -1; |
884 | } | |
885 | ||
886 | ep = epi->endpoint_address & 0x03; | |
6d0f6bcf | 887 | tx_cbdp = (cbd_t *) (endpoints[ep]->tbptr + CONFIG_SYS_IMMR); |
386eda02 WD |
888 | |
889 | if (tx_cbdp->cbd_sc & TX_BD_R || usbp->usber & USB_E_TXB) { | |
890 | mpc8xx_udc_flush_tx_fifo (ep); | |
16c8d5e7 WD |
891 | usbp->usber |= USB_E_TXB; |
892 | }; | |
893 | ||
386eda02 WD |
894 | while (tx_retry++ < 100) { |
895 | ret = mpc8xx_udc_tx_irq (ep); | |
896 | if (ret == -1) { | |
16c8d5e7 | 897 | /* ignore timeout here */ |
386eda02 | 898 | } else if (ret == -2) { |
16c8d5e7 | 899 | /* Abandon TX */ |
386eda02 | 900 | mpc8xx_udc_flush_tx_fifo (ep); |
16c8d5e7 | 901 | return -1; |
386eda02 WD |
902 | } |
903 | ||
6d0f6bcf | 904 | tx_cbdp = (cbd_t *) (endpoints[ep]->tbptr + CONFIG_SYS_IMMR); |
386eda02 WD |
905 | while (tx_cbdp->cbd_sc & TX_BD_R) { |
906 | }; | |
907 | tx_cbdp->cbd_sc = (tx_cbdp->cbd_sc & TX_BD_W); | |
16c8d5e7 | 908 | |
16c8d5e7 WD |
909 | pkt_len = urb->actual_length - epi->sent; |
910 | ||
386eda02 WD |
911 | if (pkt_len > epi->tx_packetSize || pkt_len > EP_MAX_PKT) { |
912 | pkt_len = MIN (epi->tx_packetSize, EP_MAX_PKT); | |
16c8d5e7 WD |
913 | } |
914 | ||
386eda02 WD |
915 | for (x = 0; x < pkt_len; x++) { |
916 | *((unsigned char *) (tx_cbdp->cbd_bufaddr + x)) = | |
16c8d5e7 WD |
917 | urb->buffer[epi->sent + x]; |
918 | } | |
919 | tx_cbdp->cbd_datlen = pkt_len; | |
386eda02 | 920 | tx_cbdp->cbd_sc |= (CBD_TX_BITMASK | ep_ref[ep].pid); |
16c8d5e7 WD |
921 | __asm__ ("eieio"); |
922 | ||
386eda02 WD |
923 | #ifdef __SIMULATE_ERROR__ |
924 | if (++err_poison_test == 2) { | |
925 | err_poison_test = 0; | |
926 | tx_cbdp->cbd_sc &= ~TX_BD_TC; | |
927 | } | |
928 | #endif | |
16c8d5e7 | 929 | |
386eda02 | 930 | usbp->uscom = (USCOM_STR | ep); |
16c8d5e7 | 931 | |
386eda02 WD |
932 | while (!(usbp->usber & USB_E_TXB)) { |
933 | ret = mpc8xx_udc_tx_irq (ep); | |
934 | if (ret == -1) { | |
16c8d5e7 WD |
935 | /* TX timeout */ |
936 | break; | |
386eda02 WD |
937 | } else if (ret == -2) { |
938 | if (usbp->usber & USB_E_TXB) { | |
939 | usbp->usber |= USB_E_TXB; | |
16c8d5e7 | 940 | } |
386eda02 | 941 | mpc8xx_udc_flush_tx_fifo (ep); |
16c8d5e7 WD |
942 | return -1; |
943 | } | |
944 | }; | |
945 | ||
386eda02 WD |
946 | if (usbp->usber & USB_E_TXB) { |
947 | usbp->usber |= USB_E_TXB; | |
16c8d5e7 WD |
948 | } |
949 | ||
950 | /* ACK must be present <= 18bit times from TX */ | |
386eda02 | 951 | if (ret == -1) { |
16c8d5e7 WD |
952 | continue; |
953 | } | |
386eda02 | 954 | |
16c8d5e7 WD |
955 | /* TX ACK : USB 2.0 8.7.2, Toggle PID, Advance TX */ |
956 | epi->sent += pkt_len; | |
386eda02 WD |
957 | epi->last = MIN (urb->actual_length - epi->sent, epi->tx_packetSize); |
958 | TOGGLE_TX_PID (ep_ref[ep].pid); | |
959 | ||
960 | if (epi->sent >= epi->tx_urb->actual_length) { | |
16c8d5e7 | 961 | |
16c8d5e7 WD |
962 | epi->tx_urb->actual_length = 0; |
963 | epi->sent = 0; | |
386eda02 WD |
964 | |
965 | if (ep_ref[ep].sc & EP_SEND_ZLP) { | |
16c8d5e7 | 966 | ep_ref[ep].sc &= ~EP_SEND_ZLP; |
386eda02 | 967 | } else { |
16c8d5e7 WD |
968 | return 0; |
969 | } | |
970 | } | |
971 | } | |
386eda02 WD |
972 | |
973 | ERR ("TX fail, endpoint 0x%x tx bytes 0x%x/0x%x\n", ep, epi->sent, | |
974 | epi->tx_urb->actual_length); | |
16c8d5e7 WD |
975 | |
976 | return -1; | |
977 | } | |
978 | ||
979 | /* mpc8xx_udc_dump_request | |
980 | * | |
981 | * Dump a control request to console | |
982 | */ | |
386eda02 | 983 | static void mpc8xx_udc_dump_request (struct usb_device_request *request) |
16c8d5e7 | 984 | { |
386eda02 WD |
985 | DBG ("bmRequestType:%02x bRequest:%02x wValue:%04x " |
986 | "wIndex:%04x wLength:%04x ?\n", | |
987 | request->bmRequestType, | |
988 | request->bRequest, | |
989 | request->wValue, request->wIndex, request->wLength); | |
16c8d5e7 WD |
990 | |
991 | return; | |
992 | } | |
993 | ||
386eda02 WD |
994 | /* mpc8xx_udc_ep0_rx_setup |
995 | * | |
16c8d5e7 WD |
996 | * Decode received ep0 SETUP packet. return non-zero on error |
997 | */ | |
998 | static int mpc8xx_udc_ep0_rx_setup (volatile cbd_t * rx_cbdp) | |
999 | { | |
1000 | unsigned int x = 0; | |
386eda02 WD |
1001 | struct urb *purb = ep_ref[0].urb; |
1002 | struct usb_endpoint_instance *epi = | |
16c8d5e7 WD |
1003 | &udc_device->bus->endpoint_array[0]; |
1004 | ||
386eda02 WD |
1005 | for (; x < rx_cbdp->cbd_datlen; x++) { |
1006 | *(((unsigned char *) &ep_ref[0].urb->device_request) + x) = | |
1007 | *((unsigned char *) (rx_cbdp->cbd_bufaddr + x)); | |
16c8d5e7 | 1008 | } |
16c8d5e7 | 1009 | |
386eda02 WD |
1010 | mpc8xx_udc_clear_rxbd (rx_cbdp); |
1011 | ||
1012 | if (ep0_recv_setup (purb)) { | |
1013 | mpc8xx_udc_dump_request (&purb->device_request); | |
16c8d5e7 WD |
1014 | return -1; |
1015 | } | |
1016 | ||
386eda02 | 1017 | if ((purb->device_request.bmRequestType & USB_REQ_DIRECTION_MASK) |
16c8d5e7 WD |
1018 | == USB_REQ_HOST2DEVICE) { |
1019 | ||
386eda02 WD |
1020 | switch (purb->device_request.bRequest) { |
1021 | case USB_REQ_SET_ADDRESS: | |
1022 | /* Send the Status OUT ZLP */ | |
1023 | ep_ref[0].pid = TX_BD_PID_DATA1; | |
1024 | purb->actual_length = 0; | |
1025 | mpc8xx_udc_init_tx (epi, purb); | |
1026 | mpc8xx_udc_ep_tx (epi); | |
1027 | ||
1028 | /* Move to the addressed state */ | |
1029 | usbp->usaddr = udc_device->address; | |
1030 | mpc8xx_udc_state_transition_up (udc_device->device_state, | |
1031 | STATE_ADDRESSED); | |
1032 | return 0; | |
1033 | ||
1034 | case USB_REQ_SET_CONFIGURATION: | |
1035 | if (!purb->device_request.wValue) { | |
1036 | /* Respond at default address */ | |
1037 | usbp->usaddr = 0x00; | |
1038 | mpc8xx_udc_state_transition_down (udc_device->device_state, | |
1039 | STATE_ADDRESSED); | |
1040 | } else { | |
1041 | /* TODO: Support multiple configurations */ | |
1042 | mpc8xx_udc_state_transition_up (udc_device->device_state, | |
1043 | STATE_CONFIGURED); | |
1044 | for (x = 1; x < MAX_ENDPOINTS; x++) { | |
1045 | if ((udc_device->bus->endpoint_array[x].endpoint_address & USB_ENDPOINT_DIR_MASK) | |
1046 | == USB_DIR_IN) { | |
1047 | ep_ref[x].pid = TX_BD_PID_DATA0; | |
1048 | } else { | |
1049 | ep_ref[x].pid = RX_BD_PID_DATA0; | |
16c8d5e7 | 1050 | } |
386eda02 WD |
1051 | /* Set configuration must unstall endpoints */ |
1052 | usbp->usep[x] &= ~STALL_BITMASK; | |
16c8d5e7 | 1053 | } |
386eda02 WD |
1054 | } |
1055 | break; | |
1056 | default: | |
1057 | /* CDC/Vendor specific */ | |
1058 | break; | |
16c8d5e7 WD |
1059 | } |
1060 | ||
1061 | /* Send ZLP as ACK in Status OUT phase */ | |
1062 | ep_ref[0].pid = TX_BD_PID_DATA1; | |
1063 | purb->actual_length = 0; | |
386eda02 WD |
1064 | mpc8xx_udc_init_tx (epi, purb); |
1065 | mpc8xx_udc_ep_tx (epi); | |
16c8d5e7 | 1066 | |
386eda02 WD |
1067 | } else { |
1068 | ||
1069 | if (purb->actual_length) { | |
16c8d5e7 | 1070 | ep_ref[0].pid = TX_BD_PID_DATA1; |
386eda02 | 1071 | mpc8xx_udc_init_tx (epi, purb); |
16c8d5e7 | 1072 | |
386eda02 | 1073 | if (!(purb->actual_length % EP0_MAX_PACKET_SIZE)) { |
16c8d5e7 WD |
1074 | ep_ref[0].sc |= EP_SEND_ZLP; |
1075 | } | |
1076 | ||
386eda02 WD |
1077 | if (purb->device_request.wValue == |
1078 | USB_DESCRIPTOR_TYPE_DEVICE) { | |
1079 | if (le16_to_cpu (purb->device_request.wLength) | |
1080 | > purb->actual_length) { | |
16c8d5e7 WD |
1081 | /* Send EP0_MAX_PACKET_SIZE bytes |
1082 | * unless correct size requested. | |
1083 | */ | |
386eda02 WD |
1084 | if (purb->actual_length > epi->tx_packetSize) { |
1085 | purb->actual_length = epi->tx_packetSize; | |
16c8d5e7 | 1086 | } |
16c8d5e7 WD |
1087 | } |
1088 | } | |
386eda02 | 1089 | mpc8xx_udc_ep_tx (epi); |
16c8d5e7 | 1090 | |
386eda02 | 1091 | } else { |
16c8d5e7 | 1092 | /* Corrupt SETUP packet? */ |
386eda02 | 1093 | ERR ("Zero length data or SETUP with DATA-IN phase ?\n"); |
16c8d5e7 WD |
1094 | return 1; |
1095 | } | |
1096 | } | |
1097 | return 0; | |
1098 | } | |
1099 | ||
1100 | /* mpc8xx_udc_init_tx | |
1101 | * | |
1102 | * Setup some basic parameters for a TX transaction | |
1103 | */ | |
386eda02 WD |
1104 | static void mpc8xx_udc_init_tx (struct usb_endpoint_instance *epi, |
1105 | struct urb *tx_urb) | |
16c8d5e7 WD |
1106 | { |
1107 | epi->sent = 0; | |
1108 | epi->last = 0; | |
1109 | epi->tx_urb = tx_urb; | |
1110 | } | |
1111 | ||
1112 | /* mpc8xx_udc_ep0_rx | |
1113 | * | |
1114 | * Receive ep0/control USB data. Parse and possibly send a response. | |
1115 | */ | |
386eda02 | 1116 | static void mpc8xx_udc_ep0_rx (volatile cbd_t * rx_cbdp) |
16c8d5e7 | 1117 | { |
386eda02 WD |
1118 | if (rx_cbdp->cbd_sc & RX_BD_PID_SETUP) { |
1119 | ||
16c8d5e7 | 1120 | /* Unconditionally accept SETUP packets */ |
386eda02 WD |
1121 | if (mpc8xx_udc_ep0_rx_setup (rx_cbdp)) { |
1122 | mpc8xx_udc_stall (0); | |
16c8d5e7 | 1123 | } |
386eda02 | 1124 | |
16c8d5e7 | 1125 | } else { |
386eda02 WD |
1126 | |
1127 | mpc8xx_udc_clear_rxbd (rx_cbdp); | |
1128 | ||
1129 | if ((rx_cbdp->cbd_datlen - 2)) { | |
16c8d5e7 | 1130 | /* SETUP with a DATA phase |
386eda02 WD |
1131 | * outside of SETUP packet. |
1132 | * Reply with STALL. | |
1133 | */ | |
16c8d5e7 WD |
1134 | mpc8xx_udc_stall (0); |
1135 | } | |
1136 | } | |
1137 | } | |
1138 | ||
1139 | /* mpc8xx_udc_epn_rx | |
1140 | * | |
1141 | * Receive some data from cbd into USB system urb data abstraction | |
386eda02 | 1142 | * Upper layers should NAK if there is insufficient RX data space |
16c8d5e7 WD |
1143 | */ |
1144 | static int mpc8xx_udc_epn_rx (unsigned int epid, volatile cbd_t * rx_cbdp) | |
1145 | { | |
1146 | struct usb_endpoint_instance *epi = 0; | |
1147 | struct urb *urb = 0; | |
1148 | unsigned int x = 0; | |
1149 | ||
386eda02 | 1150 | if (epid >= MAX_ENDPOINTS || !rx_cbdp->cbd_datlen) { |
16c8d5e7 WD |
1151 | return 0; |
1152 | } | |
386eda02 WD |
1153 | |
1154 | /* USB 2.0 PDF section 8.6.4 | |
16c8d5e7 WD |
1155 | * Discard data with invalid PID it is a resend. |
1156 | */ | |
386eda02 | 1157 | if (ep_ref[epid].pid != (rx_cbdp->cbd_sc & 0xC0)) { |
16c8d5e7 WD |
1158 | return 1; |
1159 | } | |
386eda02 WD |
1160 | TOGGLE_RX_PID (ep_ref[epid].pid); |
1161 | ||
16c8d5e7 WD |
1162 | epi = &udc_device->bus->endpoint_array[epid]; |
1163 | urb = epi->rcv_urb; | |
1164 | ||
386eda02 WD |
1165 | for (; x < (rx_cbdp->cbd_datlen - 2); x++) { |
1166 | *((unsigned char *) (urb->buffer + urb->actual_length + x)) = | |
1167 | *((unsigned char *) (rx_cbdp->cbd_bufaddr + x)); | |
16c8d5e7 WD |
1168 | } |
1169 | ||
386eda02 | 1170 | if (x) { |
16c8d5e7 | 1171 | usbd_rcv_complete (epi, x, 0); |
386eda02 WD |
1172 | if (ep_ref[epid].urb->status == RECV_ERROR) { |
1173 | DBG ("RX error unset NAK\n"); | |
1174 | udc_unset_nak (epid); | |
16c8d5e7 | 1175 | } |
386eda02 | 1176 | } |
16c8d5e7 WD |
1177 | return x; |
1178 | } | |
1179 | ||
1180 | /* mpc8xx_udc_clock_init | |
1181 | * | |
386eda02 | 1182 | * Obtain a clock reference for Full Speed Signaling |
16c8d5e7 | 1183 | */ |
386eda02 WD |
1184 | static void mpc8xx_udc_clock_init (volatile immap_t * immr, |
1185 | volatile cpm8xx_t * cp) | |
16c8d5e7 WD |
1186 | { |
1187 | ||
6d0f6bcf | 1188 | #if defined(CONFIG_SYS_USB_EXTC_CLK) |
16c8d5e7 WD |
1189 | |
1190 | /* This has been tested with a 48MHz crystal on CLK6 */ | |
6d0f6bcf | 1191 | switch (CONFIG_SYS_USB_EXTC_CLK) { |
386eda02 WD |
1192 | case 1: |
1193 | immr->im_ioport.iop_papar |= 0x0100; | |
1194 | immr->im_ioport.iop_padir &= ~0x0100; | |
1195 | cp->cp_sicr |= 0x24; | |
1196 | break; | |
1197 | case 2: | |
1198 | immr->im_ioport.iop_papar |= 0x0200; | |
1199 | immr->im_ioport.iop_padir &= ~0x0200; | |
1200 | cp->cp_sicr |= 0x2D; | |
1201 | break; | |
1202 | case 3: | |
1203 | immr->im_ioport.iop_papar |= 0x0400; | |
1204 | immr->im_ioport.iop_padir &= ~0x0400; | |
1205 | cp->cp_sicr |= 0x36; | |
1206 | break; | |
1207 | case 4: | |
1208 | immr->im_ioport.iop_papar |= 0x0800; | |
1209 | immr->im_ioport.iop_padir &= ~0x0800; | |
1210 | cp->cp_sicr |= 0x3F; | |
1211 | break; | |
1212 | default: | |
1213 | udc_state = STATE_ERROR; | |
1214 | break; | |
16c8d5e7 WD |
1215 | } |
1216 | ||
6d0f6bcf | 1217 | #elif defined(CONFIG_SYS_USB_BRGCLK) |
16c8d5e7 | 1218 | |
386eda02 | 1219 | /* This has been tested with brgclk == 50MHz */ |
16c8d5e7 WD |
1220 | int divisor = 0; |
1221 | ||
386eda02 WD |
1222 | if (gd->cpu_clk < 48000000L) { |
1223 | ERR ("brgclk is too slow for full-speed USB!\n"); | |
16c8d5e7 WD |
1224 | udc_state = STATE_ERROR; |
1225 | return; | |
1226 | } | |
1227 | ||
8ed44d91 | 1228 | /* Assume the brgclk is 'good enough', we want !(gd->cpu_clk%48MHz) |
16c8d5e7 | 1229 | * but, can /probably/ live with close-ish alternative rates. |
386eda02 WD |
1230 | */ |
1231 | divisor = (gd->cpu_clk / 48000000L) - 1; | |
16c8d5e7 | 1232 | cp->cp_sicr &= ~0x0000003F; |
386eda02 | 1233 | |
6d0f6bcf | 1234 | switch (CONFIG_SYS_USB_BRGCLK) { |
386eda02 WD |
1235 | case 1: |
1236 | cp->cp_brgc1 |= (divisor | CPM_BRG_EN); | |
1237 | cp->cp_sicr &= ~0x2F; | |
1238 | break; | |
1239 | case 2: | |
1240 | cp->cp_brgc2 |= (divisor | CPM_BRG_EN); | |
1241 | cp->cp_sicr |= 0x00000009; | |
1242 | break; | |
1243 | case 3: | |
1244 | cp->cp_brgc3 |= (divisor | CPM_BRG_EN); | |
1245 | cp->cp_sicr |= 0x00000012; | |
1246 | break; | |
1247 | case 4: | |
1248 | cp->cp_brgc4 = (divisor | CPM_BRG_EN); | |
1249 | cp->cp_sicr |= 0x0000001B; | |
1250 | break; | |
1251 | default: | |
1252 | udc_state = STATE_ERROR; | |
1253 | break; | |
16c8d5e7 WD |
1254 | } |
1255 | ||
1256 | #else | |
6d0f6bcf | 1257 | #error "CONFIG_SYS_USB_EXTC_CLK or CONFIG_SYS_USB_BRGCLK must be defined" |
16c8d5e7 WD |
1258 | #endif |
1259 | ||
1260 | } | |
1261 | ||
1262 | /* mpc8xx_udc_cbd_attach | |
1263 | * | |
1264 | * attach a cbd to and endpoint | |
1265 | */ | |
1266 | static void mpc8xx_udc_cbd_attach (int ep, uchar tx_size, uchar rx_size) | |
1267 | { | |
386eda02 WD |
1268 | |
1269 | if (!tx_cbd[ep] || !rx_cbd[ep] || ep >= MAX_ENDPOINTS) { | |
16c8d5e7 WD |
1270 | udc_state = STATE_ERROR; |
1271 | return; | |
1272 | } | |
1273 | ||
386eda02 WD |
1274 | if (tx_size > USB_MAX_PKT || rx_size > USB_MAX_PKT || |
1275 | (!tx_size && !rx_size)) { | |
16c8d5e7 WD |
1276 | udc_state = STATE_ERROR; |
1277 | return; | |
1278 | } | |
1279 | ||
1280 | /* Attach CBD to appropiate Parameter RAM Endpoint data structure */ | |
386eda02 WD |
1281 | if (rx_size) { |
1282 | endpoints[ep]->rbase = (u32) rx_cbd[rx_ct]; | |
1283 | endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct]; | |
16c8d5e7 WD |
1284 | rx_ct++; |
1285 | ||
386eda02 WD |
1286 | if (!ep) { |
1287 | ||
1288 | endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct]; | |
16c8d5e7 WD |
1289 | rx_cbd[rx_ct]->cbd_sc |= RX_BD_W; |
1290 | rx_ct++; | |
1291 | ||
386eda02 | 1292 | } else { |
16c8d5e7 | 1293 | rx_ct += 2; |
386eda02 | 1294 | endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct]; |
16c8d5e7 WD |
1295 | rx_cbd[rx_ct]->cbd_sc |= RX_BD_W; |
1296 | rx_ct++; | |
1297 | } | |
1298 | ||
1299 | /* Where we expect to RX data on this endpoint */ | |
386eda02 WD |
1300 | ep_ref[ep].prx = rx_cbd[rx_ct - 1]; |
1301 | } else { | |
16c8d5e7 WD |
1302 | |
1303 | ep_ref[ep].prx = 0; | |
1304 | endpoints[ep]->rbase = 0; | |
1305 | endpoints[ep]->rbptr = 0; | |
1306 | } | |
1307 | ||
386eda02 WD |
1308 | if (tx_size) { |
1309 | endpoints[ep]->tbase = (u32) tx_cbd[tx_ct]; | |
1310 | endpoints[ep]->tbptr = (u32) tx_cbd[tx_ct]; | |
16c8d5e7 | 1311 | tx_ct++; |
386eda02 | 1312 | } else { |
16c8d5e7 WD |
1313 | endpoints[ep]->tbase = 0; |
1314 | endpoints[ep]->tbptr = 0; | |
1315 | } | |
1316 | ||
1317 | endpoints[ep]->tstate = 0; | |
1318 | endpoints[ep]->tbcnt = 0; | |
1319 | endpoints[ep]->mrblr = EP_MAX_PKT; | |
386eda02 | 1320 | endpoints[ep]->rfcr = 0x18; |
16c8d5e7 WD |
1321 | endpoints[ep]->tfcr = 0x18; |
1322 | ep_ref[ep].sc |= EP_ATTACHED; | |
1323 | ||
386eda02 WD |
1324 | DBG ("ep %d rbase 0x%08x rbptr 0x%08x tbase 0x%08x tbptr 0x%08x prx = %p\n", |
1325 | ep, endpoints[ep]->rbase, endpoints[ep]->rbptr, | |
1326 | endpoints[ep]->tbase, endpoints[ep]->tbptr, | |
1327 | ep_ref[ep].prx); | |
16c8d5e7 WD |
1328 | |
1329 | return; | |
1330 | } | |
1331 | ||
1332 | /* mpc8xx_udc_cbd_init | |
1333 | * | |
1334 | * Allocate space for a cbd and allocate TX/RX data space | |
1335 | */ | |
1336 | static void mpc8xx_udc_cbd_init (void) | |
1337 | { | |
1338 | int i = 0; | |
1339 | ||
386eda02 WD |
1340 | for (; i < TX_RING_SIZE; i++) { |
1341 | tx_cbd[i] = (cbd_t *) | |
1342 | mpc8xx_udc_alloc (sizeof (cbd_t), sizeof (int)); | |
1343 | } | |
1344 | ||
1345 | for (i = 0; i < RX_RING_SIZE; i++) { | |
1346 | rx_cbd[i] = (cbd_t *) | |
1347 | mpc8xx_udc_alloc (sizeof (cbd_t), sizeof (int)); | |
16c8d5e7 WD |
1348 | } |
1349 | ||
386eda02 WD |
1350 | for (i = 0; i < TX_RING_SIZE; i++) { |
1351 | tx_cbd[i]->cbd_bufaddr = | |
1352 | mpc8xx_udc_alloc (EP_MAX_PKT, sizeof (int)); | |
16c8d5e7 | 1353 | |
386eda02 | 1354 | tx_cbd[i]->cbd_sc = (TX_BD_I | TX_BD_W); |
16c8d5e7 WD |
1355 | tx_cbd[i]->cbd_datlen = 0x0000; |
1356 | } | |
1357 | ||
1358 | ||
386eda02 WD |
1359 | for (i = 0; i < RX_RING_SIZE; i++) { |
1360 | rx_cbd[i]->cbd_bufaddr = | |
1361 | mpc8xx_udc_alloc (EP_MAX_PKT, sizeof (int)); | |
16c8d5e7 WD |
1362 | rx_cbd[i]->cbd_sc = (RX_BD_I | RX_BD_E); |
1363 | rx_cbd[i]->cbd_datlen = 0x0000; | |
1364 | ||
1365 | } | |
1366 | ||
1367 | return; | |
1368 | } | |
1369 | ||
1370 | /* mpc8xx_udc_endpoint_init | |
1371 | * | |
1372 | * Attach an endpoint to some dpram | |
1373 | */ | |
1374 | static void mpc8xx_udc_endpoint_init (void) | |
1375 | { | |
1376 | int i = 0; | |
1377 | ||
386eda02 WD |
1378 | for (; i < MAX_ENDPOINTS; i++) { |
1379 | endpoints[i] = (usb_epb_t *) | |
1380 | mpc8xx_udc_alloc (sizeof (usb_epb_t), 32); | |
16c8d5e7 WD |
1381 | } |
1382 | } | |
1383 | ||
1384 | /* mpc8xx_udc_alloc | |
1385 | * | |
386eda02 | 1386 | * Grab the address of some dpram |
16c8d5e7 WD |
1387 | */ |
1388 | static u32 mpc8xx_udc_alloc (u32 data_size, u32 alignment) | |
1389 | { | |
1390 | u32 retaddr = address_base; | |
386eda02 WD |
1391 | |
1392 | while (retaddr % alignment) { | |
16c8d5e7 | 1393 | retaddr++; |
386eda02 WD |
1394 | } |
1395 | address_base += data_size; | |
1396 | ||
16c8d5e7 WD |
1397 | return retaddr; |
1398 | } |