[J-u-boot.git] / drivers / i2c / meson_i2c.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2017 - Beniamino Galvani <[email protected]>
 */
#include <log.h>
#include <asm/io.h>
#include <clk.h>
#include <dm.h>
#include <i2c.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/err.h>

#define I2C_TIMEOUT_MS		100

/* Control register fields */
#define REG_CTRL_START		BIT(0)
#define REG_CTRL_ACK_IGNORE	BIT(1)
#define REG_CTRL_STATUS		BIT(2)
#define REG_CTRL_ERROR		BIT(3)
#define REG_CTRL_CLKDIV_SHIFT	12
#define REG_CTRL_CLKDIV_MASK	GENMASK(21, 12)
#define REG_CTRL_CLKDIVEXT_SHIFT 28
#define REG_CTRL_CLKDIVEXT_MASK	GENMASK(29, 28)

enum {
	TOKEN_END = 0,
	TOKEN_START,
	TOKEN_SLAVE_ADDR_WRITE,
	TOKEN_SLAVE_ADDR_READ,
	TOKEN_DATA,
	TOKEN_DATA_LAST,
	TOKEN_STOP,
};

struct i2c_regs {
	u32 ctrl;
	u32 slave_addr;
	u32 tok_list0;
	u32 tok_list1;
	u32 tok_wdata0;
	u32 tok_wdata1;
	u32 tok_rdata0;
	u32 tok_rdata1;
};

struct meson_i2c_data {
	unsigned char div_factor;
};

struct meson_i2c {
	const struct meson_i2c_data *data;
	struct clk clk;
	struct i2c_regs *regs;
	struct i2c_msg *msg;	/* Current I2C message */
	bool last;		/* Whether the message is the last */
	uint count;		/* Number of bytes in the current transfer */
	uint pos;		/* Position of current transfer in message */
	u32 tokens[2];		/* Sequence of tokens to be written */
	uint num_tokens;	/* Number of tokens to be written */
};

static void meson_i2c_reset_tokens(struct meson_i2c *i2c)
{
	i2c->tokens[0] = 0;
	i2c->tokens[1] = 0;
	i2c->num_tokens = 0;
}

static void meson_i2c_add_token(struct meson_i2c *i2c, int token)
{
	if (i2c->num_tokens < 8)
		i2c->tokens[0] |= (token & 0xf) << (i2c->num_tokens * 4);
	else
		i2c->tokens[1] |= (token & 0xf) << ((i2c->num_tokens % 8) * 4);

	i2c->num_tokens++;
}

/*
 * Retrieve data for the current transfer (which can be at most 8
 * bytes) from the device internal buffer.
 */
static void meson_i2c_get_data(struct meson_i2c *i2c, u8 *buf, int len)
{
	u32 rdata0, rdata1;
	int i;

	rdata0 = readl(&i2c->regs->tok_rdata0);
	rdata1 = readl(&i2c->regs->tok_rdata1);

	debug("meson i2c: read data %08x %08x len %d\n", rdata0, rdata1, len);

	for (i = 0; i < min(4, len); i++)
		*buf++ = (rdata0 >> i * 8) & 0xff;

	for (i = 4; i < min(8, len); i++)
		*buf++ = (rdata1 >> (i - 4) * 8) & 0xff;
}

/*
 * Write data for the current transfer (which can be at most 8 bytes)
 * to the device internal buffer.
 */
static void meson_i2c_put_data(struct meson_i2c *i2c, u8 *buf, int len)
{
	u32 wdata0 = 0, wdata1 = 0;
	int i;

	for (i = 0; i < min(4, len); i++)
		wdata0 |= *buf++ << (i * 8);

	for (i = 4; i < min(8, len); i++)
		wdata1 |= *buf++ << ((i - 4) * 8);

	writel(wdata0, &i2c->regs->tok_wdata0);
	writel(wdata1, &i2c->regs->tok_wdata1);

	debug("meson i2c: write data %08x %08x len %d\n", wdata0, wdata1, len);
}

/*
 * Prepare the next transfer: pick the next 8 bytes in the remaining
 * part of message and write tokens and data (if needed) to the
 * device.
 */
static void meson_i2c_prepare_xfer(struct meson_i2c *i2c)
{
	bool write = !(i2c->msg->flags & I2C_M_RD);
	int i;

	i2c->count = min(i2c->msg->len - i2c->pos, 8u);

	for (i = 0; i + 1 < i2c->count; i++)
		meson_i2c_add_token(i2c, TOKEN_DATA);

	if (i2c->count) {
		if (write || i2c->pos + i2c->count < i2c->msg->len)
			meson_i2c_add_token(i2c, TOKEN_DATA);
		else
			meson_i2c_add_token(i2c, TOKEN_DATA_LAST);
	}

	if (write)
		meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count);

	if (i2c->last && i2c->pos + i2c->count >= i2c->msg->len)
		meson_i2c_add_token(i2c, TOKEN_STOP);

	writel(i2c->tokens[0], &i2c->regs->tok_list0);
	writel(i2c->tokens[1], &i2c->regs->tok_list1);
}

static void meson_i2c_do_start(struct meson_i2c *i2c, struct i2c_msg *msg)
{
	int token;

	token = (msg->flags & I2C_M_RD) ? TOKEN_SLAVE_ADDR_READ :
		TOKEN_SLAVE_ADDR_WRITE;

	writel(msg->addr << 1, &i2c->regs->slave_addr);
	meson_i2c_add_token(i2c, TOKEN_START);
	meson_i2c_add_token(i2c, token);
}

static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg,
			      int last)
{
	ulong start;

	debug("meson i2c: %s addr %u len %u\n",
	      (msg->flags & I2C_M_RD) ? "read" : "write",
	      msg->addr, msg->len);

	i2c->msg = msg;
	i2c->last = last;
	i2c->pos = 0;
	i2c->count = 0;

	meson_i2c_reset_tokens(i2c);
	meson_i2c_do_start(i2c, msg);

	do {
		meson_i2c_prepare_xfer(i2c);

		/* start the transfer */
		setbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
		start = get_timer(0);
		while (readl(&i2c->regs->ctrl) & REG_CTRL_STATUS) {
			if (get_timer(start) > I2C_TIMEOUT_MS) {
				clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
				debug("meson i2c: timeout\n");
				return -ETIMEDOUT;
			}
			udelay(1);
		}
		meson_i2c_reset_tokens(i2c);
		clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START);

		if (readl(&i2c->regs->ctrl) & REG_CTRL_ERROR) {
			debug("meson i2c: error\n");
			return -EREMOTEIO;
		}

		if ((msg->flags & I2C_M_RD) && i2c->count) {
			meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos,
					   i2c->count);
		}
		i2c->pos += i2c->count;
	} while (i2c->pos < msg->len);

	return 0;
}

static int meson_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
			  int nmsgs)
{
	struct meson_i2c *i2c = dev_get_priv(bus);
	int i, ret = 0;

	for (i = 0; i < nmsgs; i++) {
		ret = meson_i2c_xfer_msg(i2c, msg + i, i == nmsgs - 1);
		if (ret)
			return ret;
	}

	return 0;
}

static int meson_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
{
	struct meson_i2c *i2c = dev_get_priv(bus);
	ulong clk_rate;
	unsigned int div;

	clk_rate = clk_get_rate(&i2c->clk);
	if (IS_ERR_VALUE(clk_rate))
		return -EINVAL;

	div = DIV_ROUND_UP(clk_rate, speed * i2c->data->div_factor);

	/* clock divider has 12 bits */
	if (div >= (1 << 12)) {
		debug("meson i2c: requested bus frequency too low\n");
		div = (1 << 12) - 1;
	}

	clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIV_MASK,
			(div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT);

	clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIVEXT_MASK,
			(div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT);

	debug("meson i2c: set clk %u, src %lu, div %u\n", speed, clk_rate, div);

	return 0;
}

static int meson_i2c_probe(struct udevice *bus)
{
	struct meson_i2c *i2c = dev_get_priv(bus);
	int ret;

	i2c->data = (const struct meson_i2c_data *)dev_get_driver_data(bus);

	ret = clk_get_by_index(bus, 0, &i2c->clk);
	if (ret < 0)
		return ret;

	ret = clk_enable(&i2c->clk);
	if (ret)
		return ret;

	i2c->regs = dev_read_addr_ptr(bus);
	clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START);

	return 0;
}

static const struct dm_i2c_ops meson_i2c_ops = {
	.xfer          = meson_i2c_xfer,
	.set_bus_speed = meson_i2c_set_bus_speed,
};

static const struct meson_i2c_data i2c_meson6_data = {
	.div_factor = 4,
};

static const struct meson_i2c_data i2c_gxbb_data = {
	.div_factor = 4,
};

static const struct meson_i2c_data i2c_axg_data = {
	.div_factor = 3,
};

static const struct udevice_id meson_i2c_ids[] = {
	{.compatible = "amlogic,meson6-i2c", .data = (ulong)&i2c_meson6_data},
	{.compatible = "amlogic,meson-gx-i2c", .data = (ulong)&i2c_gxbb_data},
	{.compatible = "amlogic,meson-gxbb-i2c", .data = (ulong)&i2c_gxbb_data},
	{.compatible = "amlogic,meson-axg-i2c", .data = (ulong)&i2c_axg_data},
	{}
};

U_BOOT_DRIVER(i2c_meson) = {
	.name = "i2c_meson",
	.id   = UCLASS_I2C,
	.of_match = meson_i2c_ids,
	.probe = meson_i2c_probe,
	.priv_auto	= sizeof(struct meson_i2c),
	.ops = &meson_i2c_ops,
};
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
f8d9ca18 BG	2	/*
f8d9ca18 BG	3	* (C) Copyright 2017 - Beniamino Galvani <[email protected]>
f8d9ca18	4	*/
f7ae49fc	5	#include <log.h>
f8d9ca18	6	#include <asm/io.h>
2e668af5	7	#include <clk.h>
f8d9ca18 BG	8	#include <dm.h>
f8d9ca18 BG	9	#include <i2c.h>
cd93d625	10	#include <linux/bitops.h>
c05ed00a	11	#include <linux/delay.h>
61b29b82	12	#include <linux/err.h>
f8d9ca18	13
8c47ab6b	14	#define I2C_TIMEOUT_MS 100
f8d9ca18 BG	15
	16	/* Control register fields */
	17	#define REG_CTRL_START BIT(0)
	18	#define REG_CTRL_ACK_IGNORE BIT(1)
	19	#define REG_CTRL_STATUS BIT(2)
	20	#define REG_CTRL_ERROR BIT(3)
	21	#define REG_CTRL_CLKDIV_SHIFT 12
	22	#define REG_CTRL_CLKDIV_MASK GENMASK(21, 12)
	23	#define REG_CTRL_CLKDIVEXT_SHIFT 28
	24	#define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28)
	25
	26	enum {
	27	TOKEN_END = 0,
	28	TOKEN_START,
	29	TOKEN_SLAVE_ADDR_WRITE,
	30	TOKEN_SLAVE_ADDR_READ,
	31	TOKEN_DATA,
	32	TOKEN_DATA_LAST,
	33	TOKEN_STOP,
	34	};
	35
	36	struct i2c_regs {
	37	u32 ctrl;
	38	u32 slave_addr;
	39	u32 tok_list0;
	40	u32 tok_list1;
	41	u32 tok_wdata0;
	42	u32 tok_wdata1;
	43	u32 tok_rdata0;
	44	u32 tok_rdata1;
	45	};
	46
d82dcc45 GLR	47	struct meson_i2c_data {
	48	unsigned char div_factor;
	49	};
	50
f8d9ca18	51	struct meson_i2c {
d82dcc45	52	const struct meson_i2c_data *data;
2e668af5	53	struct clk clk;
f8d9ca18	54	struct i2c_regs *regs;
50a69095 BG	55	struct i2c_msg msg; / Current I2C message */
	56	bool last; /* Whether the message is the last */
	57	uint count; /* Number of bytes in the current transfer */
	58	uint pos; /* Position of current transfer in message */
	59	u32 tokens[2]; /* Sequence of tokens to be written */
	60	uint num_tokens; /* Number of tokens to be written */
f8d9ca18 BG	61	};
	62
	63	static void meson_i2c_reset_tokens(struct meson_i2c *i2c)
	64	{
	65	i2c->tokens[0] = 0;
	66	i2c->tokens[1] = 0;
	67	i2c->num_tokens = 0;
	68	}
	69
	70	static void meson_i2c_add_token(struct meson_i2c *i2c, int token)
	71	{
	72	if (i2c->num_tokens < 8)
	73	i2c->tokens[0] \|= (token & 0xf) << (i2c->num_tokens * 4);
	74	else
	75	i2c->tokens[1] \|= (token & 0xf) << ((i2c->num_tokens % 8) * 4);
	76
	77	i2c->num_tokens++;
	78	}
	79
50a69095 BG	80	/*
	81	* Retrieve data for the current transfer (which can be at most 8
	82	* bytes) from the device internal buffer.
	83	*/
f8d9ca18 BG	84	static void meson_i2c_get_data(struct meson_i2c i2c, u8 buf, int len)
	85	{
	86	u32 rdata0, rdata1;
	87	int i;
	88
	89	rdata0 = readl(&i2c->regs->tok_rdata0);
	90	rdata1 = readl(&i2c->regs->tok_rdata1);
	91
	92	debug("meson i2c: read data %08x %08x len %d\n", rdata0, rdata1, len);
	93
	94	for (i = 0; i < min(4, len); i++)
	95	buf++ = (rdata0 >> i 8) & 0xff;
	96
	97	for (i = 4; i < min(8, len); i++)
	98	buf++ = (rdata1 >> (i - 4) 8) & 0xff;
	99	}
	100
50a69095 BG	101	/*
	102	* Write data for the current transfer (which can be at most 8 bytes)
	103	* to the device internal buffer.
	104	*/
f8d9ca18 BG	105	static void meson_i2c_put_data(struct meson_i2c i2c, u8 buf, int len)
	106	{
	107	u32 wdata0 = 0, wdata1 = 0;
	108	int i;
	109
	110	for (i = 0; i < min(4, len); i++)
	111	wdata0 \|= buf++ << (i 8);
	112
	113	for (i = 4; i < min(8, len); i++)
	114	wdata1 \|= buf++ << ((i - 4) 8);
	115
	116	writel(wdata0, &i2c->regs->tok_wdata0);
	117	writel(wdata1, &i2c->regs->tok_wdata1);
	118
	119	debug("meson i2c: write data %08x %08x len %d\n", wdata0, wdata1, len);
	120	}
	121
50a69095 BG	122	/*
	123	* Prepare the next transfer: pick the next 8 bytes in the remaining
	124	* part of message and write tokens and data (if needed) to the
	125	* device.
	126	*/
f8d9ca18 BG	127	static void meson_i2c_prepare_xfer(struct meson_i2c *i2c)
	128	{
	129	bool write = !(i2c->msg->flags & I2C_M_RD);
	130	int i;
	131
	132	i2c->count = min(i2c->msg->len - i2c->pos, 8u);
	133
	134	for (i = 0; i + 1 < i2c->count; i++)
	135	meson_i2c_add_token(i2c, TOKEN_DATA);
	136
	137	if (i2c->count) {
	138	if (write \|\| i2c->pos + i2c->count < i2c->msg->len)
	139	meson_i2c_add_token(i2c, TOKEN_DATA);
	140	else
	141	meson_i2c_add_token(i2c, TOKEN_DATA_LAST);
	142	}
	143
	144	if (write)
	145	meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count);
	146
	147	if (i2c->last && i2c->pos + i2c->count >= i2c->msg->len)
	148	meson_i2c_add_token(i2c, TOKEN_STOP);
	149
	150	writel(i2c->tokens[0], &i2c->regs->tok_list0);
	151	writel(i2c->tokens[1], &i2c->regs->tok_list1);
	152	}
	153
	154	static void meson_i2c_do_start(struct meson_i2c i2c, struct i2c_msg msg)
	155	{
	156	int token;
	157
	158	token = (msg->flags & I2C_M_RD) ? TOKEN_SLAVE_ADDR_READ :
	159	TOKEN_SLAVE_ADDR_WRITE;
	160
	161	writel(msg->addr << 1, &i2c->regs->slave_addr);
	162	meson_i2c_add_token(i2c, TOKEN_START);
	163	meson_i2c_add_token(i2c, token);
	164	}
	165
	166	static int meson_i2c_xfer_msg(struct meson_i2c i2c, struct i2c_msg msg,
	167	int last)
	168	{
	169	ulong start;
	170
	171	debug("meson i2c: %s addr %u len %u\n",
	172	(msg->flags & I2C_M_RD) ? "read" : "write",
	173	msg->addr, msg->len);
	174
	175	i2c->msg = msg;
	176	i2c->last = last;
	177	i2c->pos = 0;
	178	i2c->count = 0;
	179
	180	meson_i2c_reset_tokens(i2c);
	181	meson_i2c_do_start(i2c, msg);
	182
	183	do {
	184	meson_i2c_prepare_xfer(i2c);
	185
	186	/* start the transfer */
	187	setbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
	188	start = get_timer(0);
	189	while (readl(&i2c->regs->ctrl) & REG_CTRL_STATUS) {
	190	if (get_timer(start) > I2C_TIMEOUT_MS) {
191	clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
192	debug("meson i2c: timeout\n");
193	return -ETIMEDOUT;
194	}
195	udelay(1);
196	}
197	meson_i2c_reset_tokens(i2c);
198	clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
199
200	if (readl(&i2c->regs->ctrl) & REG_CTRL_ERROR) {
201	debug("meson i2c: error\n");
989bb924	202	return -EREMOTEIO;
f8d9ca18 BG	203	}
	204
	205	if ((msg->flags & I2C_M_RD) && i2c->count) {
	206	meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos,
	207	i2c->count);
	208	}
	209	i2c->pos += i2c->count;
	210	} while (i2c->pos < msg->len);
	211
	212	return 0;
	213	}
	214
	215	static int meson_i2c_xfer(struct udevice bus, struct i2c_msg msg,
	216	int nmsgs)
	217	{
	218	struct meson_i2c *i2c = dev_get_priv(bus);
	219	int i, ret = 0;
	220
	221	for (i = 0; i < nmsgs; i++) {
	222	ret = meson_i2c_xfer_msg(i2c, msg + i, i == nmsgs - 1);
	223	if (ret)
989bb924	224	return ret;
f8d9ca18 BG	225	}
	226
	227	return 0;
	228	}
	229
	230	static int meson_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
	231	{
	232	struct meson_i2c *i2c = dev_get_priv(bus);
2e668af5	233	ulong clk_rate;
f8d9ca18 BG	234	unsigned int div;
f8d9ca18 BG	235
2e668af5 BG	236	clk_rate = clk_get_rate(&i2c->clk);
	237	if (IS_ERR_VALUE(clk_rate))
	238	return -EINVAL;
	239
d82dcc45	240	div = DIV_ROUND_UP(clk_rate, speed * i2c->data->div_factor);
f8d9ca18 BG	241
	242	/* clock divider has 12 bits */
	243	if (div >= (1 << 12)) {
	244	debug("meson i2c: requested bus frequency too low\n");
	245	div = (1 << 12) - 1;
	246	}
	247
	248	clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIV_MASK,
	249	(div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT);
	250
	251	clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIVEXT_MASK,
	252	(div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT);
	253
2e668af5	254	debug("meson i2c: set clk %u, src %lu, div %u\n", speed, clk_rate, div);
f8d9ca18 BG	255
	256	return 0;
	257	}
	258
	259	static int meson_i2c_probe(struct udevice *bus)
	260	{
	261	struct meson_i2c *i2c = dev_get_priv(bus);
2e668af5 BG	262	int ret;
2e668af5 BG	263
d82dcc45 GLR	264	i2c->data = (const struct meson_i2c_data *)dev_get_driver_data(bus);
d82dcc45 GLR	265
2e668af5 BG	266	ret = clk_get_by_index(bus, 0, &i2c->clk);
	267	if (ret < 0)
	268	return ret;
	269
	270	ret = clk_enable(&i2c->clk);
	271	if (ret)
	272	return ret;
f8d9ca18 BG	273
	274	i2c->regs = dev_read_addr_ptr(bus);
	275	clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
	276
	277	return 0;
	278	}
	279
	280	static const struct dm_i2c_ops meson_i2c_ops = {
	281	.xfer = meson_i2c_xfer,
	282	.set_bus_speed = meson_i2c_set_bus_speed,
	283	};
	284
d82dcc45 GLR	285	static const struct meson_i2c_data i2c_meson6_data = {
	286	.div_factor = 4,
	287	};
	288
	289	static const struct meson_i2c_data i2c_gxbb_data = {
	290	.div_factor = 4,
	291	};
	292
	293	static const struct meson_i2c_data i2c_axg_data = {
	294	.div_factor = 3,
	295	};
	296
f8d9ca18	297	static const struct udevice_id meson_i2c_ids[] = {
d82dcc45 GLR	298	{.compatible = "amlogic,meson6-i2c", .data = (ulong)&i2c_meson6_data},
	299	{.compatible = "amlogic,meson-gx-i2c", .data = (ulong)&i2c_gxbb_data},
	300	{.compatible = "amlogic,meson-gxbb-i2c", .data = (ulong)&i2c_gxbb_data},
	301	{.compatible = "amlogic,meson-axg-i2c", .data = (ulong)&i2c_axg_data},
	302	{}
f8d9ca18 BG	303	};
	304
	305	U_BOOT_DRIVER(i2c_meson) = {
	306	.name = "i2c_meson",
	307	.id = UCLASS_I2C,
	308	.of_match = meson_i2c_ids,
	309	.probe = meson_i2c_probe,
41575d8e	310	.priv_auto = sizeof(struct meson_i2c),
f8d9ca18 BG	311	.ops = &meson_i2c_ops,
f8d9ca18 BG	312	};