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1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | |
3 | * (C) Copyright 2019 | |
4 | * Cortina Access, <www.cortina-access.com> | |
5 | */ | |
6 | ||
7 | #ifndef __CA_I2C_H_ | |
8 | #define __CA_I2C_H_ | |
9 | ||
10 | #include <linux/bitops.h> | |
11 | #include <linux/delay.h> | |
12 | ||
13 | #if !defined(__ASSEMBLER__) && !defined(__ASSEMBLY__) | |
14 | struct i2c_regs { | |
15 | u32 i2c_cfg; | |
16 | u32 i2c_ctrl; | |
17 | u32 i2c_txr; | |
18 | u32 i2c_rxr; | |
19 | u32 i2c_ack; | |
20 | u32 i2c_ie0; | |
21 | u32 i2c_int0; | |
22 | u32 i2c_ie1; | |
23 | u32 i2c_int1; | |
24 | u32 i2c_stat; | |
25 | }; | |
26 | ||
27 | union ca_biw_cfg { | |
28 | struct biw_cfg { | |
29 | u32 core_en : 1; | |
30 | u32 biw_soft_reset : 1; | |
31 | u32 busywait_en : 1; | |
32 | u32 stretch_en : 1; | |
33 | u32 arb_en : 1; | |
34 | u32 clksync_en : 1; | |
35 | u32 rsrvd1 : 2; | |
36 | u32 spike_cnt : 4; | |
37 | u32 rsrvd2 : 4; | |
38 | u32 prer : 16; | |
39 | } bf; | |
40 | unsigned int wrd; | |
41 | }; | |
42 | ||
43 | union ca_biw_ctrl { | |
44 | struct biw_ctrl { | |
45 | u32 biwdone : 1; | |
46 | u32 rsrvd1 : 2; | |
47 | u32 ack_in : 1; | |
48 | u32 write : 1; | |
49 | u32 read : 1; | |
50 | u32 stop : 1; | |
51 | u32 start : 1; | |
52 | u32 rsrvd2 : 24; | |
53 | } bf; | |
54 | unsigned int wrd; | |
55 | }; | |
56 | ||
57 | union ca_biw_ack { | |
58 | struct biw_ack { | |
59 | u32 al :1; | |
60 | u32 biw_busy :1; | |
61 | u32 ack_out :1; | |
62 | u32 rsrvd1 :29; | |
63 | } bf; | |
64 | unsigned int wrd; | |
65 | }; | |
66 | #endif /* !__ASSEMBLER__*/ | |
67 | ||
68 | struct ca_i2c { | |
69 | struct i2c_regs *regs; | |
70 | unsigned int speed; | |
71 | }; | |
72 | ||
73 | #define I2C_CMD_WT 0 | |
74 | #define I2C_CMD_RD 1 | |
75 | ||
76 | #define BIW_CTRL_DONE BIT(0) | |
77 | #define BIW_CTRL_ACK_IN BIT(3) | |
78 | #define BIW_CTRL_WRITE BIT(4) | |
79 | #define BIW_CTRL_READ BIT(5) | |
80 | #define BIW_CTRL_STOP BIT(6) | |
81 | #define BIW_CTRL_START BIT(7) | |
82 | ||
83 | #define I2C_BYTE_TO (CONFIG_SYS_HZ / 500) | |
84 | #define I2C_STOPDET_TO (CONFIG_SYS_HZ / 500) | |
85 | #define I2C_BYTE_TO_BB (10) | |
86 | ||
87 | #endif /* __CA_I2C_H_ */ |