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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
4a442d31 TL |
2 | /* |
3 | * | |
4 | * (C) Copyright 2000-2003 | |
5 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
6 | * | |
c6d88630 | 7 | * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. |
4a442d31 | 8 | * TsiChung Liew ([email protected]) |
4a442d31 TL |
9 | */ |
10 | ||
11 | #include <common.h> | |
691d719d | 12 | #include <init.h> |
90526e9f | 13 | #include <net.h> |
2189d5f1 | 14 | #include <vsprintf.h> |
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15 | #include <watchdog.h> |
16 | #include <command.h> | |
89973f8a | 17 | #include <netdev.h> |
401d1c4f | 18 | #include <asm/global_data.h> |
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19 | |
20 | #include <asm/immap.h> | |
c6d88630 | 21 | #include <asm/io.h> |
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22 | |
23 | DECLARE_GLOBAL_DATA_PTR; | |
24 | ||
09140113 | 25 | int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) |
4a442d31 | 26 | { |
c6d88630 | 27 | ccm_t *ccm = (ccm_t *) MMAP_CCM; |
4a442d31 | 28 | |
c6d88630 | 29 | out_8(&ccm->rcr, CCM_RCR_SOFTRST); |
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30 | /* we don't return! */ |
31 | return 0; | |
c6d88630 | 32 | } |
4a442d31 | 33 | |
b9153fe3 AD |
34 | #if defined(CONFIG_DISPLAY_CPUINFO) |
35 | int print_cpuinfo(void) | |
4a442d31 | 36 | { |
c6d88630 | 37 | ccm_t *ccm = (ccm_t *) MMAP_CCM; |
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38 | u16 msk; |
39 | u16 id = 0; | |
40 | u8 ver; | |
41 | ||
42 | puts("CPU: "); | |
c6d88630 AW |
43 | msk = (in_be16(&ccm->cir) >> 6); |
44 | ver = (in_be16(&ccm->cir) & 0x003f); | |
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45 | switch (msk) { |
46 | case 0x31: | |
47 | id = 5235; | |
48 | break; | |
49 | } | |
50 | ||
51 | if (id) { | |
08ef89ec WD |
52 | char buf1[32], buf2[32]; |
53 | ||
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54 | printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk, |
55 | ver); | |
08ef89ec | 56 | printf(" CPU CLK %s MHz BUS CLK %s MHz\n", |
1b270844 TL |
57 | strmhz(buf1, gd->cpu_clk), |
58 | strmhz(buf2, gd->bus_clk)); | |
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59 | } |
60 | ||
61 | return 0; | |
62 | }; | |
b9153fe3 | 63 | #endif /* CONFIG_DISPLAY_CPUINFO */ |
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64 | |
65 | #if defined(CONFIG_WATCHDOG) | |
66 | /* Called by macro WATCHDOG_RESET */ | |
67 | void watchdog_reset(void) | |
68 | { | |
c6d88630 | 69 | wdog_t *wdp = (wdog_t *) (MMAP_WDOG); |
4a442d31 | 70 | |
c6d88630 AW |
71 | /* Count register */ |
72 | out_be16(&wdp->sr, 0x5555); | |
4a442d31 | 73 | asm("nop"); |
c6d88630 | 74 | out_be16(&wdp->sr, 0xaaaa); |
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75 | } |
76 | ||
77 | int watchdog_disable(void) | |
78 | { | |
c6d88630 | 79 | wdog_t *wdp = (wdog_t *) (MMAP_WDOG); |
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80 | |
81 | /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */ | |
c6d88630 AW |
82 | /* halted watchdog timer */ |
83 | setbits_be16(&wdp->cr, WTM_WCR_HALTED); | |
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84 | |
85 | puts("WATCHDOG:disabled\n"); | |
86 | return (0); | |
87 | } | |
88 | ||
89 | int watchdog_init(void) | |
90 | { | |
c6d88630 | 91 | wdog_t *wdp = (wdog_t *) (MMAP_WDOG); |
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92 | u32 wdog_module = 0; |
93 | ||
94 | /* set timeout and enable watchdog */ | |
7102d324 | 95 | wdog_module = ((CFG_SYS_CLK / CONFIG_SYS_HZ) * CONFIG_WATCHDOG_TIMEOUT_MSECS); |
4a442d31 | 96 | wdog_module |= (wdog_module / 8192); |
c6d88630 | 97 | out_be16(&wdp->mr, wdog_module); |
4a442d31 | 98 | |
c6d88630 | 99 | out_be16(&wdp->cr, WTM_WCR_EN); |
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100 | puts("WATCHDOG:enabled\n"); |
101 | ||
102 | return (0); | |
103 | } | |
104 | #endif /* CONFIG_WATCHDOG */ | |
86882b80 BW |
105 | |
106 | #if defined(CONFIG_MCFFEC) | |
107 | /* Default initializations for MCFFEC controllers. To override, | |
108 | * create a board-specific function called: | |
0cf207ec | 109 | * int board_eth_init(struct bd_info *bis) |
86882b80 BW |
110 | */ |
111 | ||
b75d8dc5 | 112 | int cpu_eth_init(struct bd_info *bis) |
86882b80 BW |
113 | { |
114 | return mcffec_initialize(bis); | |
115 | } | |
116 | #endif |