[J-u-boot.git] / include / configs / km / km_arm.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * (C) Copyright 2009
 * Marvell Semiconductor <www.marvell.com>
 * Prafulla Wadaskar <[email protected]>
 *
 * (C) Copyright 2009
 * Stefan Roese, DENX Software Engineering, [email protected].
 *
 * (C) Copyright 2010-2011
 * Heiko Schocher, DENX Software Engineering, [email protected].
 */

/*
 * for linking errors see
 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
 */

#ifndef _CONFIG_KM_ARM_H
#define _CONFIG_KM_ARM_H

/*
 * High Level Configuration Options (easy to change)
 */
#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
#define CONFIG_KW88F6281		/* SOC Name */

#define CONFIG_MACH_TYPE	MACH_TYPE_KM_KIRKWOOD

#define CONFIG_NAND_ECC_BCH

/* include common defines/options for all Keymile boards */
#include "keymile-common.h"

/* SPI NOR Flash default params, used by sf commands */

/* Reserve 4 MB for malloc */
#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)

#include "asm/arch/config.h"

#define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
#define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
#define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */

/* pseudo-non volatile RAM [hex] */
#define CONFIG_KM_PNVRAM	0x80000
/* physical RAM MTD size [hex] */
#define CONFIG_KM_PHRAM		0x17F000

#define CONFIG_KM_CRAMFS_ADDR	0x2400000
#define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 3098KBytes */
#define CONFIG_KM_FDT_ADDR	0x23E0000	/*  128KBytes */

/* architecture specific default bootargs */
#define CONFIG_KM_DEF_BOOT_ARGS_CPU					\
		"bootcountaddr=${bootcountaddr} ${mtdparts}"		\
		" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"

#define CONFIG_KM_DEF_ENV_CPU						\
	"u-boot="CONFIG_HOSTNAME "/u-boot.kwb\0"		\
	CONFIG_KM_UPDATE_UBOOT						\
	"set_fdthigh=setenv fdt_high ${kernelmem}\0"			\
	"checkfdt="							\
		"if cramfsls fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; "	\
		"then true; else setenv cramfsloadfdt true; "		\
		"setenv boot bootm ${load_addr_r}; "			\
		"echo No FDT found, booting with the kernel "		\
		"appended one; fi\0"					\
	""

#define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */

/*
 * NS16550 Configuration
 */
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
#define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE
#define CONFIG_SYS_NS16550_COM2		KW_UART1_BASE

/*
 * Serial Port configuration
 * The following definitions let you select what serial you want to use
 * for your console driver.
 */

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CONFIG_BOOTMAPSZ	(8 << 20)	/* Initial Memmap for Linux */
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
#define CONFIG_INITRD_TAG		/* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS	/* enable memory tag */

/*
 * NAND Flash configuration
 */
#define CONFIG_SYS_MAX_NAND_DEVICE	1

#define BOOTFLASH_START		0x0

/* Kirkwood has two serial IF */
#if (CONFIG_CONS_INDEX == 2)
#define CONFIG_KM_CONSOLE_TTY	"ttyS1"
#else
#define CONFIG_KM_CONSOLE_TTY	"ttyS0"
#endif

/*
 * Other required minimal configurations
 */
#define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init() */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */

/*
 * Ethernet Driver configuration
 */
#define CONFIG_NETCONSOLE	/* include NetConsole support   */
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
#define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
#define CONFIG_PHY_BASE_ADR	0
#define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
#define CONFIG_KM_COMMON_ETH_INIT 1 /* standard km ethernet_present for piggy */

/*
 * I2C related stuff
 */
#undef CONFIG_I2C_MVTWSI
#define CONFIG_SYS_I2C
#define	CONFIG_SYS_I2C_SOFT	/* I2C bit-banged	*/
#define CONFIG_SYS_I2C_INIT_BOARD

#define	CONFIG_KIRKWOOD_GPIO		/* Enable GPIO Support */
#define CONFIG_SYS_NUM_I2C_BUSES	6
#define CONFIG_SYS_I2C_MAX_HOPS		1
#define CONFIG_SYS_I2C_BUSES	{	{0, {I2C_NULL_HOP} }, \
					{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
					{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
					{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
					{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
					{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
				}

#ifndef __ASSEMBLY__
#include <asm/arch/gpio.h>
extern void __set_direction(unsigned pin, int high);
void set_sda(int state);
void set_scl(int state);
int get_sda(void);
int get_scl(void);
#define KM_KIRKWOOD_SDA_PIN	8
#define KM_KIRKWOOD_SCL_PIN	9
#define KM_KIRKWOOD_SOFT_I2C_GPIOS	0x0300
#define KM_KIRKWOOD_ENV_WP	38

#define I2C_ACTIVE	__set_direction(KM_KIRKWOOD_SDA_PIN, 0)
#define I2C_TRISTATE	__set_direction(KM_KIRKWOOD_SDA_PIN, 1)
#define I2C_READ	(kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
#define I2C_SDA(bit)	kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
#define I2C_SCL(bit)	kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
#endif

#define I2C_DELAY	udelay(1)
#define I2C_SOFT_DECLARATIONS

#define	CONFIG_SYS_I2C_SOFT_SLAVE	0x0
#define	CONFIG_SYS_I2C_SOFT_SPEED	100000

/* EEprom support 24C128, 24C256 valid for environment eeprom */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6 /* 64 Byte write page */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10

#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2

/*
 *  Environment variables configurations
 */
#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
#define CONFIG_ENV_OFFSET		0xc0000     /* no bracets! */
#define CONFIG_ENV_SIZE			0x02000     /* Size of Environment */
#define CONFIG_ENV_SECT_SIZE		0x10000
#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + \
					CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_TOTAL_SIZE		0x20000     /* no bracets! */
#else
#define CONFIG_SYS_DEF_EEPROM_ADDR	0x50
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_EEPROM_WREN
#define CONFIG_ENV_OFFSET		0x0 /* no bracets! */
#define CONFIG_ENV_SIZE			(0x2000 - CONFIG_ENV_OFFSET)
#define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */
#define CONFIG_ENV_OFFSET_REDUND	0x2000 /* no bracets! */
#define CONFIG_ENV_SIZE_REDUND		(CONFIG_ENV_SIZE)
#endif

#define CONFIG_SYS_REDUNDAND_ENVIRONMENT

#define KM_FLASH_GPIO_PIN	16

#define	CONFIG_KM_UPDATE_UBOOT						\
	"update="							\
		"sf probe 0;sf erase 0 +${filesize};"			\
		"sf write ${load_addr_r} 0 ${filesize};\0"

#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
#define CONFIG_KM_NEW_ENV						\
	"newenv=sf probe 0;"						\
		"sf erase " __stringify(CONFIG_ENV_OFFSET) " "		\
		__stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
#else
#define CONFIG_KM_NEW_ENV						\
	"newenv=setenv addr 0x100000 && "				\
		"i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; "  \
		"mw.b ${addr} 0 4 && "					\
		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
		" ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && "	\
		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
		" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
#endif

#ifndef CONFIG_KM_BOARD_EXTRA_ENV
#define CONFIG_KM_BOARD_EXTRA_ENV       ""
#endif

/*
 * Default environment variables
 */
#define CONFIG_EXTRA_ENV_SETTINGS					\
	CONFIG_KM_BOARD_EXTRA_ENV					\
	CONFIG_KM_DEF_ENV						\
	CONFIG_KM_NEW_ENV						\
	"arch=arm\0"							\
	""

#if !defined(CONFIG_MTD_NOR_FLASH)
#undef	CONFIG_JFFS2_CMDLINE
#endif

/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE		0x00000000
/* Do early setups now in board_init_f() */

/*
 * resereved pram area at the end of memroy [hex]
 * 8Mbytes for switch + 4Kbytes for bootcount
 */
#define CONFIG_KM_RESERVED_PRAM 0x801000
/* address for the bootcount (taken from end of RAM) */
#define BOOTCOUNT_ADDR          (CONFIG_KM_RESERVED_PRAM)

/* enable POST tests */
#define CONFIG_POST	(CONFIG_SYS_POST_MEM_REGIONS)
#define CONFIG_POST_SKIP_ENV_FLAGS
#define CONFIG_POST_EXTERNAL_WORD_FUNCS

/* we do the whole PCIe FPGA config stuff here */

#endif /* _CONFIG_KM_ARM_H */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
67fa8c25 HS	2	/*
	3	* (C) Copyright 2009
	4	* Marvell Semiconductor <www.marvell.com>
	5	* Prafulla Wadaskar <[email protected]>
	6	*
	7	* (C) Copyright 2009
	8	* Stefan Roese, DENX Software Engineering, [email protected].
	9	*
b11f53f3 HS	10	* (C) Copyright 2010-2011
b11f53f3 HS	11	* Heiko Schocher, DENX Software Engineering, [email protected].
67fa8c25 HS	12	*/
67fa8c25 HS	13
b11f53f3 HS	14	/*
	15	* for linking errors see
	16	* http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
	17	*/
67fa8c25 HS	18
	19	#ifndef _CONFIG_KM_ARM_H
	20	#define _CONFIG_KM_ARM_H
	21
	22	/*
	23	* High Level Configuration Options (easy to change)
	24	*/
67fa8c25	25	#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
67fa8c25	26	#define CONFIG_KW88F6281 /* SOC Name */
67fa8c25	27
8620ca2a VL	28	#define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD
8620ca2a VL	29
dfeafde4	30	#define CONFIG_NAND_ECC_BCH
dfeafde4	31
67fa8c25 HS	32	/* include common defines/options for all Keymile boards */
67fa8c25 HS	33	#include "keymile-common.h"
de3ad13d	34
f46b4a1a	35	/* SPI NOR Flash default params, used by sf commands */
f46b4a1a	36
ac5b00e0 VL	37	/* Reserve 4 MB for malloc */
	38	#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
	39
b5befd82 HB	40	#include "asm/arch/config.h"
b5befd82 HB	41
de3ad13d HB	42	#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
	43	#define CONFIG_SYS_MEMTEST_END 0x007fffff /(_8M -1) /
	44	#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
	45
	46	/* pseudo-non volatile RAM [hex] */
	47	#define CONFIG_KM_PNVRAM 0x80000
	48	/* physical RAM MTD size [hex] */
	49	#define CONFIG_KM_PHRAM 0x17F000
	50
	51	#define CONFIG_KM_CRAMFS_ADDR 0x2400000
7b2268b8 GF	52	#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 3098KBytes */
7b2268b8 GF	53	#define CONFIG_KM_FDT_ADDR 0x23E0000 /* 128KBytes */
de3ad13d	54
db0bb572 HB	55	/* architecture specific default bootargs */
db0bb572 HB	56	#define CONFIG_KM_DEF_BOOT_ARGS_CPU \
66072a8c HB	57	"bootcountaddr=${bootcountaddr} ${mtdparts}" \
66072a8c HB	58	" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
db0bb572	59
de3ad13d	60	#define CONFIG_KM_DEF_ENV_CPU \
5bc0543d	61	"u-boot="CONFIG_HOSTNAME "/u-boot.kwb\0" \
af85f085	62	CONFIG_KM_UPDATE_UBOOT \
b1c2a7ae	63	"set_fdthigh=setenv fdt_high ${kernelmem}\0" \
c6d32dfd VL	64	"checkfdt=" \
	65	"if cramfsls fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; " \
	66	"then true; else setenv cramfsloadfdt true; " \
	67	"setenv boot bootm ${load_addr_r}; " \
	68	"echo No FDT found, booting with the kernel " \
	69	"appended one; fi\0" \
de3ad13d HB	70	""
de3ad13d HB	71
67fa8c25	72	#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
67fa8c25 HS	73
	74	/*
	75	* NS16550 Configuration
	76	*/
67fa8c25 HS	77	#define CONFIG_SYS_NS16550_SERIAL
	78	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	79	#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
	80	#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
3d3c7096	81	#define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE
67fa8c25 HS	82
	83	/*
	84	* Serial Port configuration
	85	* The following definitions let you select what serial you want to use
	86	* for your console driver.
	87	*/
	88
67fa8c25 HS	89	/*
	90	* For booting Linux, the board info and command line data
	91	* have to be in the first 8 MB of memory, since this is
	92	* the maximum mapped by the Linux kernel during initialization.
	93	*/
	94	#define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */
	95	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	96	#define CONFIG_INITRD_TAG /* enable INITRD tag */
499b1a4d	97	#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
67fa8c25	98
67fa8c25 HS	99	/*
	100	* NAND Flash configuration
	101	*/
	102	#define CONFIG_SYS_MAX_NAND_DEVICE 1
67fa8c25 HS	103
	104	#define BOOTFLASH_START 0x0
	105
3d3c7096 HB	106	/* Kirkwood has two serial IF */
	107	#if (CONFIG_CONS_INDEX == 2)
	108	#define CONFIG_KM_CONSOLE_TTY "ttyS1"
	109	#else
67fa8c25	110	#define CONFIG_KM_CONSOLE_TTY "ttyS0"
3d3c7096	111	#endif
67fa8c25	112
67fa8c25 HS	113	/*
	114	* Other required minimal configurations
	115	*/
67fa8c25	116	#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
67fa8c25 HS	117	#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
	118
	119	/*
	120	* Ethernet Driver configuration
	121	*/
	122	#define CONFIG_NETCONSOLE /* include NetConsole support */
67fa8c25	123	#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
d44265ad	124	#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
67fa8c25 HS	125	#define CONFIG_PHY_BASE_ADR 0
67fa8c25 HS	126	#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
707f06f3	127	#define CONFIG_KM_COMMON_ETH_INIT 1 /* standard km ethernet_present for piggy */
67fa8c25	128
67fa8c25 HS	129	/*
	130	* I2C related stuff
	131	*/
ea818dbb HS	132	#undef CONFIG_I2C_MVTWSI
	133	#define CONFIG_SYS_I2C
	134	#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
0a4f88b9	135	#define CONFIG_SYS_I2C_INIT_BOARD
ea818dbb	136
67fa8c25	137	#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */
ea818dbb HS	138	#define CONFIG_SYS_NUM_I2C_BUSES 6
	139	#define CONFIG_SYS_I2C_MAX_HOPS 1
	140	#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
	141	{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
	142	{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
	143	{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
	144	{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
	145	{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
	146	}
	147
67fa8c25	148	#ifndef __ASSEMBLY__
ea385723	149	#include <asm/arch/gpio.h>
67fa8c25	150	extern void __set_direction(unsigned pin, int high);
499b1a4d HB	151	void set_sda(int state);
	152	void set_scl(int state);
	153	int get_sda(void);
	154	int get_scl(void);
44097e26 HS	155	#define KM_KIRKWOOD_SDA_PIN 8
44097e26 HS	156	#define KM_KIRKWOOD_SCL_PIN 9
c471d848	157	#define KM_KIRKWOOD_SOFT_I2C_GPIOS 0x0300
44097e26 HS	158	#define KM_KIRKWOOD_ENV_WP 38
	159
	160	#define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0)
	161	#define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1)
	162	#define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
	163	#define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
	164	#define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
67fa8c25 HS	165	#endif
67fa8c25 HS	166
9e9c6d7c	167	#define I2C_DELAY udelay(1)
67fa8c25 HS	168	#define I2C_SOFT_DECLARATIONS
67fa8c25 HS	169
ea818dbb HS	170	#define CONFIG_SYS_I2C_SOFT_SLAVE 0x0
ea818dbb HS	171	#define CONFIG_SYS_I2C_SOFT_SPEED 100000
67fa8c25	172
4daea6ff	173	/* EEprom support 24C128, 24C256 valid for environment eeprom */
4daea6ff SB	174	#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
	175	#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */
	176	#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
	177
67fa8c25 HS	178	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
	179	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
	180
331a30dc HS	181	/*
	182	* Environment variables configurations
	183	*/
8170aefc	184	#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
8170aefc HB	185	#define CONFIG_ENV_OFFSET 0xc0000 /* no bracets! */
	186	#define CONFIG_ENV_SIZE 0x02000 /* Size of Environment */
	187	#define CONFIG_ENV_SECT_SIZE 0x10000
	188	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
	189	CONFIG_ENV_SECT_SIZE)
	190	#define CONFIG_ENV_TOTAL_SIZE 0x20000 /* no bracets! */
	191	#else
331a30dc HS	192	#define CONFIG_SYS_DEF_EEPROM_ADDR 0x50
	193	#define CONFIG_ENV_EEPROM_IS_ON_I2C
	194	#define CONFIG_SYS_EEPROM_WREN
	195	#define CONFIG_ENV_OFFSET 0x0 /* no bracets! */
331a30dc	196	#define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET)
716e4ffe	197	#define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */
331a30dc HS	198	#define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */
331a30dc HS	199	#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
8170aefc HB	200	#endif
	201
	202	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
331a30dc	203
0c25defc	204	#define KM_FLASH_GPIO_PIN 16
331a30dc	205
af85f085	206	#define CONFIG_KM_UPDATE_UBOOT \
331a30dc	207	"update=" \
0c25defc VL	208	"sf probe 0;sf erase 0 +${filesize};" \
0c25defc VL	209	"sf write ${load_addr_r} 0 ${filesize};\0"
331a30dc	210
8170aefc HB	211	#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
	212	#define CONFIG_KM_NEW_ENV \
	213	"newenv=sf probe 0;" \
93ea89f0 MV	214	"sf erase " __stringify(CONFIG_ENV_OFFSET) " " \
93ea89f0 MV	215	__stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
8170aefc HB	216	#else
8170aefc HB	217	#define CONFIG_KM_NEW_ENV \
ea616d4d	218	"newenv=setenv addr 0x100000 && " \
67bfae36 HB	219	"i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; " \
67bfae36 HB	220	"mw.b ${addr} 0 4 && " \
93ea89f0 MV	221	"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
	222	" ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && " \
	223	"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
	224	" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
8170aefc HB	225	#endif
8170aefc HB	226
56cde177 HB	227	#ifndef CONFIG_KM_BOARD_EXTRA_ENV
	228	#define CONFIG_KM_BOARD_EXTRA_ENV ""
	229	#endif
	230
8170aefc HB	231	/*
	232	* Default environment variables
	233	*/
	234	#define CONFIG_EXTRA_ENV_SETTINGS \
56cde177	235	CONFIG_KM_BOARD_EXTRA_ENV \
8170aefc HB	236	CONFIG_KM_DEF_ENV \
8170aefc HB	237	CONFIG_KM_NEW_ENV \
b648bfc2	238	"arch=arm\0" \
ea616d4d VL	239	""
ea616d4d VL	240
e856bdcf	241	#if !defined(CONFIG_MTD_NOR_FLASH)
67fa8c25 HS	242	#undef CONFIG_JFFS2_CMDLINE
	243	#endif
	244
a784c01a	245	/* additions for new relocation code, must be added to all boards */
ab86f72c	246	#define CONFIG_SYS_SDRAM_BASE 0x00000000
6b0ccc3b	247	/* Do early setups now in board_init_f() */
f1fef1d8 HS	248
	249	/*
	250	* resereved pram area at the end of memroy [hex]
	251	* 8Mbytes for switch + 4Kbytes for bootcount
	252	*/
	253	#define CONFIG_KM_RESERVED_PRAM 0x801000
a21b5d4b HB	254	/* address for the bootcount (taken from end of RAM) */
a21b5d4b HB	255	#define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM)
f1fef1d8	256
9400f8fa VL	257	/* enable POST tests */
	258	#define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS)
	259	#define CONFIG_POST_SKIP_ENV_FLAGS
	260	#define CONFIG_POST_EXTERNAL_WORD_FUNCS
9400f8fa	261
b37f7724	262	/* we do the whole PCIe FPGA config stuff here */
b37f7724	263
67fa8c25	264	#endif /* _CONFIG_KM_ARM_H */