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2bae75a4 SR |
1 | /* |
2 | * Copyright (C) 2014 Stefan Roese <[email protected]> | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #ifndef _CONFIG_DB_88F6820_GP_H | |
8 | #define _CONFIG_DB_88F6820_GP_H | |
9 | ||
10 | /* | |
11 | * High Level Configuration Options (easy to change) | |
12 | */ | |
2bae75a4 | 13 | |
2bae75a4 SR |
14 | #define CONFIG_DISPLAY_BOARDINFO_LATE |
15 | ||
2923c2d2 SR |
16 | /* |
17 | * TEXT_BASE needs to be below 16MiB, since this area is scrubbed | |
18 | * for DDR ECC byte filling in the SPL before loading the main | |
19 | * U-Boot into it. | |
20 | */ | |
2bae75a4 SR |
21 | #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ |
22 | ||
23 | /* | |
24 | * Commands configuration | |
25 | */ | |
2bae75a4 SR |
26 | |
27 | /* I2C */ | |
28 | #define CONFIG_SYS_I2C | |
29 | #define CONFIG_SYS_I2C_MVTWSI | |
30 | #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE | |
31 | #define CONFIG_SYS_I2C_SLAVE 0x0 | |
32 | #define CONFIG_SYS_I2C_SPEED 100000 | |
33 | ||
34 | /* SPI NOR flash default params, used by sf commands */ | |
35 | #define CONFIG_SF_DEFAULT_SPEED 1000000 | |
36 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 | |
2bae75a4 | 37 | |
e80f1e85 SR |
38 | /* |
39 | * SDIO/MMC Card Configuration | |
40 | */ | |
e80f1e85 SR |
41 | #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE |
42 | ||
7cbaff95 SR |
43 | /* |
44 | * SATA/SCSI/AHCI configuration | |
45 | */ | |
7cbaff95 SR |
46 | #define CONFIG_SCSI_AHCI_PLAT |
47 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 | |
48 | #define CONFIG_SYS_SCSI_MAX_LUN 1 | |
49 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ | |
50 | CONFIG_SYS_SCSI_MAX_LUN) | |
51 | ||
59565736 | 52 | /* USB/EHCI configuration */ |
59565736 SR |
53 | #define CONFIG_EHCI_IS_TDI |
54 | ||
2bae75a4 | 55 | /* Environment in SPI NOR flash */ |
2bae75a4 SR |
56 | #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ |
57 | #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ | |
58 | #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ | |
59 | ||
60 | #define CONFIG_PHY_MARVELL /* there is a marvell phy */ | |
2bae75a4 SR |
61 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ |
62 | ||
ce2cb1d3 | 63 | /* PCIe support */ |
6451223a | 64 | #ifndef CONFIG_SPL_BUILD |
ce2cb1d3 | 65 | #define CONFIG_PCI_MVEBU |
ce2cb1d3 | 66 | #define CONFIG_PCI_SCAN_SHOW |
6451223a | 67 | #endif |
ce2cb1d3 | 68 | |
2bae75a4 SR |
69 | #define CONFIG_SYS_ALT_MEMTEST |
70 | ||
3fd38af7 KS |
71 | /* Keep device tree and initrd in lower memory so the kernel can access them */ |
72 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
73 | "fdt_high=0x10000000\0" \ | |
74 | "initrd_high=0x10000000\0" | |
75 | ||
9e30b31d | 76 | /* SPL */ |
7853c508 SR |
77 | /* |
78 | * Select the boot device here | |
79 | * | |
80 | * Currently supported are: | |
81 | * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash | |
82 | * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) | |
83 | */ | |
84 | #define SPL_BOOT_SPI_NOR_FLASH 1 | |
85 | #define SPL_BOOT_SDIO_MMC_CARD 2 | |
86 | #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH | |
87 | ||
9e30b31d | 88 | /* Defines for SPL */ |
9e30b31d SR |
89 | #define CONFIG_SPL_SIZE (140 << 10) |
90 | #define CONFIG_SPL_TEXT_BASE 0x40000030 | |
91 | #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) | |
92 | ||
93 | #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) | |
94 | #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) | |
95 | ||
6451223a SR |
96 | #ifdef CONFIG_SPL_BUILD |
97 | #define CONFIG_SYS_MALLOC_SIMPLE | |
98 | #endif | |
9e30b31d SR |
99 | |
100 | #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) | |
101 | #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) | |
102 | ||
7853c508 | 103 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH |
9e30b31d | 104 | /* SPL related SPI defines */ |
9e30b31d | 105 | #define CONFIG_SPL_SPI_LOAD |
09a54c00 | 106 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000 |
7853c508 SR |
107 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS |
108 | #endif | |
109 | ||
110 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD | |
111 | /* SPL related MMC defines */ | |
7853c508 SR |
112 | #define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) |
113 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS | |
7853c508 SR |
114 | #ifdef CONFIG_SPL_BUILD |
115 | #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ | |
116 | #endif | |
117 | #endif | |
9e30b31d | 118 | |
2bae75a4 SR |
119 | /* |
120 | * mv-common.h should be defined after CMD configs since it used them | |
121 | * to enable certain macros | |
122 | */ | |
123 | #include "mv-common.h" | |
124 | ||
125 | #endif /* _CONFIG_DB_88F6820_GP_H */ |