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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
8e4ab1d5 AS |
2 | /* |
3 | * Copyright (C) 2013 Samsung Electronics | |
4 | * | |
5 | * Configuration settings for the SAMSUNG/GOOGLE PEACH-PIT board. | |
8e4ab1d5 AS |
6 | */ |
7 | ||
8 | #ifndef __CONFIG_PEACH_PIT_H | |
9 | #define __CONFIG_PEACH_PIT_H | |
10 | ||
d7e1f02e SS |
11 | #define MEM_LAYOUT_ENV_SETTINGS \ |
12 | "bootm_size=0x10000000\0" \ | |
13 | "kernel_addr_r=0x22000000\0" \ | |
14 | "fdt_addr_r=0x23000000\0" \ | |
15 | "ramdisk_addr_r=0x23300000\0" \ | |
16 | "scriptaddr=0x30000000\0" \ | |
17 | "pxefile_addr_r=0x31000000\0" | |
18 | ||
87033d4d | 19 | #include <configs/exynos5420-common.h> |
7d159536 | 20 | #include <configs/exynos5-dt-common.h> |
bf637ea5 | 21 | #include <configs/exynos5-common.h> |
8e4ab1d5 | 22 | |
43900da8 | 23 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
43900da8 HH |
24 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) |
25 | ||
8e4ab1d5 | 26 | /* select serial console configuration */ |
43900da8 | 27 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" |
8e4ab1d5 | 28 | |
43581c83 | 29 | /* DRAM Memory Banks */ |
43581c83 AS |
30 | #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ |
31 | ||
8e4ab1d5 | 32 | #endif /* __CONFIG_PEACH_PIT_H */ |