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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
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2 | /* |
3 | * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG | |
4 | * Patrick Bruenn <[email protected]> | |
5 | * | |
6 | * Configuration settings for Beckhoff CX9020. | |
7 | * | |
8 | * Based on Freescale's Linux i.MX mx53loco.h file: | |
9 | * Copyright (C) 2010-2011 Freescale Semiconductor. | |
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10 | */ |
11 | ||
12 | #ifndef __CONFIG_H | |
13 | #define __CONFIG_H | |
14 | ||
15 | #include <asm/arch/imx-regs.h> | |
16 | ||
17 | #define CONFIG_CMDLINE_TAG | |
18 | #define CONFIG_SETUP_MEMORY_TAGS | |
19 | #define CONFIG_INITRD_TAG | |
20 | ||
21 | #define CONFIG_SYS_FSL_CLK | |
22 | ||
23 | /* Size of malloc() pool */ | |
943be159 | 24 | #define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024) |
98d62e61 | 25 | |
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26 | #define CONFIG_REVISION_TAG |
27 | ||
28 | #define CONFIG_MXC_UART_BASE UART2_BASE | |
29 | ||
30 | #define CONFIG_FPGA_COUNT 1 | |
31 | ||
32 | /* MMC Configs */ | |
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33 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
34 | #define CONFIG_SYS_FSL_ESDHC_NUM 2 | |
35 | ||
98d62e61 | 36 | /* bootz: zImage/initrd.img support */ |
98d62e61 | 37 | |
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38 | |
39 | /* USB Configs */ | |
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40 | #define CONFIG_MXC_USB_PORT 1 |
41 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
42 | #define CONFIG_MXC_USB_FLAGS 0 | |
43 | ||
44 | /* allow to overwrite serial and ethaddr */ | |
45 | #define CONFIG_ENV_OVERWRITE | |
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46 | |
47 | /* Command definition */ | |
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48 | |
49 | #define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */ | |
98d62e61 | 50 | |
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51 | #define BOOT_TARGET_DEVICES(func) \ |
52 | func(MMC, mmc, 0) \ | |
53 | func(MMC, mmc, 1) \ | |
54 | func(USB, usb, 0) \ | |
55 | func(PXE, pxe, na) | |
56 | ||
57 | #include <config_distro_bootcmd.h> | |
58 | ||
98d62e61 | 59 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
943be159 | 60 | "fdt_addr_r=0x75000000\0" \ |
bc104a70 | 61 | "pxefile_addr_r=0x73000000\0" \ |
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62 | "scriptaddr=0x74000000\0" \ |
63 | "ramdisk_addr_r=0x80000000\0" \ | |
64 | "kernel_addr_r=0x72000000\0" \ | |
65 | "fdt_high=0xffffffff\0" \ | |
98d62e61 | 66 | "console=ttymxc1,115200\0" \ |
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67 | "stdin=serial\0" \ |
68 | "stdout=serial,vidconsole\0" \ | |
69 | "stderr=serial,vidconsole\0" \ | |
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70 | "fdtfile=imx53-cx9020.dtb\0" \ |
71 | BOOTENV | |
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72 | |
73 | #define CONFIG_ARP_TIMEOUT 200UL | |
74 | ||
75 | /* Miscellaneous configurable options */ | |
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76 | #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
77 | ||
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78 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
79 | ||
98d62e61 | 80 | /* Physical Memory Map */ |
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81 | #define PHYS_SDRAM_1 CSD0_BASE_ADDR |
82 | #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) | |
83 | #define PHYS_SDRAM_2 CSD1_BASE_ADDR | |
84 | #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) | |
85 | #define PHYS_SDRAM_SIZE (gd->ram_size) | |
86 | ||
87 | #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) | |
88 | #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) | |
89 | #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) | |
90 | ||
91 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
92 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
93 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
94 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
95 | ||
e856bdcf | 96 | /* environment organization */ |
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97 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
98 | ||
99 | /* Framebuffer and LCD */ | |
29771c2c | 100 | #define CONFIG_IMX_VIDEO_SKIP |
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101 | |
102 | #endif /* __CONFIG_H */ |