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fe8c2806 | 1 | /* |
4707fb50 | 2 | * (C) Copyright 2000-2006 |
fe8c2806 WD |
3 | * Wolfgang Denk, DENX Software Engineering, [email protected]. |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #include <common.h> | |
25 | #include <watchdog.h> | |
26 | #include <command.h> | |
27 | #include <malloc.h> | |
28 | #include <devices.h> | |
fe8c2806 WD |
29 | #ifdef CONFIG_8xx |
30 | #include <mpc8xx.h> | |
31 | #endif | |
0db5bca8 WD |
32 | #ifdef CONFIG_5xx |
33 | #include <mpc5xx.h> | |
34 | #endif | |
cbd8a35c | 35 | #ifdef CONFIG_MPC5xxx |
945af8d7 WD |
36 | #include <mpc5xxx.h> |
37 | #endif | |
7def6b34 | 38 | #if defined(CONFIG_CMD_IDE) |
fe8c2806 WD |
39 | #include <ide.h> |
40 | #endif | |
cd54081c DL |
41 | #if defined(CONFIG_CMD_SATA) |
42 | #include <sata.h> | |
43 | #endif | |
7def6b34 | 44 | #if defined(CONFIG_CMD_SCSI) |
fe8c2806 WD |
45 | #include <scsi.h> |
46 | #endif | |
7def6b34 | 47 | #if defined(CONFIG_CMD_KGDB) |
fe8c2806 WD |
48 | #include <kgdb.h> |
49 | #endif | |
50 | #ifdef CONFIG_STATUS_LED | |
51 | #include <status_led.h> | |
52 | #endif | |
53 | #include <net.h> | |
281e00a3 | 54 | #include <serial.h> |
6d0f6bcf | 55 | #ifdef CONFIG_SYS_ALLOC_DPRAM |
9c4c5ae3 | 56 | #if !defined(CONFIG_CPM2) |
fe8c2806 WD |
57 | #include <commproc.h> |
58 | #endif | |
7aa78614 | 59 | #endif |
fe8c2806 WD |
60 | #include <version.h> |
61 | #if defined(CONFIG_BAB7xx) | |
62 | #include <w83c553f.h> | |
63 | #endif | |
64 | #include <dtt.h> | |
65 | #if defined(CONFIG_POST) | |
66 | #include <post.h> | |
67 | #endif | |
56f94be3 WD |
68 | #if defined(CONFIG_LOGBUFFER) |
69 | #include <logbuff.h> | |
70 | #endif | |
6d0f6bcf | 71 | #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) |
42d1f039 WD |
72 | #include <asm/cache.h> |
73 | #endif | |
1c43771b WD |
74 | #ifdef CONFIG_PS2KBD |
75 | #include <keyboard.h> | |
76 | #endif | |
fe8c2806 | 77 | |
6d0f6bcf | 78 | #ifdef CONFIG_SYS_UPDATE_FLASH_SIZE |
fa230445 HS |
79 | extern int update_flash_size (int flash_size); |
80 | #endif | |
81 | ||
9045f33c | 82 | #if defined(CONFIG_SC3) |
ca43ba18 HS |
83 | extern void sc3_read_eeprom(void); |
84 | #endif | |
85 | ||
7def6b34 | 86 | #if defined(CONFIG_CMD_DOC) |
fe8c2806 WD |
87 | void doc_init (void); |
88 | #endif | |
89 | #if defined(CONFIG_HARD_I2C) || \ | |
90 | defined(CONFIG_SOFT_I2C) | |
91 | #include <i2c.h> | |
92 | #endif | |
04a9e118 | 93 | #include <spi.h> |
d6ac2ed8 | 94 | #include <nand.h> |
fe8c2806 WD |
95 | |
96 | static char *failed = "*** failed ***\n"; | |
97 | ||
17d704eb | 98 | #if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU) |
fe8c2806 | 99 | extern flash_info_t flash_info[]; |
17d704eb | 100 | #endif |
fe8c2806 | 101 | |
ca43ba18 HS |
102 | #if defined(CONFIG_START_IDE) |
103 | extern int board_start_ide(void); | |
104 | #endif | |
fe8c2806 | 105 | #include <environment.h> |
d87080b7 | 106 | |
bce84c4d | 107 | DECLARE_GLOBAL_DATA_PTR; |
fe8c2806 | 108 | |
0e8d1586 | 109 | #if defined(CONFIG_ENV_IS_EMBEDDED) |
6d0f6bcf JCPV |
110 | #define TOTAL_MALLOC_LEN CONFIG_SYS_MALLOC_LEN |
111 | #elif ( ((CONFIG_ENV_ADDR+CONFIG_ENV_SIZE) < CONFIG_SYS_MONITOR_BASE) || \ | |
112 | (CONFIG_ENV_ADDR >= (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)) ) || \ | |
9314cee6 | 113 | defined(CONFIG_ENV_IS_IN_NVRAM) |
6d0f6bcf | 114 | #define TOTAL_MALLOC_LEN (CONFIG_SYS_MALLOC_LEN + CONFIG_ENV_SIZE) |
fe8c2806 | 115 | #else |
6d0f6bcf | 116 | #define TOTAL_MALLOC_LEN CONFIG_SYS_MALLOC_LEN |
fe8c2806 WD |
117 | #endif |
118 | ||
6d0f6bcf JCPV |
119 | #if !defined(CONFIG_SYS_MEM_TOP_HIDE) |
120 | #define CONFIG_SYS_MEM_TOP_HIDE 0 | |
6fb4b640 SR |
121 | #endif |
122 | ||
3b57fe0a WD |
123 | extern ulong __init_end; |
124 | extern ulong _end; | |
3b57fe0a WD |
125 | ulong monitor_flash_len; |
126 | ||
7def6b34 | 127 | #if defined(CONFIG_CMD_BEDBUG) |
8bde7f77 WD |
128 | #include <bedbug/type.h> |
129 | #endif | |
130 | ||
fe8c2806 WD |
131 | /* |
132 | * Begin and End of memory area for malloc(), and current "brk" | |
133 | */ | |
134 | static ulong mem_malloc_start = 0; | |
135 | static ulong mem_malloc_end = 0; | |
136 | static ulong mem_malloc_brk = 0; | |
137 | ||
138 | /************************************************************************ | |
139 | * Utilities * | |
140 | ************************************************************************ | |
141 | */ | |
142 | ||
143 | /* | |
144 | * The Malloc area is immediately below the monitor copy in DRAM | |
145 | */ | |
146 | static void mem_malloc_init (void) | |
147 | { | |
e9514751 | 148 | #if !defined(CONFIG_RELOC_FIXUP_WORKS) |
6d0f6bcf | 149 | mem_malloc_end = CONFIG_SYS_MONITOR_BASE + gd->reloc_off; |
e9514751 SR |
150 | #endif |
151 | mem_malloc_start = mem_malloc_end - TOTAL_MALLOC_LEN; | |
fe8c2806 WD |
152 | mem_malloc_brk = mem_malloc_start; |
153 | ||
154 | memset ((void *) mem_malloc_start, | |
155 | 0, | |
156 | mem_malloc_end - mem_malloc_start); | |
157 | } | |
158 | ||
159 | void *sbrk (ptrdiff_t increment) | |
160 | { | |
161 | ulong old = mem_malloc_brk; | |
162 | ulong new = old + increment; | |
163 | ||
164 | if ((new < mem_malloc_start) || (new > mem_malloc_end)) { | |
165 | return (NULL); | |
166 | } | |
167 | mem_malloc_brk = new; | |
168 | return ((void *) old); | |
169 | } | |
170 | ||
fe8c2806 WD |
171 | /* |
172 | * All attempts to come up with a "common" initialization sequence | |
173 | * that works for all boards and architectures failed: some of the | |
174 | * requirements are just _too_ different. To get rid of the resulting | |
175 | * mess of board dependend #ifdef'ed code we now make the whole | |
176 | * initialization sequence configurable to the user. | |
177 | * | |
178 | * The requirements for any new initalization function is simple: it | |
179 | * receives a pointer to the "global data" structure as it's only | |
180 | * argument, and returns an integer return code, where 0 means | |
181 | * "continue" and != 0 means "fatal error, hang the system". | |
182 | */ | |
183 | typedef int (init_fnc_t) (void); | |
184 | ||
185 | /************************************************************************ | |
186 | * Init Utilities * | |
187 | ************************************************************************ | |
188 | * Some of this code should be moved into the core functions, | |
189 | * but let's get it working (again) first... | |
190 | */ | |
191 | ||
192 | static int init_baudrate (void) | |
193 | { | |
77ddac94 | 194 | char tmp[64]; /* long enough for environment variables */ |
fe8c2806 WD |
195 | int i = getenv_r ("baudrate", tmp, sizeof (tmp)); |
196 | ||
197 | gd->baudrate = (i > 0) | |
198 | ? (int) simple_strtoul (tmp, NULL, 10) | |
199 | : CONFIG_BAUDRATE; | |
fe8c2806 WD |
200 | return (0); |
201 | } | |
202 | ||
203 | /***********************************************************************/ | |
204 | ||
79f240f7 KP |
205 | void __board_add_ram_info(int use_default) |
206 | { | |
207 | /* please define platform specific board_add_ram_info() */ | |
208 | } | |
209 | void board_add_ram_info(int) __attribute__((weak, alias("__board_add_ram_info"))); | |
210 | ||
d96f41e0 | 211 | |
fe8c2806 WD |
212 | static int init_func_ram (void) |
213 | { | |
fe8c2806 WD |
214 | #ifdef CONFIG_BOARD_TYPES |
215 | int board_type = gd->board_type; | |
216 | #else | |
217 | int board_type = 0; /* use dummy arg */ | |
218 | #endif | |
219 | puts ("DRAM: "); | |
220 | ||
221 | if ((gd->ram_size = initdram (board_type)) > 0) { | |
d96f41e0 | 222 | print_size (gd->ram_size, ""); |
d96f41e0 | 223 | board_add_ram_info(0); |
d96f41e0 | 224 | putc('\n'); |
fe8c2806 WD |
225 | return (0); |
226 | } | |
227 | puts (failed); | |
228 | return (1); | |
229 | } | |
230 | ||
231 | /***********************************************************************/ | |
232 | ||
233 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) | |
234 | static int init_func_i2c (void) | |
235 | { | |
236 | puts ("I2C: "); | |
6d0f6bcf | 237 | i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
fe8c2806 WD |
238 | puts ("ready\n"); |
239 | return (0); | |
240 | } | |
241 | #endif | |
242 | ||
04a9e118 BW |
243 | #if defined(CONFIG_HARD_SPI) |
244 | static int init_func_spi (void) | |
245 | { | |
246 | puts ("SPI: "); | |
247 | spi_init (); | |
248 | puts ("ready\n"); | |
249 | return (0); | |
250 | } | |
251 | #endif | |
252 | ||
fe8c2806 WD |
253 | /***********************************************************************/ |
254 | ||
255 | #if defined(CONFIG_WATCHDOG) | |
256 | static int init_func_watchdog_init (void) | |
257 | { | |
258 | puts (" Watchdog enabled\n"); | |
259 | WATCHDOG_RESET (); | |
260 | return (0); | |
261 | } | |
262 | # define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init, | |
263 | ||
264 | static int init_func_watchdog_reset (void) | |
265 | { | |
266 | WATCHDOG_RESET (); | |
267 | return (0); | |
268 | } | |
269 | # define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset, | |
270 | #else | |
271 | # define INIT_FUNC_WATCHDOG_INIT /* undef */ | |
272 | # define INIT_FUNC_WATCHDOG_RESET /* undef */ | |
273 | #endif /* CONFIG_WATCHDOG */ | |
274 | ||
275 | /************************************************************************ | |
276 | * Initialization sequence * | |
277 | ************************************************************************ | |
278 | */ | |
279 | ||
280 | init_fnc_t *init_sequence[] = { | |
281 | ||
c837dcb1 WD |
282 | #if defined(CONFIG_BOARD_EARLY_INIT_F) |
283 | board_early_init_f, | |
fe8c2806 | 284 | #endif |
c178d3da | 285 | |
66ca92a5 | 286 | #if !defined(CONFIG_8xx_CPUCLK_DEFAULT) |
fe8c2806 | 287 | get_clocks, /* get CPU and bus clocks (etc.) */ |
090eb735 MK |
288 | #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ |
289 | && !defined(CONFIG_TQM885D) | |
e9132ea9 WD |
290 | adjust_sdram_tbs_8xx, |
291 | #endif | |
fe8c2806 | 292 | init_timebase, |
c178d3da | 293 | #endif |
6d0f6bcf | 294 | #ifdef CONFIG_SYS_ALLOC_DPRAM |
9c4c5ae3 | 295 | #if !defined(CONFIG_CPM2) |
fe8c2806 WD |
296 | dpram_init, |
297 | #endif | |
7aa78614 | 298 | #endif |
fe8c2806 WD |
299 | #if defined(CONFIG_BOARD_POSTCLK_INIT) |
300 | board_postclk_init, | |
301 | #endif | |
302 | env_init, | |
66ca92a5 | 303 | #if defined(CONFIG_8xx_CPUCLK_DEFAULT) |
c178d3da WD |
304 | get_clocks_866, /* get CPU and bus clocks according to the environment variable */ |
305 | sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */ | |
306 | init_timebase, | |
307 | #endif | |
fe8c2806 WD |
308 | init_baudrate, |
309 | serial_init, | |
310 | console_init_f, | |
311 | display_options, | |
312 | #if defined(CONFIG_8260) | |
313 | prt_8260_rsr, | |
314 | prt_8260_clks, | |
315 | #endif /* CONFIG_8260 */ | |
9be39a67 DL |
316 | #if defined(CONFIG_MPC83XX) |
317 | prt_83xx_rsr, | |
318 | #endif | |
fe8c2806 | 319 | checkcpu, |
cbd8a35c | 320 | #if defined(CONFIG_MPC5xxx) |
945af8d7 | 321 | prt_mpc5xxx_clks, |
cbd8a35c | 322 | #endif /* CONFIG_MPC5xxx */ |
983fda83 WD |
323 | #if defined(CONFIG_MPC8220) |
324 | prt_mpc8220_clks, | |
325 | #endif | |
fe8c2806 WD |
326 | checkboard, |
327 | INIT_FUNC_WATCHDOG_INIT | |
c837dcb1 | 328 | #if defined(CONFIG_MISC_INIT_F) |
fe8c2806 WD |
329 | misc_init_f, |
330 | #endif | |
331 | INIT_FUNC_WATCHDOG_RESET | |
332 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) | |
333 | init_func_i2c, | |
334 | #endif | |
04a9e118 BW |
335 | #if defined(CONFIG_HARD_SPI) |
336 | init_func_spi, | |
337 | #endif | |
fe8c2806 WD |
338 | #if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */ |
339 | dtt_init, | |
4532cb69 WD |
340 | #endif |
341 | #ifdef CONFIG_POST | |
342 | post_init_f, | |
fe8c2806 WD |
343 | #endif |
344 | INIT_FUNC_WATCHDOG_RESET | |
345 | init_func_ram, | |
6d0f6bcf | 346 | #if defined(CONFIG_SYS_DRAM_TEST) |
fe8c2806 | 347 | testdram, |
6d0f6bcf | 348 | #endif /* CONFIG_SYS_DRAM_TEST */ |
fe8c2806 WD |
349 | INIT_FUNC_WATCHDOG_RESET |
350 | ||
351 | NULL, /* Terminate this list */ | |
352 | }; | |
353 | ||
81d93e5c KG |
354 | #ifndef CONFIG_MAX_MEM_MAPPED |
355 | #define CONFIG_MAX_MEM_MAPPED (256 << 20) | |
356 | #endif | |
357 | ulong get_effective_memsize(void) | |
358 | { | |
359 | #ifndef CONFIG_VERY_BIG_RAM | |
360 | return gd->ram_size; | |
361 | #else | |
362 | /* limit stack to what we can reasonable map */ | |
363 | return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ? | |
364 | CONFIG_MAX_MEM_MAPPED : gd->ram_size); | |
365 | #endif | |
366 | } | |
367 | ||
fe8c2806 WD |
368 | /************************************************************************ |
369 | * | |
370 | * This is the first part of the initialization sequence that is | |
371 | * implemented in C, but still running from ROM. | |
372 | * | |
373 | * The main purpose is to provide a (serial) console interface as | |
374 | * soon as possible (so we can see any error messages), and to | |
375 | * initialize the RAM so that we can relocate the monitor code to | |
376 | * RAM. | |
377 | * | |
378 | * Be aware of the restrictions: global data is read-only, BSS is not | |
379 | * initialized, and stack space is limited to a few kB. | |
380 | * | |
381 | ************************************************************************ | |
382 | */ | |
383 | ||
95d449ad MB |
384 | #ifdef CONFIG_LOGBUFFER |
385 | unsigned long logbuffer_base(void) | |
386 | { | |
6d0f6bcf | 387 | return CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - LOGBUFF_LEN; |
95d449ad MB |
388 | } |
389 | #endif | |
390 | ||
fe8c2806 WD |
391 | void board_init_f (ulong bootflag) |
392 | { | |
fe8c2806 WD |
393 | bd_t *bd; |
394 | ulong len, addr, addr_sp; | |
7bc5ee07 | 395 | ulong *s; |
fe8c2806 WD |
396 | gd_t *id; |
397 | init_fnc_t **init_fnc_ptr; | |
398 | #ifdef CONFIG_PRAM | |
399 | int i; | |
400 | ulong reg; | |
401 | uchar tmp[64]; /* long enough for environment variables */ | |
402 | #endif | |
403 | ||
404 | /* Pointer is writable since we allocated a register for it */ | |
6d0f6bcf | 405 | gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); |
93f6a677 WD |
406 | /* compiler optimization barrier needed for GCC >= 3.4 */ |
407 | __asm__ __volatile__("": : :"memory"); | |
fe8c2806 | 408 | |
f060054d KG |
409 | #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83XX) && \ |
410 | !defined(CONFIG_MPC85xx) && !defined(CONFIG_MPC86xx) | |
fe8c2806 WD |
411 | /* Clear initial global data */ |
412 | memset ((void *) gd, 0, sizeof (gd_t)); | |
413 | #endif | |
414 | ||
415 | for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { | |
416 | if ((*init_fnc_ptr) () != 0) { | |
417 | hang (); | |
418 | } | |
419 | } | |
420 | ||
421 | /* | |
422 | * Now that we have DRAM mapped and working, we can | |
423 | * relocate the code and continue running from DRAM. | |
424 | * | |
425 | * Reserve memory at end of RAM for (top down in that order): | |
14f73ca6 | 426 | * - area that won't get touched by U-Boot and Linux (optional) |
8bde7f77 | 427 | * - kernel log buffer |
fe8c2806 WD |
428 | * - protected RAM |
429 | * - LCD framebuffer | |
430 | * - monitor code | |
431 | * - board info struct | |
432 | */ | |
6d0f6bcf | 433 | len = (ulong)&_end - CONFIG_SYS_MONITOR_BASE; |
fe8c2806 | 434 | |
14f73ca6 SR |
435 | /* |
436 | * Subtract specified amount of memory to hide so that it won't | |
437 | * get "touched" at all by U-Boot. By fixing up gd->ram_size | |
438 | * the Linux kernel should now get passed the now "corrected" | |
439 | * memory size and won't touch it either. This should work | |
440 | * for arch/ppc and arch/powerpc. Only Linux board ports in | |
441 | * arch/powerpc with bootwrapper support, that recalculate the | |
442 | * memory size from the SDRAM controller setup will have to | |
443 | * get fixed. | |
444 | */ | |
6d0f6bcf | 445 | gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; |
14f73ca6 | 446 | |
6d0f6bcf | 447 | addr = CONFIG_SYS_SDRAM_BASE + get_effective_memsize(); |
fe8c2806 | 448 | |
228f29ac | 449 | #ifdef CONFIG_LOGBUFFER |
3d610186 | 450 | #ifndef CONFIG_ALT_LB_ADDR |
228f29ac WD |
451 | /* reserve kernel log buffer */ |
452 | addr -= (LOGBUFF_RESERVE); | |
9d2b18a0 | 453 | debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr); |
228f29ac | 454 | #endif |
3d610186 | 455 | #endif |
228f29ac | 456 | |
fe8c2806 WD |
457 | #ifdef CONFIG_PRAM |
458 | /* | |
459 | * reserve protected RAM | |
460 | */ | |
77ddac94 WD |
461 | i = getenv_r ("pram", (char *)tmp, sizeof (tmp)); |
462 | reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM; | |
fe8c2806 | 463 | addr -= (reg << 10); /* size is in kB */ |
9d2b18a0 | 464 | debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr); |
fe8c2806 WD |
465 | #endif /* CONFIG_PRAM */ |
466 | ||
467 | /* round down to next 4 kB limit */ | |
468 | addr &= ~(4096 - 1); | |
9d2b18a0 | 469 | debug ("Top of RAM usable for U-Boot at: %08lx\n", addr); |
fe8c2806 WD |
470 | |
471 | #ifdef CONFIG_LCD | |
472 | /* reserve memory for LCD display (always full pages) */ | |
473 | addr = lcd_setmem (addr); | |
474 | gd->fb_base = addr; | |
475 | #endif /* CONFIG_LCD */ | |
476 | ||
477 | #if defined(CONFIG_VIDEO) && defined(CONFIG_8xx) | |
478 | /* reserve memory for video display (always full pages) */ | |
479 | addr = video_setmem (addr); | |
480 | gd->fb_base = addr; | |
481 | #endif /* CONFIG_VIDEO */ | |
482 | ||
483 | /* | |
484 | * reserve memory for U-Boot code, data & bss | |
682011ff | 485 | * round down to next 4 kB limit |
fe8c2806 WD |
486 | */ |
487 | addr -= len; | |
682011ff | 488 | addr &= ~(4096 - 1); |
7d314992 WD |
489 | #ifdef CONFIG_E500 |
490 | /* round down to next 64 kB limit so that IVPR stays aligned */ | |
491 | addr &= ~(65536 - 1); | |
492 | #endif | |
fe8c2806 | 493 | |
9d2b18a0 | 494 | debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr); |
fe8c2806 | 495 | |
c7de829c WD |
496 | #ifdef CONFIG_AMIGAONEG3SE |
497 | gd->relocaddr = addr; | |
498 | #endif | |
499 | ||
fe8c2806 WD |
500 | /* |
501 | * reserve memory for malloc() arena | |
502 | */ | |
503 | addr_sp = addr - TOTAL_MALLOC_LEN; | |
9d2b18a0 | 504 | debug ("Reserving %dk for malloc() at: %08lx\n", |
fe8c2806 | 505 | TOTAL_MALLOC_LEN >> 10, addr_sp); |
fe8c2806 WD |
506 | |
507 | /* | |
508 | * (permanently) allocate a Board Info struct | |
509 | * and a permanent copy of the "global" data | |
510 | */ | |
511 | addr_sp -= sizeof (bd_t); | |
512 | bd = (bd_t *) addr_sp; | |
513 | gd->bd = bd; | |
b64f190b | 514 | debug ("Reserving %zu Bytes for Board Info at: %08lx\n", |
fe8c2806 | 515 | sizeof (bd_t), addr_sp); |
fe8c2806 WD |
516 | addr_sp -= sizeof (gd_t); |
517 | id = (gd_t *) addr_sp; | |
b64f190b | 518 | debug ("Reserving %zu Bytes for Global Data at: %08lx\n", |
fe8c2806 | 519 | sizeof (gd_t), addr_sp); |
fe8c2806 WD |
520 | |
521 | /* | |
522 | * Finally, we set up a new (bigger) stack. | |
523 | * | |
524 | * Leave some safety gap for SP, force alignment on 16 byte boundary | |
525 | * Clear initial stack frame | |
526 | */ | |
527 | addr_sp -= 16; | |
528 | addr_sp &= ~0xF; | |
7bc5ee07 WD |
529 | s = (ulong *)addr_sp; |
530 | *s-- = 0; | |
531 | *s-- = 0; | |
532 | addr_sp = (ulong)s; | |
9d2b18a0 | 533 | debug ("Stack Pointer at: %08lx\n", addr_sp); |
fe8c2806 WD |
534 | |
535 | /* | |
536 | * Save local variables to board info struct | |
537 | */ | |
538 | ||
6d0f6bcf | 539 | bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of DRAM memory */ |
fe8c2806 WD |
540 | bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */ |
541 | ||
542 | #ifdef CONFIG_IP860 | |
c837dcb1 WD |
543 | bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */ |
544 | bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */ | |
983fda83 | 545 | #elif defined CONFIG_MPC8220 |
6d0f6bcf JCPV |
546 | bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM memory */ |
547 | bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM memory */ | |
fe8c2806 | 548 | #else |
c837dcb1 WD |
549 | bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */ |
550 | bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */ | |
fe8c2806 WD |
551 | #endif |
552 | ||
42d1f039 | 553 | #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ |
debb7354 | 554 | defined(CONFIG_E500) || defined(CONFIG_MPC86xx) |
6d0f6bcf | 555 | bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ |
fe8c2806 | 556 | #endif |
cbd8a35c | 557 | #if defined(CONFIG_MPC5xxx) |
6d0f6bcf | 558 | bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ |
945af8d7 | 559 | #endif |
f046ccd1 | 560 | #if defined(CONFIG_MPC83XX) |
6d0f6bcf | 561 | bd->bi_immrbar = CONFIG_SYS_IMMR; |
f046ccd1 | 562 | #endif |
983fda83 | 563 | #if defined(CONFIG_MPC8220) |
6d0f6bcf | 564 | bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ |
983fda83 WD |
565 | bd->bi_inpfreq = gd->inp_clk; |
566 | bd->bi_pcifreq = gd->pci_clk; | |
567 | bd->bi_vcofreq = gd->vco_clk; | |
568 | bd->bi_pevfreq = gd->pev_clk; | |
569 | bd->bi_flbfreq = gd->flb_clk; | |
570 | ||
dd520bf3 WD |
571 | /* store bootparam to sram (backward compatible), here? */ |
572 | { | |
6d0f6bcf | 573 | u32 *sram = (u32 *)CONFIG_SYS_SRAM_BASE; |
dd520bf3 WD |
574 | *sram++ = gd->ram_size; |
575 | *sram++ = gd->bus_clk; | |
576 | *sram++ = gd->inp_clk; | |
577 | *sram++ = gd->cpu_clk; | |
578 | *sram++ = gd->vco_clk; | |
579 | *sram++ = gd->flb_clk; | |
580 | *sram++ = 0xb8c3ba11; /* boot signature */ | |
581 | } | |
983fda83 | 582 | #endif |
fe8c2806 WD |
583 | |
584 | bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */ | |
585 | ||
586 | WATCHDOG_RESET (); | |
587 | bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ | |
588 | bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ | |
9c4c5ae3 | 589 | #if defined(CONFIG_CPM2) |
fe8c2806 WD |
590 | bd->bi_cpmfreq = gd->cpm_clk; |
591 | bd->bi_brgfreq = gd->brg_clk; | |
592 | bd->bi_sccfreq = gd->scc_clk; | |
593 | bd->bi_vco = gd->vco_out; | |
9c4c5ae3 | 594 | #endif /* CONFIG_CPM2 */ |
281ff9a4 | 595 | #if defined(CONFIG_MPC512X) |
5d49e0e1 | 596 | bd->bi_ipsfreq = gd->ips_clk; |
281ff9a4 | 597 | #endif /* CONFIG_MPC512X */ |
cbd8a35c | 598 | #if defined(CONFIG_MPC5xxx) |
945af8d7 WD |
599 | bd->bi_ipbfreq = gd->ipb_clk; |
600 | bd->bi_pcifreq = gd->pci_clk; | |
cbd8a35c | 601 | #endif /* CONFIG_MPC5xxx */ |
fe8c2806 WD |
602 | bd->bi_baudrate = gd->baudrate; /* Console Baudrate */ |
603 | ||
6d0f6bcf | 604 | #ifdef CONFIG_SYS_EXTBDINFO |
77ddac94 WD |
605 | strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version)); |
606 | strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version)); | |
fe8c2806 WD |
607 | |
608 | bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ | |
609 | bd->bi_plb_busfreq = gd->bus_clk; | |
343c48bd SR |
610 | #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ |
611 | defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ | |
612 | defined(CONFIG_440EPX) || defined(CONFIG_440GRX) | |
fe8c2806 | 613 | bd->bi_pci_busfreq = get_PCI_freq (); |
109c0e3a | 614 | bd->bi_opbfreq = get_OPB_freq (); |
9fea65a6 | 615 | #elif defined(CONFIG_XILINX_405) |
028ab6b5 | 616 | bd->bi_pci_busfreq = get_PCI_freq (); |
fe8c2806 WD |
617 | #endif |
618 | #endif | |
619 | ||
9d2b18a0 | 620 | debug ("New Stack Pointer is: %08lx\n", addr_sp); |
fe8c2806 WD |
621 | |
622 | WATCHDOG_RESET (); | |
623 | ||
624 | #ifdef CONFIG_POST | |
625 | post_bootmode_init(); | |
6dff5529 | 626 | post_run (NULL, POST_ROM | post_bootmode_get(0)); |
fe8c2806 WD |
627 | #endif |
628 | ||
629 | WATCHDOG_RESET(); | |
630 | ||
27b207fd | 631 | memcpy (id, (void *)gd, sizeof (gd_t)); |
fe8c2806 WD |
632 | |
633 | relocate_code (addr_sp, id, addr); | |
634 | ||
635 | /* NOTREACHED - relocate_code() does not return */ | |
636 | } | |
637 | ||
374b9038 | 638 | int __is_sata_supported(void) |
0f8cbc18 JJ |
639 | { |
640 | /* For some boards, when sata disabled by the switch, and the | |
641 | * driver still access the sata registers, the cpu will hangup. | |
642 | * please define platform specific is_sata_supported() if your | |
643 | * board have such issue.*/ | |
644 | return 1; | |
645 | } | |
374b9038 | 646 | int is_sata_supported(void) __attribute__((weak, alias("__is_sata_supported"))); |
0f8cbc18 | 647 | |
fe8c2806 WD |
648 | /************************************************************************ |
649 | * | |
650 | * This is the next part if the initialization sequence: we are now | |
651 | * running from RAM and have a "normal" C environment, i. e. global | |
652 | * data can be written, BSS has been cleared, the stack size in not | |
653 | * that critical any more, etc. | |
654 | * | |
655 | ************************************************************************ | |
656 | */ | |
fe8c2806 WD |
657 | void board_init_r (gd_t *id, ulong dest_addr) |
658 | { | |
fe8c2806 WD |
659 | cmd_tbl_t *cmdtp; |
660 | char *s, *e; | |
661 | bd_t *bd; | |
662 | int i; | |
663 | extern void malloc_bin_reloc (void); | |
93f6d725 | 664 | #ifndef CONFIG_ENV_IS_NOWHERE |
fe8c2806 WD |
665 | extern char * env_name_spec; |
666 | #endif | |
667 | ||
6d0f6bcf | 668 | #ifndef CONFIG_SYS_NO_FLASH |
fe8c2806 WD |
669 | ulong flash_size; |
670 | #endif | |
671 | ||
672 | gd = id; /* initialize RAM version of global data */ | |
673 | bd = gd->bd; | |
674 | ||
675 | gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */ | |
f82b3b63 GL |
676 | |
677 | #if defined(CONFIG_RELOC_FIXUP_WORKS) | |
678 | gd->reloc_off = 0; | |
e9514751 | 679 | mem_malloc_end = dest_addr; |
f82b3b63 | 680 | #else |
6d0f6bcf | 681 | gd->reloc_off = dest_addr - CONFIG_SYS_MONITOR_BASE; |
f82b3b63 | 682 | #endif |
bb105f24 MB |
683 | |
684 | #ifdef CONFIG_SERIAL_MULTI | |
685 | serial_initialize(); | |
686 | #endif | |
fe8c2806 | 687 | |
9d2b18a0 | 688 | debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr); |
fe8c2806 WD |
689 | |
690 | WATCHDOG_RESET (); | |
691 | ||
c837dcb1 WD |
692 | #if defined(CONFIG_BOARD_EARLY_INIT_R) |
693 | board_early_init_r (); | |
694 | #endif | |
695 | ||
3b57fe0a | 696 | monitor_flash_len = (ulong)&__init_end - dest_addr; |
fe8c2806 WD |
697 | |
698 | /* | |
699 | * We have to relocate the command table manually | |
700 | */ | |
8bde7f77 | 701 | for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) { |
fe8c2806 | 702 | ulong addr; |
fe8c2806 WD |
703 | addr = (ulong) (cmdtp->cmd) + gd->reloc_off; |
704 | #if 0 | |
705 | printf ("Command \"%s\": 0x%08lx => 0x%08lx\n", | |
706 | cmdtp->name, (ulong) (cmdtp->cmd), addr); | |
707 | #endif | |
708 | cmdtp->cmd = | |
709 | (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr; | |
710 | ||
711 | addr = (ulong)(cmdtp->name) + gd->reloc_off; | |
712 | cmdtp->name = (char *)addr; | |
713 | ||
714 | if (cmdtp->usage) { | |
715 | addr = (ulong)(cmdtp->usage) + gd->reloc_off; | |
716 | cmdtp->usage = (char *)addr; | |
717 | } | |
6d0f6bcf | 718 | #ifdef CONFIG_SYS_LONGHELP |
fe8c2806 WD |
719 | if (cmdtp->help) { |
720 | addr = (ulong)(cmdtp->help) + gd->reloc_off; | |
721 | cmdtp->help = (char *)addr; | |
722 | } | |
723 | #endif | |
724 | } | |
725 | /* there are some other pointer constants we must deal with */ | |
93f6d725 | 726 | #ifndef CONFIG_ENV_IS_NOWHERE |
fe8c2806 WD |
727 | env_name_spec += gd->reloc_off; |
728 | #endif | |
729 | ||
730 | WATCHDOG_RESET (); | |
731 | ||
56f94be3 | 732 | #ifdef CONFIG_LOGBUFFER |
228f29ac | 733 | logbuff_init_ptrs (); |
56f94be3 | 734 | #endif |
fe8c2806 | 735 | #ifdef CONFIG_POST |
228f29ac | 736 | post_output_backlog (); |
fe8c2806 WD |
737 | post_reloc (); |
738 | #endif | |
739 | ||
740 | WATCHDOG_RESET(); | |
741 | ||
2688e2f9 KG |
742 | #if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \ |
743 | defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX) | |
fe8c2806 WD |
744 | icache_enable (); /* it's time to enable the instruction cache */ |
745 | #endif | |
746 | ||
6d0f6bcf | 747 | #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) |
c837dcb1 | 748 | unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */ |
42d1f039 WD |
749 | #endif |
750 | ||
3bac3513 | 751 | #if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45) |
fe8c2806 | 752 | /* |
3bac3513 WD |
753 | * Do PCI configuration on BAB7xx and CPC45 _before_ the flash |
754 | * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus | |
755 | * bridge there. | |
fe8c2806 WD |
756 | */ |
757 | pci_init (); | |
3bac3513 WD |
758 | #endif |
759 | #if defined(CONFIG_BAB7xx) | |
fe8c2806 WD |
760 | /* |
761 | * Initialise the ISA bridge | |
762 | */ | |
763 | initialise_w83c553f (); | |
764 | #endif | |
765 | ||
766 | asm ("sync ; isync"); | |
767 | ||
768 | /* | |
769 | * Setup trap handlers | |
770 | */ | |
771 | trap_init (dest_addr); | |
772 | ||
6d0f6bcf | 773 | #if !defined(CONFIG_SYS_NO_FLASH) |
fe8c2806 WD |
774 | puts ("FLASH: "); |
775 | ||
776 | if ((flash_size = flash_init ()) > 0) { | |
6d0f6bcf | 777 | # ifdef CONFIG_SYS_FLASH_CHECKSUM |
fe8c2806 WD |
778 | print_size (flash_size, ""); |
779 | /* | |
780 | * Compute and print flash CRC if flashchecksum is set to 'y' | |
781 | * | |
782 | * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX | |
783 | */ | |
784 | s = getenv ("flashchecksum"); | |
785 | if (s && (*s == 'y')) { | |
06c53bea | 786 | printf (" CRC: %08X", |
6d0f6bcf | 787 | crc32 (0, (const unsigned char *) CONFIG_SYS_FLASH_BASE, flash_size) |
7e780369 | 788 | ); |
fe8c2806 WD |
789 | } |
790 | putc ('\n'); | |
6d0f6bcf | 791 | # else /* !CONFIG_SYS_FLASH_CHECKSUM */ |
fe8c2806 | 792 | print_size (flash_size, "\n"); |
6d0f6bcf | 793 | # endif /* CONFIG_SYS_FLASH_CHECKSUM */ |
fe8c2806 WD |
794 | } else { |
795 | puts (failed); | |
796 | hang (); | |
797 | } | |
798 | ||
6d0f6bcf | 799 | bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; /* update start of FLASH memory */ |
fe8c2806 | 800 | bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */ |
fa230445 | 801 | |
6d0f6bcf | 802 | #if defined(CONFIG_SYS_UPDATE_FLASH_SIZE) |
fa230445 HS |
803 | /* Make a update of the Memctrl. */ |
804 | update_flash_size (flash_size); | |
805 | #endif | |
806 | ||
807 | ||
7e780369 WD |
808 | # if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU) |
809 | /* flash mapped at end of memory map */ | |
810 | bd->bi_flashoffset = TEXT_BASE + flash_size; | |
6d0f6bcf | 811 | # elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE |
3b57fe0a | 812 | bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */ |
0cb61d7d | 813 | # else |
fe8c2806 | 814 | bd->bi_flashoffset = 0; |
0cb61d7d | 815 | # endif |
6d0f6bcf | 816 | #else /* CONFIG_SYS_NO_FLASH */ |
fe8c2806 WD |
817 | |
818 | bd->bi_flashsize = 0; | |
819 | bd->bi_flashstart = 0; | |
820 | bd->bi_flashoffset = 0; | |
6d0f6bcf | 821 | #endif /* !CONFIG_SYS_NO_FLASH */ |
fe8c2806 WD |
822 | |
823 | WATCHDOG_RESET (); | |
824 | ||
825 | /* initialize higher level parts of CPU like time base and timers */ | |
826 | cpu_init_r (); | |
827 | ||
828 | WATCHDOG_RESET (); | |
829 | ||
830 | /* initialize malloc() area */ | |
831 | mem_malloc_init (); | |
832 | malloc_bin_reloc (); | |
833 | ||
834 | #ifdef CONFIG_SPI | |
bb1f8b4f | 835 | # if !defined(CONFIG_ENV_IS_IN_EEPROM) |
fe8c2806 WD |
836 | spi_init_f (); |
837 | # endif | |
838 | spi_init_r (); | |
839 | #endif | |
840 | ||
7def6b34 | 841 | #if defined(CONFIG_CMD_NAND) |
887e2ec9 SR |
842 | WATCHDOG_RESET (); |
843 | puts ("NAND: "); | |
844 | nand_init(); /* go init the NAND */ | |
845 | #endif | |
846 | ||
fe8c2806 WD |
847 | /* relocate environment function pointers etc. */ |
848 | env_relocate (); | |
849 | ||
850 | /* | |
851 | * Fill in missing fields of bd_info. | |
8bde7f77 WD |
852 | * We do this here, where we have "normal" access to the |
853 | * environment; we used to do this still running from ROM, | |
854 | * where had to use getenv_r(), which can be pretty slow when | |
855 | * the environment is in EEPROM. | |
fe8c2806 | 856 | */ |
7abf0c58 | 857 | |
6d0f6bcf | 858 | #if defined(CONFIG_SYS_EXTBDINFO) |
7abf0c58 WD |
859 | #if defined(CONFIG_405GP) || defined(CONFIG_405EP) |
860 | #if defined(CONFIG_I2CFAST) | |
861 | /* | |
862 | * set bi_iic_fast for linux taking environment variable | |
863 | * "i2cfast" into account | |
864 | */ | |
865 | { | |
866 | char *s = getenv ("i2cfast"); | |
867 | if (s && ((*s == 'y') || (*s == 'Y'))) { | |
868 | bd->bi_iic_fast[0] = 1; | |
869 | bd->bi_iic_fast[1] = 1; | |
870 | } else { | |
871 | bd->bi_iic_fast[0] = 0; | |
872 | bd->bi_iic_fast[1] = 0; | |
873 | } | |
874 | } | |
875 | #else | |
876 | bd->bi_iic_fast[0] = 0; | |
877 | bd->bi_iic_fast[1] = 0; | |
878 | #endif /* CONFIG_I2CFAST */ | |
879 | #endif /* CONFIG_405GP, CONFIG_405EP */ | |
6d0f6bcf | 880 | #endif /* CONFIG_SYS_EXTBDINFO */ |
7abf0c58 | 881 | |
9045f33c | 882 | #if defined(CONFIG_SC3) |
ca43ba18 HS |
883 | sc3_read_eeprom(); |
884 | #endif | |
d59feffb | 885 | |
6d0f6bcf | 886 | #if defined (CONFIG_ID_EEPROM) || defined (CONFIG_SYS_I2C_MAC_OFFSET) |
d59feffb HW |
887 | mac_read_from_eeprom(); |
888 | #endif | |
889 | ||
fe8c2806 | 890 | s = getenv ("ethaddr"); |
4707fb50 BS |
891 | #if defined (CONFIG_MBX) || \ |
892 | defined (CONFIG_RPXCLASSIC) || \ | |
893 | defined(CONFIG_IAD210) || \ | |
894 | defined(CONFIG_V38B) | |
fe8c2806 WD |
895 | if (s == NULL) |
896 | board_get_enetaddr (bd->bi_enetaddr); | |
897 | else | |
898 | #endif | |
899 | for (i = 0; i < 6; ++i) { | |
900 | bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
901 | if (s) | |
902 | s = (*e) ? e + 1 : e; | |
903 | } | |
904 | #ifdef CONFIG_HERMES | |
905 | if ((gd->board_type >> 16) == 2) | |
906 | bd->bi_ethspeed = gd->board_type & 0xFFFF; | |
907 | else | |
908 | bd->bi_ethspeed = 0xFFFF; | |
909 | #endif | |
910 | ||
911 | #ifdef CONFIG_NX823 | |
912 | load_sernum_ethaddr (); | |
913 | #endif | |
914 | ||
e2ffd59b | 915 | #ifdef CONFIG_HAS_ETH1 |
fe8c2806 WD |
916 | /* handle the 2nd ethernet address */ |
917 | ||
918 | s = getenv ("eth1addr"); | |
919 | ||
920 | for (i = 0; i < 6; ++i) { | |
921 | bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
922 | if (s) | |
923 | s = (*e) ? e + 1 : e; | |
924 | } | |
925 | #endif | |
e2ffd59b | 926 | #ifdef CONFIG_HAS_ETH2 |
fe8c2806 WD |
927 | /* handle the 3rd ethernet address */ |
928 | ||
929 | s = getenv ("eth2addr"); | |
b79316f2 | 930 | #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF) |
ba56f625 WD |
931 | if (s == NULL) |
932 | board_get_enetaddr(bd->bi_enet2addr); | |
933 | else | |
934 | #endif | |
fe8c2806 WD |
935 | for (i = 0; i < 6; ++i) { |
936 | bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
937 | if (s) | |
938 | s = (*e) ? e + 1 : e; | |
939 | } | |
940 | #endif | |
941 | ||
e2ffd59b | 942 | #ifdef CONFIG_HAS_ETH3 |
ba56f625 WD |
943 | /* handle 4th ethernet address */ |
944 | s = getenv("eth3addr"); | |
b79316f2 | 945 | #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF) |
ba56f625 WD |
946 | if (s == NULL) |
947 | board_get_enetaddr(bd->bi_enet3addr); | |
948 | else | |
949 | #endif | |
950 | for (i = 0; i < 6; ++i) { | |
951 | bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
952 | if (s) | |
953 | s = (*e) ? e + 1 : e; | |
954 | } | |
955 | #endif | |
fe8c2806 | 956 | |
c68a05fe | 957 | #ifdef CONFIG_HAS_ETH4 |
958 | /* handle 5th ethernet address */ | |
959 | s = getenv("eth4addr"); | |
960 | #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF) | |
961 | if (s == NULL) | |
962 | board_get_enetaddr(bd->bi_enet4addr); | |
963 | else | |
964 | #endif | |
965 | for (i = 0; i < 6; ++i) { | |
966 | bd->bi_enet4addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
967 | if (s) | |
968 | s = (*e) ? e + 1 : e; | |
969 | } | |
970 | #endif | |
971 | ||
972 | #ifdef CONFIG_HAS_ETH5 | |
973 | /* handle 6th ethernet address */ | |
974 | s = getenv("eth5addr"); | |
975 | #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF) | |
976 | if (s == NULL) | |
977 | board_get_enetaddr(bd->bi_enet5addr); | |
978 | else | |
979 | #endif | |
980 | for (i = 0; i < 6; ++i) { | |
981 | bd->bi_enet5addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
982 | if (s) | |
983 | s = (*e) ? e + 1 : e; | |
984 | } | |
985 | #endif | |
986 | ||
fe8c2806 | 987 | #if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \ |
fa230445 | 988 | defined(CONFIG_TQM8272) || \ |
566a494f HS |
989 | defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || \ |
990 | defined(CONFIG_KUP4X) || defined(CONFIG_PCS440EP) | |
fe8c2806 WD |
991 | load_sernum_ethaddr (); |
992 | #endif | |
993 | /* IP Address */ | |
994 | bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); | |
995 | ||
996 | WATCHDOG_RESET (); | |
997 | ||
979bdbc7 | 998 | #if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45) |
fe8c2806 WD |
999 | /* |
1000 | * Do pci configuration | |
1001 | */ | |
1002 | pci_init (); | |
1003 | #endif | |
1004 | ||
1005 | /** leave this here (after malloc(), environment and PCI are working) **/ | |
1006 | /* Initialize devices */ | |
1007 | devices_init (); | |
1008 | ||
27b207fd WD |
1009 | /* Initialize the jump table for applications */ |
1010 | jumptable_init (); | |
fe8c2806 | 1011 | |
500856eb RJ |
1012 | #if defined(CONFIG_API) |
1013 | /* Initialize API */ | |
1014 | api_init (); | |
1015 | #endif | |
1016 | ||
fe8c2806 WD |
1017 | /* Initialize the console (after the relocation and devices init) */ |
1018 | console_init_r (); | |
fe8c2806 WD |
1019 | |
1020 | #if defined(CONFIG_CCM) || \ | |
1021 | defined(CONFIG_COGENT) || \ | |
1022 | defined(CONFIG_CPCI405) || \ | |
1023 | defined(CONFIG_EVB64260) || \ | |
56f94be3 | 1024 | defined(CONFIG_KUP4K) || \ |
0608e04d | 1025 | defined(CONFIG_KUP4X) || \ |
fe8c2806 WD |
1026 | defined(CONFIG_LWMON) || \ |
1027 | defined(CONFIG_PCU_E) || \ | |
9045f33c | 1028 | defined(CONFIG_SC3) || \ |
fe8c2806 WD |
1029 | defined(CONFIG_W7O) || \ |
1030 | defined(CONFIG_MISC_INIT_R) | |
1031 | /* miscellaneous platform dependent initialisations */ | |
1032 | misc_init_r (); | |
1033 | #endif | |
1034 | ||
1035 | #ifdef CONFIG_HERMES | |
1036 | if (bd->bi_ethspeed != 0xFFFF) | |
1037 | hermes_start_lxt980 ((int) bd->bi_ethspeed); | |
1038 | #endif | |
1039 | ||
7def6b34 | 1040 | #if defined(CONFIG_CMD_KGDB) |
fe8c2806 WD |
1041 | WATCHDOG_RESET (); |
1042 | puts ("KGDB: "); | |
1043 | kgdb_init (); | |
1044 | #endif | |
1045 | ||
9d2b18a0 | 1046 | debug ("U-Boot relocated to %08lx\n", dest_addr); |
fe8c2806 WD |
1047 | |
1048 | /* | |
1049 | * Enable Interrupts | |
1050 | */ | |
1051 | interrupt_init (); | |
1052 | ||
1053 | /* Must happen after interrupts are initialized since | |
1054 | * an irq handler gets installed | |
1055 | */ | |
42dfe7a1 | 1056 | #ifdef CONFIG_SERIAL_SOFTWARE_FIFO |
fe8c2806 WD |
1057 | serial_buffered_init(); |
1058 | #endif | |
1059 | ||
566a494f | 1060 | #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) |
fe8c2806 WD |
1061 | status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING); |
1062 | #endif | |
1063 | ||
1064 | udelay (20); | |
1065 | ||
1066 | set_timer (0); | |
1067 | ||
fe8c2806 WD |
1068 | /* Initialize from environment */ |
1069 | if ((s = getenv ("loadaddr")) != NULL) { | |
1070 | load_addr = simple_strtoul (s, NULL, 16); | |
1071 | } | |
7def6b34 | 1072 | #if defined(CONFIG_CMD_NET) |
fe8c2806 WD |
1073 | if ((s = getenv ("bootfile")) != NULL) { |
1074 | copy_filename (BootFile, s, sizeof (BootFile)); | |
1075 | } | |
b3aff0cb | 1076 | #endif |
fe8c2806 WD |
1077 | |
1078 | WATCHDOG_RESET (); | |
1079 | ||
7def6b34 | 1080 | #if defined(CONFIG_CMD_SCSI) |
fe8c2806 WD |
1081 | WATCHDOG_RESET (); |
1082 | puts ("SCSI: "); | |
1083 | scsi_init (); | |
1084 | #endif | |
1085 | ||
7def6b34 | 1086 | #if defined(CONFIG_CMD_DOC) |
fe8c2806 WD |
1087 | WATCHDOG_RESET (); |
1088 | puts ("DOC: "); | |
1089 | doc_init (); | |
1090 | #endif | |
1091 | ||
7def6b34 | 1092 | #if defined(CONFIG_CMD_NET) |
63ff004c | 1093 | #if defined(CONFIG_NET_MULTI) |
fe8c2806 WD |
1094 | WATCHDOG_RESET (); |
1095 | puts ("Net: "); | |
63ff004c | 1096 | #endif |
fe8c2806 WD |
1097 | eth_initialize (bd); |
1098 | #endif | |
1099 | ||
7def6b34 | 1100 | #if defined(CONFIG_CMD_NET) && ( \ |
63ff004c MB |
1101 | defined(CONFIG_CCM) || \ |
1102 | defined(CONFIG_ELPT860) || \ | |
1103 | defined(CONFIG_EP8260) || \ | |
1104 | defined(CONFIG_IP860) || \ | |
1105 | defined(CONFIG_IVML24) || \ | |
1106 | defined(CONFIG_IVMS8) || \ | |
1107 | defined(CONFIG_MPC8260ADS) || \ | |
1108 | defined(CONFIG_MPC8266ADS) || \ | |
1109 | defined(CONFIG_MPC8560ADS) || \ | |
1110 | defined(CONFIG_PCU_E) || \ | |
1111 | defined(CONFIG_RPXSUPER) || \ | |
1112 | defined(CONFIG_STXGP3) || \ | |
1113 | defined(CONFIG_SPD823TS) || \ | |
1114 | defined(CONFIG_RESET_PHY_R) ) | |
1115 | ||
1116 | WATCHDOG_RESET (); | |
1117 | debug ("Reset Ethernet PHY\n"); | |
1118 | reset_phy (); | |
1119 | #endif | |
1120 | ||
fe8c2806 | 1121 | #ifdef CONFIG_POST |
6dff5529 | 1122 | post_run (NULL, POST_RAM | post_bootmode_get(0)); |
fe8c2806 WD |
1123 | #endif |
1124 | ||
7def6b34 JL |
1125 | #if defined(CONFIG_CMD_PCMCIA) \ |
1126 | && !defined(CONFIG_CMD_IDE) | |
fe8c2806 WD |
1127 | WATCHDOG_RESET (); |
1128 | puts ("PCMCIA:"); | |
1129 | pcmcia_init (); | |
1130 | #endif | |
1131 | ||
7def6b34 | 1132 | #if defined(CONFIG_CMD_IDE) |
fe8c2806 WD |
1133 | WATCHDOG_RESET (); |
1134 | # ifdef CONFIG_IDE_8xx_PCCARD | |
1135 | puts ("PCMCIA:"); | |
1136 | # else | |
1137 | puts ("IDE: "); | |
1138 | #endif | |
ca43ba18 HS |
1139 | #if defined(CONFIG_START_IDE) |
1140 | if (board_start_ide()) | |
1141 | ide_init (); | |
1142 | #else | |
fe8c2806 | 1143 | ide_init (); |
ca43ba18 | 1144 | #endif |
b3aff0cb | 1145 | #endif |
fe8c2806 | 1146 | |
cd54081c | 1147 | #if defined(CONFIG_CMD_SATA) |
0f8cbc18 JJ |
1148 | if (is_sata_supported()) { |
1149 | puts("SATA: "); | |
1150 | sata_initialize(); | |
1151 | } | |
cd54081c DL |
1152 | #endif |
1153 | ||
fe8c2806 WD |
1154 | #ifdef CONFIG_LAST_STAGE_INIT |
1155 | WATCHDOG_RESET (); | |
1156 | /* | |
1157 | * Some parts can be only initialized if all others (like | |
1158 | * Interrupts) are up and running (i.e. the PC-style ISA | |
1159 | * keyboard). | |
1160 | */ | |
1161 | last_stage_init (); | |
1162 | #endif | |
1163 | ||
7def6b34 | 1164 | #if defined(CONFIG_CMD_BEDBUG) |
fe8c2806 WD |
1165 | WATCHDOG_RESET (); |
1166 | bedbug_init (); | |
1167 | #endif | |
1168 | ||
228f29ac | 1169 | #if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER) |
fe8c2806 WD |
1170 | /* |
1171 | * Export available size of memory for Linux, | |
1172 | * taking into account the protected RAM at top of memory | |
1173 | */ | |
1174 | { | |
1175 | ulong pram; | |
fe8c2806 | 1176 | uchar memsz[32]; |
228f29ac WD |
1177 | #ifdef CONFIG_PRAM |
1178 | char *s; | |
fe8c2806 WD |
1179 | |
1180 | if ((s = getenv ("pram")) != NULL) { | |
1181 | pram = simple_strtoul (s, NULL, 10); | |
1182 | } else { | |
1183 | pram = CONFIG_PRAM; | |
1184 | } | |
228f29ac WD |
1185 | #else |
1186 | pram=0; | |
1187 | #endif | |
1188 | #ifdef CONFIG_LOGBUFFER | |
3d610186 | 1189 | #ifndef CONFIG_ALT_LB_ADDR |
228f29ac WD |
1190 | /* Also take the logbuffer into account (pram is in kB) */ |
1191 | pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024; | |
3d610186 | 1192 | #endif |
228f29ac | 1193 | #endif |
77ddac94 WD |
1194 | sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram); |
1195 | setenv ("mem", (char *)memsz); | |
fe8c2806 WD |
1196 | } |
1197 | #endif | |
1198 | ||
1c43771b WD |
1199 | #ifdef CONFIG_PS2KBD |
1200 | puts ("PS/2: "); | |
1201 | kbd_init(); | |
1202 | #endif | |
1203 | ||
4532cb69 WD |
1204 | #ifdef CONFIG_MODEM_SUPPORT |
1205 | { | |
1206 | extern int do_mdm_init; | |
1207 | do_mdm_init = gd->do_mdm_init; | |
1208 | } | |
1209 | #endif | |
1210 | ||
fe8c2806 WD |
1211 | /* Initialization complete - start the monitor */ |
1212 | ||
1213 | /* main_loop() can return to retry autoboot, if so just run it again. */ | |
1214 | for (;;) { | |
1215 | WATCHDOG_RESET (); | |
1216 | main_loop (); | |
1217 | } | |
1218 | ||
1219 | /* NOTREACHED - no way out of command loop except booting */ | |
1220 | } | |
1221 | ||
1222 | void hang (void) | |
1223 | { | |
1224 | puts ("### ERROR ### Please RESET the board ###\n"); | |
63e73c9a | 1225 | show_boot_progress(-30); |
fe8c2806 WD |
1226 | for (;;); |
1227 | } | |
1228 | ||
4532cb69 WD |
1229 | #ifdef CONFIG_MODEM_SUPPORT |
1230 | /* called from main loop (common/main.c) */ | |
77ddac94 WD |
1231 | /* 'inline' - We have to do it fast */ |
1232 | static inline void mdm_readline(char *buf, int bufsiz) | |
1233 | { | |
1234 | char c; | |
1235 | char *p; | |
1236 | int n; | |
1237 | ||
1238 | n = 0; | |
1239 | p = buf; | |
1240 | for(;;) { | |
1241 | c = serial_getc(); | |
1242 | ||
1243 | /* dbg("(%c)", c); */ | |
1244 | ||
1245 | switch(c) { | |
1246 | case '\r': | |
1247 | break; | |
1248 | case '\n': | |
1249 | *p = '\0'; | |
1250 | return; | |
1251 | ||
1252 | default: | |
1253 | if(n++ > bufsiz) { | |
1254 | *p = '\0'; | |
1255 | return; /* sanity check */ | |
1256 | } | |
1257 | *p = c; | |
1258 | p++; | |
1259 | break; | |
1260 | } | |
1261 | } | |
1262 | } | |
1263 | ||
4532cb69 WD |
1264 | extern void dbg(const char *fmt, ...); |
1265 | int mdm_init (void) | |
1266 | { | |
1267 | char env_str[16]; | |
1268 | char *init_str; | |
1269 | int i; | |
1270 | extern char console_buffer[]; | |
4532cb69 WD |
1271 | extern void enable_putc(void); |
1272 | extern int hwflow_onoff(int); | |
1273 | ||
1274 | enable_putc(); /* enable serial_putc() */ | |
1275 | ||
1276 | #ifdef CONFIG_HWFLOW | |
1277 | init_str = getenv("mdm_flow_control"); | |
1278 | if (init_str && (strcmp(init_str, "rts/cts") == 0)) | |
1279 | hwflow_onoff (1); | |
1280 | else | |
1281 | hwflow_onoff(-1); | |
1282 | #endif | |
1283 | ||
1284 | for (i = 1;;i++) { | |
1285 | sprintf(env_str, "mdm_init%d", i); | |
1286 | if ((init_str = getenv(env_str)) != NULL) { | |
1287 | serial_puts(init_str); | |
1288 | serial_puts("\n"); | |
1289 | for(;;) { | |
6d0f6bcf | 1290 | mdm_readline(console_buffer, CONFIG_SYS_CBSIZE); |
4532cb69 WD |
1291 | dbg("ini%d: [%s]", i, console_buffer); |
1292 | ||
1293 | if ((strcmp(console_buffer, "OK") == 0) || | |
1294 | (strcmp(console_buffer, "ERROR") == 0)) { | |
1295 | dbg("ini%d: cmd done", i); | |
1296 | break; | |
1297 | } else /* in case we are originating call ... */ | |
1298 | if (strncmp(console_buffer, "CONNECT", 7) == 0) { | |
1299 | dbg("ini%d: connect", i); | |
1300 | return 0; | |
1301 | } | |
1302 | } | |
1303 | } else | |
1304 | break; /* no init string - stop modem init */ | |
1305 | ||
1306 | udelay(100000); | |
1307 | } | |
1308 | ||
1309 | udelay(100000); | |
1310 | ||
1311 | /* final stage - wait for connect */ | |
1312 | for(;i > 1;) { /* if 'i' > 1 - wait for connection | |
1313 | message from modem */ | |
6d0f6bcf | 1314 | mdm_readline(console_buffer, CONFIG_SYS_CBSIZE); |
4532cb69 WD |
1315 | dbg("ini_f: [%s]", console_buffer); |
1316 | if (strncmp(console_buffer, "CONNECT", 7) == 0) { | |
1317 | dbg("ini_f: connected"); | |
1318 | return 0; | |
1319 | } | |
1320 | } | |
1321 | ||
1322 | return 0; | |
1323 | } | |
1324 | ||
4532cb69 WD |
1325 | #endif |
1326 | ||
fe8c2806 WD |
1327 | #if 0 /* We could use plain global data, but the resulting code is bigger */ |
1328 | /* | |
1329 | * Pointer to initial global data area | |
1330 | * | |
1331 | * Here we initialize it. | |
1332 | */ | |
1333 | #undef XTRN_DECLARE_GLOBAL_DATA_PTR | |
1334 | #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ | |
6d0f6bcf | 1335 | DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); |
fe8c2806 WD |
1336 | #endif /* 0 */ |
1337 | ||
1338 | /************************************************************************/ |