[J-u-boot.git] / include / configs / at91sam9rlek.h

/*
 * (C) Copyright 2007-2008
 * Stelian Pop <[email protected]>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * Configuation settings for the AT91SAM9RLEK board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* ARM asynchronous clock */
#define AT91_CPU_NAME		"AT91SAM9RL"
#define AT91_MAIN_CLOCK		200000000	/* from 12.000 MHz crystal */
#define AT91_MASTER_CLOCK	100000000	/* peripheral = main / 2 */
#define CONFIG_SYS_HZ			1000000		/* 1us resolution */

#define AT91_SLOW_CLOCK		32768	/* slow clock */

#define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
#define CONFIG_AT91SAM9RL	1	/* It's an Atmel AT91SAM9RL SoC*/
#define CONFIG_AT91SAM9RLEK	1	/* on an AT91SAM9RLEK Board	*/
#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/

#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG	1

#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT

/*
 * Hardware drivers
 */
#define CONFIG_ATMEL_USART	1
#undef CONFIG_USART0
#undef CONFIG_USART1
#undef CONFIG_USART2
#define CONFIG_USART3		1	/* USART 3 is DBGU */

/* LCD */
#define CONFIG_LCD			1
#define LCD_BPP				LCD_COLOR8
#define CONFIG_LCD_LOGO			1
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO			1
#define CONFIG_LCD_INFO_BELOW_LOGO	1
#define CONFIG_SYS_WHITE_ON_BLACK		1
#define CONFIG_ATMEL_LCD		1
#define CONFIG_ATMEL_LCD_RGB565		1
#define CONFIG_SYS_CONSOLE_IS_IN_ENV		1

#define CONFIG_BOOTDELAY	3

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_AUTOSCRIPT
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_USB

#define CONFIG_CMD_NAND		1

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			0x20000000
#define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */

/* DataFlash */
#define CONFIG_HAS_DATAFLASH		1
#define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
#define AT91_SPI_CLK			15000000
#define DATAFLASH_TCSS			(0x1a << 16)
#define DATAFLASH_TCHS			(0x1 << 24)

/* NOR flash - not present */
#define CONFIG_SYS_NO_FLASH			1

/* NAND flash */
#define NAND_MAX_CHIPS			1
#define CONFIG_SYS_MAX_NAND_DEVICE		1
#define CONFIG_SYS_NAND_BASE			0x40000000
#define CONFIG_SYS_NAND_DBW_8			1

/* Ethernet - not present */

/* USB - not supported */

#define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */

#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
#define CONFIG_SYS_MEMTEST_END			0x23e00000

#define CONFIG_SYS_USE_DATAFLASH		1
#undef CONFIG_SYS_USE_NANDFLASH

#ifdef CONFIG_SYS_USE_DATAFLASH

/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_ENV_IS_IN_DATAFLASH	1
#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
#define CONFIG_ENV_OFFSET		0x4200
#define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE		0x4200
#define CONFIG_BOOTCOMMAND	"cp.b 0xC0042000 0x22000000 0x210000; bootm"
#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
				"root=/dev/mtdblock0 " \
				"mtdparts=at91_nand:-(root) "\
				"rw rootfstype=jffs2"

#else /* CONFIG_SYS_USE_NANDFLASH */

/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_IS_IN_NAND	1
#define CONFIG_ENV_OFFSET		0x60000
#define CONFIG_ENV_OFFSET_REDUND	0x80000
#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0xA0000 0x200000; bootm"
#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
				"root=/dev/mtdblock5 " \
				"mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
				"rw rootfstype=jffs2"

#endif

#define CONFIG_BAUDRATE		115200
#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }

#define CONFIG_SYS_PROMPT		"U-Boot> "
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP		1
#define CONFIG_CMDLINE_EDITING	1

#define ROUND(A, B)		(((A) + (B)) & ~((B) - 1))
/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
#define CONFIG_SYS_GBL_DATA_SIZE	128	/* 128 bytes for initial data */

#define CONFIG_STACKSIZE	(32*1024)	/* regular stack */

#ifdef CONFIG_USE_IRQ
#error CONFIG_USE_IRQ not supported
#endif

#endif
Commit	Line	Data
2118ebb4 SP	1	/*
	2	* (C) Copyright 2007-2008
	3	* Stelian Pop <[email protected]>
	4	* Lead Tech Design <www.leadtechdesign.com>
	5	*
	6	* Configuation settings for the AT91SAM9RLEK board.
	7	*
	8	* See file CREDITS for list of people who contributed to this
	9	* project.
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of
	14	* the License, or (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	* MA 02111-1307 USA
	25	*/
	26
	27	#ifndef __CONFIG_H
	28	#define __CONFIG_H
	29
	30	/* ARM asynchronous clock */
761c70b8	31	#define AT91_CPU_NAME "AT91SAM9RL"
2118ebb4 SP	32	#define AT91_MAIN_CLOCK 200000000 /* from 12.000 MHz crystal */
2118ebb4 SP	33	#define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */
6d0f6bcf	34	#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
2118ebb4 SP	35
	36	#define AT91_SLOW_CLOCK 32768 /* slow clock */
	37
	38	#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
	39	#define CONFIG_AT91SAM9RL 1 /* It's an Atmel AT91SAM9RL SoC*/
	40	#define CONFIG_AT91SAM9RLEK 1 /* on an AT91SAM9RLEK Board */
	41	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	42
	43	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	44	#define CONFIG_SETUP_MEMORY_TAGS 1
	45	#define CONFIG_INITRD_TAG 1
	46
	47	#define CONFIG_SKIP_LOWLEVEL_INIT
	48	#define CONFIG_SKIP_RELOCATE_UBOOT
	49
	50	/*
	51	* Hardware drivers
	52	*/
	53	#define CONFIG_ATMEL_USART 1
	54	#undef CONFIG_USART0
	55	#undef CONFIG_USART1
	56	#undef CONFIG_USART2
	57	#define CONFIG_USART3 1 /* USART 3 is DBGU */
	58
761c70b8 SP	59	/* LCD */
	60	#define CONFIG_LCD 1
	61	#define LCD_BPP LCD_COLOR8
	62	#define CONFIG_LCD_LOGO 1
	63	#undef LCD_TEST_PATTERN
	64	#define CONFIG_LCD_INFO 1
	65	#define CONFIG_LCD_INFO_BELOW_LOGO 1
6d0f6bcf	66	#define CONFIG_SYS_WHITE_ON_BLACK 1
761c70b8 SP	67	#define CONFIG_ATMEL_LCD 1
761c70b8 SP	68	#define CONFIG_ATMEL_LCD_RGB565 1
6d0f6bcf	69	#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
761c70b8	70
2118ebb4 SP	71	#define CONFIG_BOOTDELAY 3
2118ebb4 SP	72
2118ebb4 SP	73	/*
	74	* Command line configuration.
	75	*/
	76	#include <config_cmd_default.h>
	77	#undef CONFIG_CMD_BDI
	78	#undef CONFIG_CMD_IMI
	79	#undef CONFIG_CMD_AUTOSCRIPT
	80	#undef CONFIG_CMD_FPGA
	81	#undef CONFIG_CMD_LOADS
	82	#undef CONFIG_CMD_IMLS
	83	#undef CONFIG_CMD_NET
	84	#undef CONFIG_CMD_USB
	85
	86	#define CONFIG_CMD_NAND 1
	87
	88	/* SDRAM */
	89	#define CONFIG_NR_DRAM_BANKS 1
	90	#define PHYS_SDRAM 0x20000000
	91	#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
	92
	93	/* DataFlash */
	94	#define CONFIG_HAS_DATAFLASH 1
6d0f6bcf JCPV	95	#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
	96	#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
	97	#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
2118ebb4 SP	98	#define AT91_SPI_CLK 15000000
	99	#define DATAFLASH_TCSS (0x1a << 16)
	100	#define DATAFLASH_TCHS (0x1 << 24)
	101
	102	/* NOR flash - not present */
6d0f6bcf	103	#define CONFIG_SYS_NO_FLASH 1
2118ebb4 SP	104
	105	/* NAND flash */
	106	#define NAND_MAX_CHIPS 1
6d0f6bcf JCPV	107	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	108	#define CONFIG_SYS_NAND_BASE 0x40000000
	109	#define CONFIG_SYS_NAND_DBW_8 1
2118ebb4 SP	110
	111	/* Ethernet - not present */
	112
	113	/* USB - not supported */
	114
6d0f6bcf	115	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
2118ebb4	116
6d0f6bcf JCPV	117	#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
6d0f6bcf JCPV	118	#define CONFIG_SYS_MEMTEST_END 0x23e00000
2118ebb4	119
6d0f6bcf JCPV	120	#define CONFIG_SYS_USE_DATAFLASH 1
6d0f6bcf JCPV	121	#undef CONFIG_SYS_USE_NANDFLASH
2118ebb4	122
6d0f6bcf	123	#ifdef CONFIG_SYS_USE_DATAFLASH
2118ebb4 SP	124
2118ebb4 SP	125	/* bootstrap + u-boot + env + linux in dataflash on CS0 */
057c849c	126	#define CONFIG_ENV_IS_IN_DATAFLASH 1
6d0f6bcf	127	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
0e8d1586	128	#define CONFIG_ENV_OFFSET 0x4200
6d0f6bcf	129	#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
0e8d1586	130	#define CONFIG_ENV_SIZE 0x4200
2118ebb4 SP	131	#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
	132	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
	133	"root=/dev/mtdblock0 " \
	134	"mtdparts=at91_nand:-(root) "\
	135	"rw rootfstype=jffs2"
	136
6d0f6bcf	137	#else /* CONFIG_SYS_USE_NANDFLASH */
2118ebb4 SP	138
2118ebb4 SP	139	/* bootstrap + u-boot + env + linux in nandflash */
51bfee19	140	#define CONFIG_ENV_IS_IN_NAND 1
0e8d1586 JCPV	141	#define CONFIG_ENV_OFFSET 0x60000
	142	#define CONFIG_ENV_OFFSET_REDUND 0x80000
	143	#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
2118ebb4 SP	144	#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
	145	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
	146	"root=/dev/mtdblock5 " \
	147	"mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
	148	"rw rootfstype=jffs2"
	149
	150	#endif
	151
	152	#define CONFIG_BAUDRATE 115200
6d0f6bcf	153	#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
2118ebb4	154
6d0f6bcf JCPV	155	#define CONFIG_SYS_PROMPT "U-Boot> "
	156	#define CONFIG_SYS_CBSIZE 256
	157	#define CONFIG_SYS_MAXARGS 16
	158	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	159	#define CONFIG_SYS_LONGHELP 1
2118ebb4 SP	160	#define CONFIG_CMDLINE_EDITING 1
	161
	162	#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
	163	/*
	164	* Size of malloc() pool
	165	*/
6d0f6bcf JCPV	166	#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
6d0f6bcf JCPV	167	#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
2118ebb4 SP	168
	169	#define CONFIG_STACKSIZE (321024) / regular stack */
	170
	171	#ifdef CONFIG_USE_IRQ
	172	#error CONFIG_USE_IRQ not supported
	173	#endif
	174
	175	#endif