[J-u-boot.git] / include / configs / M5275EVB.h

/*
 * Configuation settings for the Motorola MC5275EVB board.
 *
 * By Arthur Shipkowski <[email protected]>
 * Copyright (C) 2005 Videon Central, Inc.
 *
 * Based off of M5272C3 board code by Josef Baumgartner
 * <[email protected]>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * board/config.h - configuration options, board specific
 */

#ifndef _M5275EVB_H
#define _M5275EVB_H

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_MCF52x2			/* define processor family */
#define CONFIG_M5275			/* define processor type */
#define CONFIG_M5275EVB			/* define board type */

#define CONFIG_MCFTMR

#define CONFIG_MCFUART
#define CONFIG_SYS_UART_PORT		(0)
#define CONFIG_BAUDRATE		115200
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600 , 19200 , 38400 , 57600, 115200 }

/* Configuration for environment
 * Environment is embedded in u-boot in the second sector of the flash
 */
#ifndef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_ENV_OFFSET		0x4000
#define CONFIG_ENV_SECT_SIZE	0x2000
#define CONFIG_ENV_IS_IN_FLASH	1
#define CONFIG_ENV_IS_EMBEDDED	1
#else
#define CONFIG_ENV_ADDR		0xffe04000
#define CONFIG_ENV_SECT_SIZE	0x2000
#define CONFIG_ENV_IS_IN_FLASH	1
#endif

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/* Available command configuration */
#include <config_cmd_default.h>

#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_CMD_ELF
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_DHCP

#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_LOADB

#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
#define CONFIG_NET_MULTI	1
#define CONFIG_MII		1
#define CONFIG_MII_INIT		1
#define CONFIG_SYS_DISCOVER_PHY
#define CONFIG_SYS_RX_ETH_BUFFER	8
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
#define CONFIG_SYS_FEC0_PINMUX		0
#define CONFIG_SYS_FEC0_MIIBASE	CONFIG_SYS_FEC0_IOBASE
#define CONFIG_SYS_FEC1_PINMUX		0
#define CONFIG_SYS_FEC1_MIIBASE	CONFIG_SYS_FEC1_IOBASE
#define MCFFEC_TOUT_LOOP	50000
#define CONFIG_HAS_ETH1
/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
#ifndef CONFIG_SYS_DISCOVER_PHY
#define FECDUPLEX		FULL
#define FECSPEED		_100BASET
#else
#ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
#endif
#endif
#endif

/* I2C */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C		/* I2C with hw support */
#undef CONFIG_SOFT_I2C
#define CONFIG_SYS_I2C_SPEED		80000
#define CONFIG_SYS_I2C_SLAVE		0x7F
#define CONFIG_SYS_I2C_OFFSET		0x00000300
#define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
#define CONFIG_SYS_I2C_PINMUX_REG	(gpio_reg->par_feci2c)
#define CONFIG_SYS_I2C_PINMUX_CLR	(0xFFF0)
#define CONFIG_SYS_I2C_PINMUX_SET	(0x000F)

#ifdef CONFIG_MCFFEC
#define CONFIG_ETHADDR		00:06:3b:01:41:55
#define CONFIG_ETH1ADDR		00:0e:0c:bc:e5:60
#endif

#define CONFIG_SYS_PROMPT		"-> "
#define CONFIG_SYS_LONGHELP		/* undef to save memory	*/

#if (CONFIG_CMD_KGDB)
#	define CONFIG_SYS_CBSIZE	1024
#else
#	define CONFIG_SYS_CBSIZE	256
#endif
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

#define CONFIG_SYS_LOAD_ADDR		0x800000

#define CONFIG_BOOTDELAY	5
#define CONFIG_BOOTCOMMAND	"bootm ffe40000"
#define CONFIG_SYS_MEMTEST_START	0x400
#define CONFIG_SYS_MEMTEST_END		0x380000

#define CONFIG_SYS_HZ			1000
#define CONFIG_SYS_CLK			150000000

/*
 * Low Level Configuration Settings
 * (address mappings, register initial values, etc.)
 * You should know what you are doing if you make changes here.
 */

#define CONFIG_SYS_MBAR		0x40000000

/*-----------------------------------------------------------------------
 * Definitions for initial stack pointer and data area (in DPRAM)
 */
#define CONFIG_SYS_INIT_RAM_ADDR	0x20000000
#define CONFIG_SYS_INIT_RAM_END	0x10000	/* End of used area in internal SRAM */
#define CONFIG_SYS_GBL_DATA_SIZE	1000	/* bytes reserved for initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET

/*-----------------------------------------------------------------------
 * Start addresses for the final memory configuration
 * (Set up by the startup code)
 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 */
#define CONFIG_SYS_SDRAM_BASE		0x00000000
#define CONFIG_SYS_SDRAM_SIZE		16	/* SDRAM size in MB */
#define CONFIG_SYS_FLASH_BASE		0xffe00000

#ifdef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_SYS_MONITOR_BASE	0x20000
#else
#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
#endif

#define CONFIG_SYS_MONITOR_LEN		0x20000
#define CONFIG_SYS_MALLOC_LEN		(256 << 10)
#define CONFIG_SYS_BOOTPARAMS_LEN	64*1024

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization ??
 */
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial mmap for Linux */

/*-----------------------------------------------------------------------
 * FLASH organization
 */
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT	11	/* max number of sectors on one chip */
#define CONFIG_SYS_FLASH_ERASE_TOUT	1000

#define CONFIG_SYS_FLASH_CFI		1
#define CONFIG_FLASH_CFI_DRIVER	1
#define CONFIG_SYS_FLASH_SIZE		0x200000

/*-----------------------------------------------------------------------
 * Cache Configuration
 */
#define CONFIG_SYS_CACHELINE_SIZE	16

/*-----------------------------------------------------------------------
 * Memory bank definitions
 */
#define CONFIG_SYS_AR0_PRELIM		(CONFIG_SYS_FLASH_BASE >> 16)
#define CONFIG_SYS_CR0_PRELIM		0x1980
#define CONFIG_SYS_MR0_PRELIM		0x001F0001

#define CONFIG_SYS_AR1_PRELIM		0x3000
#define CONFIG_SYS_CR1_PRELIM		0x1900
#define CONFIG_SYS_MR1_PRELIM		0x00070001

/*-----------------------------------------------------------------------
 * Port configuration
 */
#define CONFIG_SYS_FECI2C		0x0FA0

#endif	/* _M5275EVB_H */
Commit	Line	Data
545c8e0a MF	1	/*
	2	* Configuation settings for the Motorola MC5275EVB board.
	3	*
	4	* By Arthur Shipkowski <[email protected]>
	5	* Copyright (C) 2005 Videon Central, Inc.
	6	*
	7	* Based off of M5272C3 board code by Josef Baumgartner
	8	* <[email protected]>
	9	*
	10	* See file CREDITS for list of people who contributed to this
	11	* project.
	12	*
	13	* This program is free software; you can redistribute it and/or
	14	* modify it under the terms of the GNU General Public License as
	15	* published by the Free Software Foundation; either version 2 of
	16	* the License, or (at your option) any later version.
	17	*
	18	* This program is distributed in the hope that it will be useful,
	19	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	20	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	21	* GNU General Public License for more details.
	22	*
	23	* You should have received a copy of the GNU General Public License
	24	* along with this program; if not, write to the Free Software
	25	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	26	* MA 02111-1307 USA
	27	*/
	28
	29	/*
	30	* board/config.h - configuration options, board specific
	31	*/
	32
	33	#ifndef _M5275EVB_H
	34	#define _M5275EVB_H
	35
	36	/*
	37	* High Level Configuration Options
	38	* (easy to change)
	39	*/
	40	#define CONFIG_MCF52x2 /* define processor family */
	41	#define CONFIG_M5275 /* define processor type */
	42	#define CONFIG_M5275EVB /* define board type */
	43
	44	#define CONFIG_MCFTMR
	45
	46	#define CONFIG_MCFUART
6d0f6bcf	47	#define CONFIG_SYS_UART_PORT (0)
79e0799c	48	#define CONFIG_BAUDRATE 115200
6d0f6bcf	49	#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
545c8e0a MF	50
	51	/* Configuration for environment
	52	* Environment is embedded in u-boot in the second sector of the flash
	53	*/
	54	#ifndef CONFIG_MONITOR_IS_IN_RAM
0e8d1586 JCPV	55	#define CONFIG_ENV_OFFSET 0x4000
0e8d1586 JCPV	56	#define CONFIG_ENV_SECT_SIZE 0x2000
5a1aceb0	57	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586	58	#define CONFIG_ENV_IS_EMBEDDED 1
545c8e0a	59	#else
0e8d1586 JCPV	60	#define CONFIG_ENV_ADDR 0xffe04000
0e8d1586 JCPV	61	#define CONFIG_ENV_SECT_SIZE 0x2000
5a1aceb0	62	#define CONFIG_ENV_IS_IN_FLASH 1
545c8e0a MF	63	#endif
	64
	65	/*
	66	* BOOTP options
	67	*/
	68	#define CONFIG_BOOTP_BOOTFILESIZE
	69	#define CONFIG_BOOTP_BOOTPATH
	70	#define CONFIG_BOOTP_GATEWAY
	71	#define CONFIG_BOOTP_HOSTNAME
	72
	73	/* Available command configuration */
	74	#include <config_cmd_default.h>
	75
	76	#define CONFIG_CMD_PING
	77	#define CONFIG_CMD_MII
	78	#define CONFIG_CMD_NET
	79	#define CONFIG_CMD_ELF
	80	#define CONFIG_CMD_FLASH
	81	#define CONFIG_CMD_I2C
	82	#define CONFIG_CMD_MEMORY
	83	#define CONFIG_CMD_DHCP
	84
	85	#undef CONFIG_CMD_LOADS
	86	#undef CONFIG_CMD_LOADB
	87
	88	#define CONFIG_MCFFEC
	89	#ifdef CONFIG_MCFFEC
	90	#define CONFIG_NET_MULTI 1
	91	#define CONFIG_MII 1
0f3ba7e9	92	#define CONFIG_MII_INIT 1
6d0f6bcf JCPV	93	#define CONFIG_SYS_DISCOVER_PHY
	94	#define CONFIG_SYS_RX_ETH_BUFFER 8
	95	#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
	96	#define CONFIG_SYS_FEC0_PINMUX 0
	97	#define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
	98	#define CONFIG_SYS_FEC1_PINMUX 0
	99	#define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE
545c8e0a MF	100	#define MCFFEC_TOUT_LOOP 50000
545c8e0a MF	101	#define CONFIG_HAS_ETH1
6d0f6bcf JCPV	102	/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
6d0f6bcf JCPV	103	#ifndef CONFIG_SYS_DISCOVER_PHY
545c8e0a MF	104	#define FECDUPLEX FULL
	105	#define FECSPEED _100BASET
	106	#else
6d0f6bcf JCPV	107	#ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
6d0f6bcf JCPV	108	#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
545c8e0a MF	109	#endif
	110	#endif
	111	#endif
	112
	113	/* I2C */
	114	#define CONFIG_FSL_I2C
	115	#define CONFIG_HARD_I2C /* I2C with hw support */
	116	#undef CONFIG_SOFT_I2C
6d0f6bcf JCPV	117	#define CONFIG_SYS_I2C_SPEED 80000
	118	#define CONFIG_SYS_I2C_SLAVE 0x7F
	119	#define CONFIG_SYS_I2C_OFFSET 0x00000300
	120	#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
	121	#define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
	122	#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
	123	#define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
545c8e0a MF	124
	125	#ifdef CONFIG_MCFFEC
	126	#define CONFIG_ETHADDR 00:06:3b:01:41:55
	127	#define CONFIG_ETH1ADDR 00:0e:0c:bc:e5:60
	128	#endif
	129
6d0f6bcf JCPV	130	#define CONFIG_SYS_PROMPT "-> "
6d0f6bcf JCPV	131	#define CONFIG_SYS_LONGHELP /* undef to save memory */
545c8e0a MF	132
545c8e0a MF	133	#if (CONFIG_CMD_KGDB)
6d0f6bcf	134	# define CONFIG_SYS_CBSIZE 1024
545c8e0a	135	#else
6d0f6bcf	136	# define CONFIG_SYS_CBSIZE 256
545c8e0a	137	#endif
6d0f6bcf JCPV	138	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	139	#define CONFIG_SYS_MAXARGS 16
	140	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
545c8e0a	141
6d0f6bcf	142	#define CONFIG_SYS_LOAD_ADDR 0x800000
545c8e0a MF	143
	144	#define CONFIG_BOOTDELAY 5
	145	#define CONFIG_BOOTCOMMAND "bootm ffe40000"
6d0f6bcf JCPV	146	#define CONFIG_SYS_MEMTEST_START 0x400
6d0f6bcf JCPV	147	#define CONFIG_SYS_MEMTEST_END 0x380000
545c8e0a	148
6d0f6bcf JCPV	149	#define CONFIG_SYS_HZ 1000
6d0f6bcf JCPV	150	#define CONFIG_SYS_CLK 150000000
545c8e0a MF	151
	152	/*
	153	* Low Level Configuration Settings
	154	* (address mappings, register initial values, etc.)
	155	* You should know what you are doing if you make changes here.
	156	*/
	157
6d0f6bcf	158	#define CONFIG_SYS_MBAR 0x40000000
545c8e0a MF	159
	160	/*-----------------------------------------------------------------------
	161	* Definitions for initial stack pointer and data area (in DPRAM)
	162	*/
6d0f6bcf JCPV	163	#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
	164	#define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
	165	#define CONFIG_SYS_GBL_DATA_SIZE 1000 /* bytes reserved for initial data */
	166	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
	167	#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
545c8e0a MF	168
	169	/*-----------------------------------------------------------------------
	170	* Start addresses for the final memory configuration
	171	* (Set up by the startup code)
6d0f6bcf	172	* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
545c8e0a	173	*/
6d0f6bcf JCPV	174	#define CONFIG_SYS_SDRAM_BASE 0x00000000
	175	#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
	176	#define CONFIG_SYS_FLASH_BASE 0xffe00000
545c8e0a MF	177
545c8e0a MF	178	#ifdef CONFIG_MONITOR_IS_IN_RAM
6d0f6bcf	179	#define CONFIG_SYS_MONITOR_BASE 0x20000
545c8e0a	180	#else
6d0f6bcf	181	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
545c8e0a MF	182	#endif
545c8e0a MF	183
6d0f6bcf JCPV	184	#define CONFIG_SYS_MONITOR_LEN 0x20000
	185	#define CONFIG_SYS_MALLOC_LEN (256 << 10)
	186	#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
545c8e0a MF	187
	188	/*
	189	* For booting Linux, the board info and command line data
	190	* have to be in the first 8 MB of memory, since this is
	191	* the maximum mapped by the Linux kernel during initialization ??
	192	*/
6d0f6bcf	193	#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial mmap for Linux */
545c8e0a MF	194
	195	/*-----------------------------------------------------------------------
	196	* FLASH organization
	197	*/
6d0f6bcf JCPV	198	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
	199	#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
	200	#define CONFIG_SYS_FLASH_ERASE_TOUT 1000
545c8e0a	201
6d0f6bcf	202	#define CONFIG_SYS_FLASH_CFI 1
00b1883a	203	#define CONFIG_FLASH_CFI_DRIVER 1
6d0f6bcf	204	#define CONFIG_SYS_FLASH_SIZE 0x200000
545c8e0a MF	205
	206	/*-----------------------------------------------------------------------
	207	* Cache Configuration
	208	*/
6d0f6bcf	209	#define CONFIG_SYS_CACHELINE_SIZE 16
545c8e0a MF	210
	211	/*-----------------------------------------------------------------------
	212	* Memory bank definitions
	213	*/
6d0f6bcf JCPV	214	#define CONFIG_SYS_AR0_PRELIM (CONFIG_SYS_FLASH_BASE >> 16)
	215	#define CONFIG_SYS_CR0_PRELIM 0x1980
	216	#define CONFIG_SYS_MR0_PRELIM 0x001F0001
545c8e0a	217
6d0f6bcf JCPV	218	#define CONFIG_SYS_AR1_PRELIM 0x3000
	219	#define CONFIG_SYS_CR1_PRELIM 0x1900
	220	#define CONFIG_SYS_MR1_PRELIM 0x00070001
545c8e0a MF	221
	222	/*-----------------------------------------------------------------------
	223	* Port configuration
	224	*/
6d0f6bcf	225	#define CONFIG_SYS_FECI2C 0x0FA0
545c8e0a MF	226
545c8e0a MF	227	#endif /* _M5275EVB_H */