[J-u-boot.git] / board / Marvell / db-88f6281-bp / db-88f6281-bp.c

// SPDX-License-Identifier: GPL-2.0+

#include <common.h>
#include <init.h>
#include <net.h>
#include <linux/io.h>
#include <miiphy.h>
#include <netdev.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <asm/arch/mpp.h>
#include <asm/arch/gpio.h>

#define DB_88F6281_OE_LOW	~(BIT(7))
#define DB_88F6281_OE_HIGH	~(BIT(15) | BIT(14) | BIT(13) | BIT(4))
#define DB_88F6281_OE_VAL_LOW	BIT(7)
#define DB_88F6281_OE_VAL_HIGH	0

DECLARE_GLOBAL_DATA_PTR;

int board_early_init_f(void)
{
	mvebu_config_gpio(DB_88F6281_OE_VAL_LOW,
			  DB_88F6281_OE_VAL_HIGH,
			  DB_88F6281_OE_LOW, DB_88F6281_OE_HIGH);

	/* Multi-Purpose Pins Functionality configuration */
	static const u32 kwmpp_config[] = {
#ifdef CONFIG_CMD_NAND
		MPP0_NF_IO2,
		MPP1_NF_IO3,
		MPP2_NF_IO4,
		MPP3_NF_IO5,
#else
		MPP0_SPI_SCn,
		MPP1_SPI_MOSI,
		MPP2_SPI_SCK,
		MPP3_SPI_MISO,
#endif
		MPP4_NF_IO6,
		MPP5_NF_IO7,
		MPP6_SYSRST_OUTn,
		MPP7_GPO,
		MPP8_TW_SDA,
		MPP9_TW_SCK,
		MPP10_UART0_TXD,
		MPP11_UART0_RXD,
		MPP12_SD_CLK,
		MPP13_SD_CMD,
		MPP14_SD_D0,
		MPP15_SD_D1,
		MPP16_SD_D2,
		MPP17_SD_D3,
		MPP18_NF_IO0,
		MPP19_NF_IO1,
		MPP20_SATA1_ACTn,
		MPP21_SATA0_ACTn,
		MPP22_GPIO,
		MPP23_GPIO,
		MPP24_GPIO,
		MPP25_GPIO,
		MPP26_GPIO,
		MPP27_GPIO,
		MPP28_GPIO,
		MPP29_GPIO,
		MPP30_GPIO,
		MPP31_GPIO,
		MPP32_GPIO,
		MPP33_GPIO,
		MPP34_GPIO,
		MPP35_GPIO,
		MPP36_GPIO,
		MPP37_GPIO,
		MPP38_GPIO,
		MPP39_GPIO,
		MPP40_GPIO,
		MPP41_GPIO,
		MPP42_GPIO,
		MPP43_GPIO,
		MPP44_GPIO,
		MPP45_GPIO,
		MPP46_GPIO,
		MPP47_GPIO,
		MPP48_GPIO,
		MPP49_GPIO,
		0
	};
	kirkwood_mpp_conf(kwmpp_config, NULL);

	return 0;
}

int board_init(void)
{
	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;

	return 0;
}

#ifdef CONFIG_RESET_PHY_R
/* automatically defined by kirkwood config.h */
void reset_phy(void)
{
}
#endif
Commit	Line	Data
d55254ab CP	1	// SPDX-License-Identifier: GPL-2.0+
	2
	3	#include <common.h>
691d719d	4	#include <init.h>
5e6267af	5	#include <net.h>
d55254ab CP	6	#include <linux/io.h>
	7	#include <miiphy.h>
	8	#include <netdev.h>
	9	#include <asm/arch/cpu.h>
	10	#include <asm/arch/soc.h>
	11	#include <asm/arch/mpp.h>
	12	#include <asm/arch/gpio.h>
	13
	14	#define DB_88F6281_OE_LOW ~(BIT(7))
	15	#define DB_88F6281_OE_HIGH ~(BIT(15) \| BIT(14) \| BIT(13) \| BIT(4))
	16	#define DB_88F6281_OE_VAL_LOW BIT(7)
	17	#define DB_88F6281_OE_VAL_HIGH 0
	18
	19	DECLARE_GLOBAL_DATA_PTR;
	20
	21	int board_early_init_f(void)
	22	{
	23	mvebu_config_gpio(DB_88F6281_OE_VAL_LOW,
	24	DB_88F6281_OE_VAL_HIGH,
	25	DB_88F6281_OE_LOW, DB_88F6281_OE_HIGH);
	26
	27	/* Multi-Purpose Pins Functionality configuration */
	28	static const u32 kwmpp_config[] = {
	29	#ifdef CONFIG_CMD_NAND
	30	MPP0_NF_IO2,
	31	MPP1_NF_IO3,
	32	MPP2_NF_IO4,
	33	MPP3_NF_IO5,
	34	#else
	35	MPP0_SPI_SCn,
	36	MPP1_SPI_MOSI,
	37	MPP2_SPI_SCK,
	38	MPP3_SPI_MISO,
	39	#endif
	40	MPP4_NF_IO6,
	41	MPP5_NF_IO7,
	42	MPP6_SYSRST_OUTn,
	43	MPP7_GPO,
	44	MPP8_TW_SDA,
	45	MPP9_TW_SCK,
	46	MPP10_UART0_TXD,
	47	MPP11_UART0_RXD,
	48	MPP12_SD_CLK,
	49	MPP13_SD_CMD,
	50	MPP14_SD_D0,
	51	MPP15_SD_D1,
	52	MPP16_SD_D2,
	53	MPP17_SD_D3,
	54	MPP18_NF_IO0,
	55	MPP19_NF_IO1,
	56	MPP20_SATA1_ACTn,
	57	MPP21_SATA0_ACTn,
	58	MPP22_GPIO,
	59	MPP23_GPIO,
	60	MPP24_GPIO,
	61	MPP25_GPIO,
	62	MPP26_GPIO,
	63	MPP27_GPIO,
	64	MPP28_GPIO,
	65	MPP29_GPIO,
	66	MPP30_GPIO,
	67	MPP31_GPIO,
	68	MPP32_GPIO,
	69	MPP33_GPIO,
70	MPP34_GPIO,
71	MPP35_GPIO,
72	MPP36_GPIO,
73	MPP37_GPIO,
74	MPP38_GPIO,
75	MPP39_GPIO,
76	MPP40_GPIO,
77	MPP41_GPIO,
78	MPP42_GPIO,
79	MPP43_GPIO,
80	MPP44_GPIO,
81	MPP45_GPIO,
82	MPP46_GPIO,
83	MPP47_GPIO,
84	MPP48_GPIO,
85	MPP49_GPIO,
86	0
87	};
88	kirkwood_mpp_conf(kwmpp_config, NULL);
89
90	return 0;
91	}
92
93	int board_init(void)
94	{
95	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
96
97	return 0;
98	}
99
100	#ifdef CONFIG_RESET_PHY_R
101	/* automatically defined by kirkwood config.h */
102	void reset_phy(void)
103	{
104	}
105	#endif