[J-u-boot.git] / drivers / rtc / ds1306.c

/*
 * (C) Copyright 2002 SIXNET, [email protected].
 *
 * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
 * Stephan Linz <[email protected]>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * Date & Time support for DS1306 RTC using SPI:
 *
 *    - SXNI855T:    it uses its own soft SPI here in this file
 *    - all other:   use the external spi_xfer() function
 *                   (see include/spi.h)
 */

#include <common.h>
#include <command.h>
#include <rtc.h>
#include <spi.h>

#if defined(CONFIG_CMD_DATE)

#define	RTC_SECONDS		0x00
#define	RTC_MINUTES		0x01
#define	RTC_HOURS		0x02
#define	RTC_DAY_OF_WEEK		0x03
#define	RTC_DATE_OF_MONTH	0x04
#define	RTC_MONTH		0x05
#define	RTC_YEAR		0x06

#define	RTC_SECONDS_ALARM0	0x07
#define	RTC_MINUTES_ALARM0	0x08
#define	RTC_HOURS_ALARM0	0x09
#define	RTC_DAY_OF_WEEK_ALARM0	0x0a

#define	RTC_SECONDS_ALARM1	0x0b
#define	RTC_MINUTES_ALARM1	0x0c
#define	RTC_HOURS_ALARM1	0x0d
#define	RTC_DAY_OF_WEEK_ALARM1	0x0e

#define	RTC_CONTROL		0x0f
#define	RTC_STATUS		0x10
#define	RTC_TRICKLE_CHARGER	0x11

#define	RTC_USER_RAM_BASE	0x20

/* ************************************************************************* */
#ifdef CONFIG_SXNI855T		/* !!! SHOULD BE CHANGED TO NEW CODE !!! */

static void soft_spi_send (unsigned char n);
static unsigned char soft_spi_read (void);
static void init_spi (void);

/*-----------------------------------------------------------------------
 * Definitions
 */

#define	PB_SPISCK	0x00000002	/* PB 30 */
#define PB_SPIMOSI	0x00000004	/* PB 29 */
#define PB_SPIMISO	0x00000008	/* PB 28 */
#define PB_SPI_CE	0x00010000	/* PB 15 */

/* ------------------------------------------------------------------------- */

/* read clock time from DS1306 and return it in *tmp */
int rtc_get (struct rtc_time *tmp)
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
	unsigned char spi_byte;	/* Data Byte */

	init_spi ();		/* set port B for software SPI */

	/* Now we can enable the DS1306 RTC */
	immap->im_cpm.cp_pbdat |= PB_SPI_CE;
	udelay (10);

	/* Shift out the address (0) of the time in the Clock Chip */
	soft_spi_send (0);

	/* Put the clock readings into the rtc_time structure */
	tmp->tm_sec = bcd2bin (soft_spi_read ());	/* Read seconds */
	tmp->tm_min = bcd2bin (soft_spi_read ());	/* Read minutes */

	/* Hours are trickier */
	spi_byte = soft_spi_read ();	/* Read Hours into temporary value */
	if (spi_byte & 0x40) {
		/* 12 hour mode bit is set (time is in 1-12 format) */
		if (spi_byte & 0x20) {
			/* since PM we add 11 to get 0-23 for hours */
			tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11;
		} else {
			/* since AM we subtract 1 to get 0-23 for hours */
			tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1;
		}
	} else {
		/* Otherwise, 0-23 hour format */
		tmp->tm_hour = (bcd2bin (spi_byte & 0x3F));
	}

	soft_spi_read ();	/* Read and discard Day of week */
	tmp->tm_mday = bcd2bin (soft_spi_read ());	/* Read Day of the Month */
	tmp->tm_mon = bcd2bin (soft_spi_read ());	/* Read Month */

	/* Read Year and convert to this century */
	tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000;

	/* Now we can disable the DS1306 RTC */
	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/* Disable DS1306 Chip */
	udelay (10);

	GregorianDay (tmp);	/* Determine the day of week */

	debug ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	return 0;
}

/* ------------------------------------------------------------------------- */

/* set clock time in DS1306 RTC and in MPC8xx RTC */
int rtc_set (struct rtc_time *tmp)
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

	init_spi ();		/* set port B for software SPI */

	/* Now we can enable the DS1306 RTC */
	immap->im_cpm.cp_pbdat |= PB_SPI_CE;	/* Enable DS1306 Chip */
	udelay (10);

	/* First disable write protect in the clock chip control register */
	soft_spi_send (0x8F);	/* send address of the control register */
	soft_spi_send (0x00);	/* send control register contents */

	/* Now disable the DS1306 to terminate the write */
	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
	udelay (10);

	/* Now enable the DS1306 to initiate a new write */
	immap->im_cpm.cp_pbdat |= PB_SPI_CE;
	udelay (10);

	/* Next, send the address of the clock time write registers */
	soft_spi_send (0x80);	/* send address of the first time register */

	/* Use Burst Mode to send all of the time data to the clock */
	bin2bcd (tmp->tm_sec);
	soft_spi_send (bin2bcd (tmp->tm_sec));	/* Send Seconds */
	soft_spi_send (bin2bcd (tmp->tm_min));	/* Send Minutes */
	soft_spi_send (bin2bcd (tmp->tm_hour));	/* Send Hour */
	soft_spi_send (bin2bcd (tmp->tm_wday));	/* Send Day of the Week */
	soft_spi_send (bin2bcd (tmp->tm_mday));	/* Send Day of Month */
	soft_spi_send (bin2bcd (tmp->tm_mon));	/* Send Month */
	soft_spi_send (bin2bcd (tmp->tm_year - 2000));	/* Send Year */

	/* Now we can disable the Clock chip to terminate the burst write */
	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/* Disable DS1306 Chip */
	udelay (10);

	/* Now we can enable the Clock chip to initiate a new write */
	immap->im_cpm.cp_pbdat |= PB_SPI_CE;	/* Enable DS1306 Chip */
	udelay (10);

	/* First we Enable write protect in the clock chip control register */
	soft_spi_send (0x8F);	/* send address of the control register */
	soft_spi_send (0x40);	/* send out Control Register contents */

	/* Now disable the DS1306 */
	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/*  Disable DS1306 Chip */
	udelay (10);

	/* Set standard MPC8xx clock to the same time so Linux will
	 * see the time even if it doesn't have a DS1306 clock driver.
	 * This helps with experimenting with standard kernels.
	 */
	{
		ulong tim;

		tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
			      tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

		immap->im_sitk.sitk_rtck = KAPWR_KEY;
		immap->im_sit.sit_rtc = tim;
	}

	debug ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	return 0;
}

/* ------------------------------------------------------------------------- */

/* Initialize Port B for software SPI */
static void init_spi (void)
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

	/* Force output pins to begin at logic 0 */
	immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK);

	/* Set these 3 signals as outputs */
	immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK);

	immap->im_cpm.cp_pbdir &= ~PB_SPIMISO;	/* Make MISO pin an input */
	udelay (10);
}

/* ------------------------------------------------------------------------- */

/* NOTE: soft_spi_send() assumes that the I/O lines are configured already */
static void soft_spi_send (unsigned char n)
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
	unsigned char bitpos;	/* bit position to receive */
	unsigned char i;	/* Loop Control */

	/* bit position to send, start with most significant bit */
	bitpos = 0x80;

	/* Send 8 bits to software SPI */
	for (i = 0; i < 8; i++) {	/* Loop for 8 bits */
		immap->im_cpm.cp_pbdat |= PB_SPISCK;	/* Raise SCK */

		if (n & bitpos)
			immap->im_cpm.cp_pbdat |= PB_SPIMOSI;	/* Set MOSI to 1 */
		else
			immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI;	/* Set MOSI to 0 */
		udelay (10);

		immap->im_cpm.cp_pbdat &= ~PB_SPISCK;	/* Lower SCK */
		udelay (10);

		bitpos >>= 1;	/* Shift for next bit position */
	}
}

/* ------------------------------------------------------------------------- */

/* NOTE: soft_spi_read() assumes that the I/O lines are configured already */
static unsigned char soft_spi_read (void)
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

	unsigned char spi_byte = 0;	/* Return value, assume success */
	unsigned char bitpos;	/* bit position to receive */
	unsigned char i;	/* Loop Control */

	/* bit position to receive, start with most significant bit */
	bitpos = 0x80;

	/* Read 8 bits here */
	for (i = 0; i < 8; i++) {	/* Do 8 bits in loop */
		immap->im_cpm.cp_pbdat |= PB_SPISCK;	/* Raise SCK */
		udelay (10);
		if (immap->im_cpm.cp_pbdat & PB_SPIMISO)	/* Get a bit of data */
			spi_byte |= bitpos;	/* Set data accordingly */
		immap->im_cpm.cp_pbdat &= ~PB_SPISCK;	/* Lower SCK */
		udelay (10);
		bitpos >>= 1;	/* Shift for next bit position */
	}

	return spi_byte;	/* Return the byte read */
}

/* ------------------------------------------------------------------------- */

void rtc_reset (void)
{
	return;			/* nothing to do */
}

#else  /* not CONFIG_SXNI855T */
/* ************************************************************************* */

static unsigned char rtc_read (unsigned char reg);
static void rtc_write (unsigned char reg, unsigned char val);

static struct spi_slave *slave;

/* read clock time from DS1306 and return it in *tmp */
int rtc_get (struct rtc_time *tmp)
{
	unsigned char sec, min, hour, mday, wday, mon, year;

	/*
	 * Assuming Vcc = 2.0V (lowest speed)
	 *
	 * REVISIT: If we add an rtc_init() function we can do this
	 * step just once.
	 */
	if (!slave) {
		slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
				SPI_MODE_3 | SPI_CS_HIGH);
		if (!slave)
			return;
	}

	if (spi_claim_bus(slave))
		return;

	sec = rtc_read (RTC_SECONDS);
	min = rtc_read (RTC_MINUTES);
	hour = rtc_read (RTC_HOURS);
	mday = rtc_read (RTC_DATE_OF_MONTH);
	wday = rtc_read (RTC_DAY_OF_WEEK);
	mon = rtc_read (RTC_MONTH);
	year = rtc_read (RTC_YEAR);

	spi_release_bus(slave);

	debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
	       "hr: %02x min: %02x sec: %02x\n",
	       year, mon, mday, wday, hour, min, sec);
	debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n",
	       rtc_read (RTC_DAY_OF_WEEK_ALARM0),
	       rtc_read (RTC_HOURS_ALARM0),
	       rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0));
	debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n",
	       rtc_read (RTC_DAY_OF_WEEK_ALARM1),
	       rtc_read (RTC_HOURS_ALARM1),
	       rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1));

	tmp->tm_sec = bcd2bin (sec & 0x7F);	/* convert Seconds */
	tmp->tm_min = bcd2bin (min & 0x7F);	/* convert Minutes */

	/* convert Hours */
	tmp->tm_hour = (hour & 0x40)
		? ((hour & 0x20)	/* 12 hour mode */
		   ? bcd2bin (hour & 0x1F) + 11	/* PM */
		   : bcd2bin (hour & 0x1F) - 1	/* AM */
		)
		: bcd2bin (hour & 0x3F);	/* 24 hour mode */

	tmp->tm_mday = bcd2bin (mday & 0x3F);	/* convert Day of the Month */
	tmp->tm_mon = bcd2bin (mon & 0x1F);	/* convert Month */
	tmp->tm_year = bcd2bin (year) + 2000;	/* convert Year */
	tmp->tm_wday = bcd2bin (wday & 0x07) - 1;	/* convert Day of the Week */
	tmp->tm_yday = 0;
	tmp->tm_isdst = 0;

	debug ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	return 0;
}

/* ------------------------------------------------------------------------- */

/* set clock time from *tmp in DS1306 RTC */
int rtc_set (struct rtc_time *tmp)
{
	/* Assuming Vcc = 2.0V (lowest speed) */
	if (!slave) {
		slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
				SPI_MODE_3 | SPI_CS_HIGH);
		if (!slave)
			return;
	}

	if (spi_claim_bus(slave))
		return;

	debug ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec));
	rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
	rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
	rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
	rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
	rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
	rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));

	spi_release_bus(slave);
}

/* ------------------------------------------------------------------------- */

/* reset the DS1306 */
void rtc_reset (void)
{
	/* Assuming Vcc = 2.0V (lowest speed) */
	if (!slave) {
		slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
				SPI_MODE_3 | SPI_CS_HIGH);
		if (!slave)
			return;
	}

	if (spi_claim_bus(slave))
		return;

	/* clear the control register */
	rtc_write (RTC_CONTROL, 0x00);	/* 1st step: reset WP */
	rtc_write (RTC_CONTROL, 0x00);	/* 2nd step: reset 1Hz, AIE1, AIE0 */

	/* reset all alarms */
	rtc_write (RTC_SECONDS_ALARM0, 0x00);
	rtc_write (RTC_SECONDS_ALARM1, 0x00);
	rtc_write (RTC_MINUTES_ALARM0, 0x00);
	rtc_write (RTC_MINUTES_ALARM1, 0x00);
	rtc_write (RTC_HOURS_ALARM0, 0x00);
	rtc_write (RTC_HOURS_ALARM1, 0x00);
	rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00);
	rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00);

	spi_release_bus(slave);
}

/* ------------------------------------------------------------------------- */

static unsigned char rtc_read (unsigned char reg)
{
	int ret;

	ret = spi_w8r8(slave, reg);
	return ret < 0 ? 0 : ret;
}

/* ------------------------------------------------------------------------- */

static void rtc_write (unsigned char reg, unsigned char val)
{
	unsigned char dout[2];	/* SPI Output Data Bytes */
	unsigned char din[2];	/* SPI Input Data Bytes */

	dout[0] = 0x80 | reg;
	dout[1] = val;

	spi_xfer (slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END);
}

#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */

#endif
Commit	Line	Data
affae2bf WD	1	/*
	2	* (C) Copyright 2002 SIXNET, [email protected].
	3	*
ec4c544b WD	4	* (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
	5	* Stephan Linz <[email protected]>
	6	*
affae2bf WD	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	/*
ec4c544b WD	27	* Date & Time support for DS1306 RTC using SPI:
	28	*
	29	* - SXNI855T: it uses its own soft SPI here in this file
	30	* - all other: use the external spi_xfer() function
	31	* (see include/spi.h)
affae2bf WD	32	*/
	33
	34	#include <common.h>
	35	#include <command.h>
	36	#include <rtc.h>
ec4c544b	37	#include <spi.h>
affae2bf	38
871c18dd	39	#if defined(CONFIG_CMD_DATE)
affae2bf	40
ec4c544b WD	41	#define RTC_SECONDS 0x00
	42	#define RTC_MINUTES 0x01
	43	#define RTC_HOURS 0x02
	44	#define RTC_DAY_OF_WEEK 0x03
	45	#define RTC_DATE_OF_MONTH 0x04
	46	#define RTC_MONTH 0x05
	47	#define RTC_YEAR 0x06
	48
	49	#define RTC_SECONDS_ALARM0 0x07
	50	#define RTC_MINUTES_ALARM0 0x08
	51	#define RTC_HOURS_ALARM0 0x09
	52	#define RTC_DAY_OF_WEEK_ALARM0 0x0a
	53
	54	#define RTC_SECONDS_ALARM1 0x0b
	55	#define RTC_MINUTES_ALARM1 0x0c
	56	#define RTC_HOURS_ALARM1 0x0d
	57	#define RTC_DAY_OF_WEEK_ALARM1 0x0e
	58
	59	#define RTC_CONTROL 0x0f
	60	#define RTC_STATUS 0x10
	61	#define RTC_TRICKLE_CHARGER 0x11
	62
	63	#define RTC_USER_RAM_BASE 0x20
	64
ec4c544b WD	65	/* ************************************************************************* */
	66	#ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */
	67
	68	static void soft_spi_send (unsigned char n);
	69	static unsigned char soft_spi_read (void);
	70	static void init_spi (void);
affae2bf WD	71
	72	/*-----------------------------------------------------------------------
	73	* Definitions
	74	*/
	75
	76	#define PB_SPISCK 0x00000002 /* PB 30 */
	77	#define PB_SPIMOSI 0x00000004 /* PB 29 */
	78	#define PB_SPIMISO 0x00000008 /* PB 28 */
	79	#define PB_SPI_CE 0x00010000 /* PB 15 */
	80
	81	/* ------------------------------------------------------------------------- */
	82
	83	/* read clock time from DS1306 and return it in tmp /
b73a19e1	84	int rtc_get (struct rtc_time *tmp)
affae2bf	85	{
6d0f6bcf	86	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
ec4c544b WD	87	unsigned char spi_byte; /* Data Byte */
	88
	89	init_spi (); /* set port B for software SPI */
	90
	91	/* Now we can enable the DS1306 RTC */
	92	immap->im_cpm.cp_pbdat \|= PB_SPI_CE;
	93	udelay (10);
	94
	95	/* Shift out the address (0) of the time in the Clock Chip */
	96	soft_spi_send (0);
	97
	98	/* Put the clock readings into the rtc_time structure */
	99	tmp->tm_sec = bcd2bin (soft_spi_read ()); /* Read seconds */
	100	tmp->tm_min = bcd2bin (soft_spi_read ()); /* Read minutes */
	101
	102	/* Hours are trickier */
	103	spi_byte = soft_spi_read (); /* Read Hours into temporary value */
	104	if (spi_byte & 0x40) {
	105	/* 12 hour mode bit is set (time is in 1-12 format) */
	106	if (spi_byte & 0x20) {
	107	/* since PM we add 11 to get 0-23 for hours */
	108	tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11;
	109	} else {
	110	/* since AM we subtract 1 to get 0-23 for hours */
	111	tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1;
	112	}
	113	} else {
	114	/* Otherwise, 0-23 hour format */
	115	tmp->tm_hour = (bcd2bin (spi_byte & 0x3F));
	116	}
affae2bf	117
ec4c544b WD	118	soft_spi_read (); /* Read and discard Day of week */
	119	tmp->tm_mday = bcd2bin (soft_spi_read ()); /* Read Day of the Month */
	120	tmp->tm_mon = bcd2bin (soft_spi_read ()); /* Read Month */
affae2bf	121
ec4c544b WD	122	/* Read Year and convert to this century */
ec4c544b WD	123	tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000;
affae2bf	124
ec4c544b WD	125	/* Now we can disable the DS1306 RTC */
	126	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
	127	udelay (10);
affae2bf	128
ec4c544b	129	GregorianDay (tmp); /* Determine the day of week */
affae2bf	130
ec4c544b WD	131	debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	132	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	133	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
b73a19e1 YT	134
b73a19e1 YT	135	return 0;
ec4c544b WD	136	}
	137
	138	/* ------------------------------------------------------------------------- */
	139
	140	/* set clock time in DS1306 RTC and in MPC8xx RTC */
d1e23194	141	int rtc_set (struct rtc_time *tmp)
ec4c544b	142	{
6d0f6bcf	143	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
ec4c544b WD	144
	145	init_spi (); /* set port B for software SPI */
	146
	147	/* Now we can enable the DS1306 RTC */
	148	immap->im_cpm.cp_pbdat \|= PB_SPI_CE; /* Enable DS1306 Chip */
	149	udelay (10);
	150
	151	/* First disable write protect in the clock chip control register */
	152	soft_spi_send (0x8F); /* send address of the control register */
	153	soft_spi_send (0x00); /* send control register contents */
	154
	155	/* Now disable the DS1306 to terminate the write */
	156	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
	157	udelay (10);
	158
	159	/* Now enable the DS1306 to initiate a new write */
	160	immap->im_cpm.cp_pbdat \|= PB_SPI_CE;
	161	udelay (10);
	162
	163	/* Next, send the address of the clock time write registers */
	164	soft_spi_send (0x80); /* send address of the first time register */
	165
	166	/* Use Burst Mode to send all of the time data to the clock */
	167	bin2bcd (tmp->tm_sec);
	168	soft_spi_send (bin2bcd (tmp->tm_sec)); /* Send Seconds */
	169	soft_spi_send (bin2bcd (tmp->tm_min)); /* Send Minutes */
	170	soft_spi_send (bin2bcd (tmp->tm_hour)); /* Send Hour */
	171	soft_spi_send (bin2bcd (tmp->tm_wday)); /* Send Day of the Week */
	172	soft_spi_send (bin2bcd (tmp->tm_mday)); /* Send Day of Month */
	173	soft_spi_send (bin2bcd (tmp->tm_mon)); /* Send Month */
	174	soft_spi_send (bin2bcd (tmp->tm_year - 2000)); /* Send Year */
	175
	176	/* Now we can disable the Clock chip to terminate the burst write */
	177	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
	178	udelay (10);
	179
	180	/* Now we can enable the Clock chip to initiate a new write */
	181	immap->im_cpm.cp_pbdat \|= PB_SPI_CE; /* Enable DS1306 Chip */
	182	udelay (10);
	183
	184	/* First we Enable write protect in the clock chip control register */
	185	soft_spi_send (0x8F); /* send address of the control register */
	186	soft_spi_send (0x40); /* send out Control Register contents */
	187
	188	/* Now disable the DS1306 */
	189	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
	190	udelay (10);
	191
	192	/* Set standard MPC8xx clock to the same time so Linux will
	193	* see the time even if it doesn't have a DS1306 clock driver.
	194	* This helps with experimenting with standard kernels.
	195	*/
	196	{
	197	ulong tim;
	198
	199	tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
	200	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
	201
	202	immap->im_sitk.sitk_rtck = KAPWR_KEY;
	203	immap->im_sit.sit_rtc = tim;
affae2bf	204	}
affae2bf	205
ec4c544b WD	206	debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	207	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	208	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
d1e23194 JCPV	209
d1e23194 JCPV	210	return 0;
ec4c544b	211	}
affae2bf	212
ec4c544b	213	/* ------------------------------------------------------------------------- */
affae2bf	214
ec4c544b WD	215	/* Initialize Port B for software SPI */
	216	static void init_spi (void)
	217	{
6d0f6bcf	218	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
affae2bf	219
ec4c544b WD	220	/* Force output pins to begin at logic 0 */
ec4c544b WD	221	immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE \| PB_SPIMOSI \| PB_SPISCK);
affae2bf	222
ec4c544b WD	223	/* Set these 3 signals as outputs */
	224	immap->im_cpm.cp_pbdir \|= (PB_SPIMOSI \| PB_SPI_CE \| PB_SPISCK);
	225
	226	immap->im_cpm.cp_pbdir &= ~PB_SPIMISO; /* Make MISO pin an input */
	227	udelay (10);
affae2bf WD	228	}
	229
	230	/* ------------------------------------------------------------------------- */
	231
ec4c544b WD	232	/* NOTE: soft_spi_send() assumes that the I/O lines are configured already */
ec4c544b WD	233	static void soft_spi_send (unsigned char n)
affae2bf	234	{
6d0f6bcf	235	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
ec4c544b WD	236	unsigned char bitpos; /* bit position to receive */
	237	unsigned char i; /* Loop Control */
	238
	239	/* bit position to send, start with most significant bit */
	240	bitpos = 0x80;
	241
	242	/* Send 8 bits to software SPI */
	243	for (i = 0; i < 8; i++) { /* Loop for 8 bits */
	244	immap->im_cpm.cp_pbdat \|= PB_SPISCK; /* Raise SCK */
	245
	246	if (n & bitpos)
	247	immap->im_cpm.cp_pbdat \|= PB_SPIMOSI; /* Set MOSI to 1 */
	248	else
	249	immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI; /* Set MOSI to 0 */
	250	udelay (10);
	251
	252	immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
	253	udelay (10);
	254
	255	bitpos >>= 1; /* Shift for next bit position */
	256	}
affae2bf WD	257	}
	258
	259	/* ------------------------------------------------------------------------- */
	260
ec4c544b WD	261	/* NOTE: soft_spi_read() assumes that the I/O lines are configured already */
ec4c544b WD	262	static unsigned char soft_spi_read (void)
affae2bf	263	{
6d0f6bcf	264	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
ec4c544b WD	265
	266	unsigned char spi_byte = 0; /* Return value, assume success */
	267	unsigned char bitpos; /* bit position to receive */
	268	unsigned char i; /* Loop Control */
	269
	270	/* bit position to receive, start with most significant bit */
	271	bitpos = 0x80;
	272
	273	/* Read 8 bits here */
	274	for (i = 0; i < 8; i++) { /* Do 8 bits in loop */
	275	immap->im_cpm.cp_pbdat \|= PB_SPISCK; /* Raise SCK */
	276	udelay (10);
	277	if (immap->im_cpm.cp_pbdat & PB_SPIMISO) /* Get a bit of data */
	278	spi_byte \|= bitpos; /* Set data accordingly */
	279	immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
	280	udelay (10);
	281	bitpos >>= 1; /* Shift for next bit position */
	282	}
	283
	284	return spi_byte; /* Return the byte read */
affae2bf WD	285	}
	286
	287	/* ------------------------------------------------------------------------- */
	288
ec4c544b	289	void rtc_reset (void)
affae2bf	290	{
ec4c544b WD	291	return; /* nothing to do */
	292	}
	293
	294	#else /* not CONFIG_SXNI855T */
	295	/* ************************************************************************* */
	296
3f85ce27 WD	297	static unsigned char rtc_read (unsigned char reg);
	298	static void rtc_write (unsigned char reg, unsigned char val);
	299
d255bb0e HS	300	static struct spi_slave *slave;
d255bb0e HS	301
ec4c544b	302	/* read clock time from DS1306 and return it in tmp /
b73a19e1	303	int rtc_get (struct rtc_time *tmp)
ec4c544b WD	304	{
	305	unsigned char sec, min, hour, mday, wday, mon, year;
	306
d255bb0e HS	307	/*
	308	* Assuming Vcc = 2.0V (lowest speed)
	309	*
	310	* REVISIT: If we add an rtc_init() function we can do this
	311	* step just once.
	312	*/
	313	if (!slave) {
6d0f6bcf	314	slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
d255bb0e HS	315	SPI_MODE_3 \| SPI_CS_HIGH);
	316	if (!slave)
	317	return;
	318	}
	319
	320	if (spi_claim_bus(slave))
	321	return;
	322
ec4c544b WD	323	sec = rtc_read (RTC_SECONDS);
	324	min = rtc_read (RTC_MINUTES);
	325	hour = rtc_read (RTC_HOURS);
	326	mday = rtc_read (RTC_DATE_OF_MONTH);
	327	wday = rtc_read (RTC_DAY_OF_WEEK);
	328	mon = rtc_read (RTC_MONTH);
	329	year = rtc_read (RTC_YEAR);
	330
d255bb0e HS	331	spi_release_bus(slave);
d255bb0e HS	332
ec4c544b WD	333	debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
	334	"hr: %02x min: %02x sec: %02x\n",
	335	year, mon, mday, wday, hour, min, sec);
	336	debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n",
	337	rtc_read (RTC_DAY_OF_WEEK_ALARM0),
	338	rtc_read (RTC_HOURS_ALARM0),
	339	rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0));
	340	debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n",
	341	rtc_read (RTC_DAY_OF_WEEK_ALARM1),
	342	rtc_read (RTC_HOURS_ALARM1),
	343	rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1));
	344
	345	tmp->tm_sec = bcd2bin (sec & 0x7F); /* convert Seconds */
	346	tmp->tm_min = bcd2bin (min & 0x7F); /* convert Minutes */
	347
	348	/* convert Hours */
	349	tmp->tm_hour = (hour & 0x40)
	350	? ((hour & 0x20) /* 12 hour mode */
	351	? bcd2bin (hour & 0x1F) + 11 /* PM */
	352	: bcd2bin (hour & 0x1F) - 1 /* AM */
	353	)
	354	: bcd2bin (hour & 0x3F); /* 24 hour mode */
	355
	356	tmp->tm_mday = bcd2bin (mday & 0x3F); /* convert Day of the Month */
	357	tmp->tm_mon = bcd2bin (mon & 0x1F); /* convert Month */
	358	tmp->tm_year = bcd2bin (year) + 2000; /* convert Year */
	359	tmp->tm_wday = bcd2bin (wday & 0x07) - 1; /* convert Day of the Week */
	360	tmp->tm_yday = 0;
	361	tmp->tm_isdst = 0;
	362
	363	debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	364	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	365	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
b73a19e1 YT	366
b73a19e1 YT	367	return 0;
affae2bf WD	368	}
	369
	370	/* ------------------------------------------------------------------------- */
	371
ec4c544b	372	/* set clock time from tmp in DS1306 RTC /
d1e23194	373	int rtc_set (struct rtc_time *tmp)
affae2bf	374	{
d255bb0e HS	375	/* Assuming Vcc = 2.0V (lowest speed) */
d255bb0e HS	376	if (!slave) {
6d0f6bcf	377	slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
d255bb0e HS	378	SPI_MODE_3 \| SPI_CS_HIGH);
	379	if (!slave)
	380	return;
	381	}
	382
	383	if (spi_claim_bus(slave))
	384	return;
	385
ec4c544b WD	386	debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	387	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	388	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
	389
ec4c544b	390	rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec));
da4849fb WD	391	rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
	392	rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
	393	rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
	394	rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
	395	rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
	396	rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));
d255bb0e HS	397
d255bb0e HS	398	spi_release_bus(slave);
affae2bf WD	399	}
	400
	401	/* ------------------------------------------------------------------------- */
	402
ec4c544b WD	403	/* reset the DS1306 */
	404	void rtc_reset (void)
	405	{
d255bb0e HS	406	/* Assuming Vcc = 2.0V (lowest speed) */
d255bb0e HS	407	if (!slave) {
6d0f6bcf	408	slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
d255bb0e HS	409	SPI_MODE_3 \| SPI_CS_HIGH);
	410	if (!slave)
	411	return;
	412	}
	413
	414	if (spi_claim_bus(slave))
	415	return;
	416
ec4c544b WD	417	/* clear the control register */
	418	rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */
	419	rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */
	420
	421	/* reset all alarms */
	422	rtc_write (RTC_SECONDS_ALARM0, 0x00);
	423	rtc_write (RTC_SECONDS_ALARM1, 0x00);
	424	rtc_write (RTC_MINUTES_ALARM0, 0x00);
	425	rtc_write (RTC_MINUTES_ALARM1, 0x00);
	426	rtc_write (RTC_HOURS_ALARM0, 0x00);
	427	rtc_write (RTC_HOURS_ALARM1, 0x00);
	428	rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00);
	429	rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00);
d255bb0e HS	430
d255bb0e HS	431	spi_release_bus(slave);
ec4c544b WD	432	}
	433
	434	/* ------------------------------------------------------------------------- */
affae2bf	435
ec4c544b WD	436	static unsigned char rtc_read (unsigned char reg)
ec4c544b WD	437	{
d255bb0e	438	int ret;
affae2bf	439
d255bb0e HS	440	ret = spi_w8r8(slave, reg);
d255bb0e HS	441	return ret < 0 ? 0 : ret;
affae2bf WD	442	}
	443
	444	/* ------------------------------------------------------------------------- */
	445
ec4c544b	446	static void rtc_write (unsigned char reg, unsigned char val)
affae2bf	447	{
ec4c544b WD	448	unsigned char dout[2]; /* SPI Output Data Bytes */
ec4c544b WD	449	unsigned char din[2]; /* SPI Input Data Bytes */
affae2bf	450
ec4c544b WD	451	dout[0] = 0x80 \| reg;
ec4c544b WD	452	dout[1] = val;
affae2bf	453
d255bb0e	454	spi_xfer (slave, 16, dout, din, SPI_XFER_BEGIN \| SPI_XFER_END);
ec4c544b	455	}
affae2bf	456
ec4c544b	457	#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */
affae2bf	458
affae2bf	459	#endif