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d9e7efe1 BM |
1 | * Intel FSP-S configuration |
2 | ||
3 | Several Intel platforms require the execution of the Intel FSP (Firmware | |
4 | Support Package) for initialization. The FSP consists of multiple parts, one | |
5 | of which is the FSP-S (Silicon initialization phase). | |
6 | ||
7 | This binding applies to the FSP-S for the Intel Apollo Lake SoC. | |
8 | ||
9 | The FSP-S is available on Github [1]. | |
10 | For detailed information on the FSP-S parameters see the documentation in | |
11 | FSP/ApolloLakeFspBinPkg/Docs [2]. | |
12 | ||
13 | The properties of this binding are all optional. If no properties are set the | |
14 | values of the FSP-S are used. | |
15 | ||
16 | [1] https://github.com/IntelFsp/FSP | |
17 | [2] https://github.com/IntelFsp/FSP/tree/master/ApolloLakeFspBinPkg/Docs | |
18 | ||
19 | Optional properties: | |
20 | - fsps,active-processor-cores: ActiveProcessorCores | |
21 | - fsps,disable-core1: Disable Core1 | |
22 | - fsps,disable-core2: Disable Core2 | |
23 | - fsps,disable-core2: Disable Core3 | |
24 | - fsps,vmx-enable: VMX Enable | |
25 | - fsps,proc-trace-mem-size: Memory region allocation for Processor Trace | |
26 | 0xFF: Disable (default) | |
27 | - fsps,proc-trace-enable: Enable Processor Trace | |
28 | - fsps,eist: Eist | |
29 | - fsps,boot-p-state: Boot PState | |
30 | 0: HFM (default) | |
31 | 1: LFM | |
32 | - fsps,enable-cx: CPU power states (C-states) | |
33 | - fsps,c1e: Enhanced C-states | |
34 | - fsps,bi-proc-hot: Bi-Directional PROCHOT# | |
35 | - fsps,pkg-c-state-limit: Max Pkg Cstate | |
36 | 0: PkgC0C1 | |
37 | 1: PkgC2 | |
38 | 2: PkgC3 (default) | |
39 | 3: PkgC6 | |
40 | 4: PkgC7 | |
41 | 5: PkgC7s | |
42 | 6: PkgC8 | |
43 | 7: PkgC9 | |
44 | 8: PkgC10 | |
45 | 9: PkgCMax | |
46 | 254: PkgCpuDefault | |
47 | 255: PkgAuto | |
48 | - fsps,c-state-auto-demotion: C-State auto-demotion | |
49 | 0: Disable C1 and C3 Auto-demotion (default) | |
50 | 1: Enable C3/C6/C7 Auto-demotion to C1 | |
51 | 2: Enable C6/C7 Auto-demotion to C3 | |
52 | 3: Enable C6/C7 Auto-demotion to C1 and C3 | |
53 | - fsps,c-state-un-demotion: C-State un-demotion | |
54 | 0: Disable C1 and C3 Un-demotion (default) | |
55 | 1: Enable C1 Un-demotion | |
56 | 2: Enable C3 Un-demotion | |
57 | 3: Enable C1 and C3 Un-demotion | |
58 | - fsps,max-core-c-state: Max Core C-State | |
59 | 0: Unlimited | |
60 | 1: C1 | |
61 | 2: C3 | |
62 | 3: C6 | |
63 | 4: C7 | |
64 | 5: C8 | |
65 | 6: C9 | |
66 | 7: C10 | |
67 | 8: CCx (default) | |
68 | - fsps,pkg-c-state-demotion: Package C-State Demotion | |
69 | - fsps,pkg-c-state-un-demotion: Package C-State Un-demotion | |
70 | - fsps,turbo-mode: Turbo Mode | |
71 | - fsps,hda-verb-table-entry-num: SC HDA Verb Table Entry Number | |
72 | 0: (default) | |
73 | - fsps,hda-verb-table-ptr: SC HDA Verb Table Pointer | |
74 | 0x00000000: (default) | |
75 | - fsps,p2sb-unhide: Enable/Disable P2SB device hidden | |
76 | - fsps,ipu-en: IPU Enable/Disable | |
77 | - fsps,ipu-acpi-mode: IMGU ACPI mode selection | |
78 | 0: Auto | |
79 | 1: IGFX Child device (default) | |
80 | 2: ACPI device | |
81 | - fsps,force-wake: Enable ForceWake | |
82 | - fsps,gtt-mm-adr: GttMmAdr | |
83 | 0xbf000000: (default) | |
84 | - fsps,gm-adr: GmAdr | |
85 | 0xa0000000: (default) | |
86 | - fsps,pavp-lock: Enable PavpLock | |
87 | - fsps,graphics-freq-modify: Enable GraphicsFreqModify | |
88 | - fsps,graphics-freq-req: Enable GraphicsFreqReq | |
89 | - fsps,graphics-video-freq: Enable GraphicsVideoFreq | |
90 | - fsps,pm-lock: Enable PmLock | |
91 | - fsps,dop-clock-gating: Enable DopClockGating | |
92 | - fsps,unsolicited-attack-override: Enable UnsolicitedAttackOverride | |
93 | - fsps,wopcm-support: Enable WOPCMSupport | |
94 | - fsps,wopcm-size: Enable WOPCMSize | |
95 | - fsps,power-gating: Enable PowerGating | |
96 | - fsps,unit-level-clock-gating: Enable UnitLevelClockGating | |
97 | - fsps,fast-boot: Enable FastBoot | |
98 | - fsps,dyn-sr: Enable DynSR | |
99 | - fsps,sa-ipu-enable: Enable SaIpuEnable | |
100 | - fsps,pm-support: GT PM Support | |
101 | - fsps,enable-render-standby: RC6(Render Standby) | |
102 | - fsps,logo-size: BMP Logo Data Size | |
103 | - fsps,logo-ptr: BMP Logo Data Pointer | |
104 | - fsps,graphics-config-ptr: Graphics Configuration Data Pointer | |
105 | - fsps,pavp-enable: PAVP Enable | |
106 | - fsps,pavp-pr3: PAVP PR3 | |
107 | - fsps,cd-clock: CdClock Frequency selection | |
108 | 0: 144MHz | |
109 | 1: 288MHz | |
110 | 2: 384MHz | |
111 | 3: 576MHz | |
112 | 4: 624MHz (default) | |
113 | - fsps,pei-graphics-peim-init: Enable/Disable PeiGraphicsPeimInit | |
114 | - fsps,write-protection-enable: Write Protection Support | |
115 | - fsps,read-protection-enable: Read Protection Support | |
116 | - fsps,protected-range-limit: Protected Range Limitation | |
117 | 0x0FFF: (default) | |
118 | - fsps,protected-range-base: Protected Range Base | |
119 | 0x0000: (default) | |
120 | - fsps,gmm: Enable SC Gaussian Mixture Models | |
121 | - fsps,clk-gating-pgcb-clk-trunk: GMM Clock Gating - PGCB Clock Trunk | |
122 | - fsps,clk-gating-sb: GMM Clock Gating - Sideband | |
123 | - fsps,clk-gating-sb-clk-trunk: GMM Clock Gating - Sideband | |
124 | - fsps,clk-gating-sb-clk-partition: GMM Clock Gating - Sideband Clock | |
125 | Partition | |
126 | - fsps,clk-gating-core: GMM Clock Gating - Core | |
127 | - fsps,clk-gating-dma: GMM Clock Gating - DMA | |
128 | - fsps,clk-gating-reg-access: GMM Clock Gating - Register Access | |
129 | - fsps,clk-gating-host: GMM Clock Gating - Host | |
130 | - fsps,clk-gating-partition: GMM Clock Gating - Partition | |
131 | - fsps,clk-gating-trunk: Clock Gating - Trunk | |
132 | - fsps,hda-enable: HD Audio Support | |
133 | - fsps,dsp-enable: HD Audio DSP Support | |
134 | - fsps,pme: Azalia wake-on-ring | |
135 | - fsps,hd-audio-io-buffer-ownership: HD-Audio I/O Buffer Ownership | |
136 | 0: HD-Audio link owns all the I/O buffers (default) | |
137 | 1: HD-Audio link owns 4 I/O buffers and I2S port owns 4 I/O buffers | |
138 | 3: I2S port owns all the I/O buffers | |
139 | - fsps,hd-audio-io-buffer-voltage: HD-Audio I/O Buffer Voltage | |
140 | 0: 3.3V (default) | |
141 | 1: 1.8V | |
142 | - fsps,hd-audio-vc-type: HD-Audio Virtual Channel Type | |
143 | 0: VC0 (default) | |
144 | 1: VC1 | |
145 | - fsps,hd-audio-link-frequency: HD-Audio Link Frequency | |
146 | 0: 6MHz (default) | |
147 | 1: 12MHz | |
148 | 2: 24MHz | |
149 | 3: 48MHz | |
150 | 4: 96MHz | |
151 | 5: Invalid | |
152 | - fsps,hd-audio-i-disp-link-frequency: HD-Audio iDisp-Link Frequency | |
153 | 0: 6MHz (default) | |
154 | 1: 12MHz | |
155 | 2: 24MHz | |
156 | 3: 48MHz | |
157 | 4: 96MHz | |
158 | 5: Invalid | |
159 | - fsps,hd-audio-i-disp-link-tmode: HD-Audio iDisp-Link T-Mode | |
160 | 0: 2T (default) | |
161 | 1: 1T | |
162 | - fsps,dsp-endpoint-dmic: HD-Audio Disp DMIC | |
163 | 0: disable, | |
164 | 1: 2ch array (default) | |
165 | 2: 4ch array | |
166 | - fsps,dsp-endpoint-bluetooth: HD-Audio Bluetooth | |
167 | - fsps,dsp-endpoint-i2s-skp: HD-Audio I2S SHK | |
168 | - fsps,dsp-endpoint-i2s-hp: HD-Audio I2S HP | |
169 | - fsps,audio-ctl-pwr-gate: HD-Audio Controller Power Gating (deprecated) | |
170 | - fsps,audio-dsp-pwr-gate: HD-Audio ADSP Power Gating (deprecated) | |
171 | - fsps,mmt: HD-Audio CSME Memory Transfers | |
172 | 0: VC0 (default) | |
173 | 1: VC2 | |
174 | - fsps,hmt: HD-Audio Host Memory Transfers | |
175 | 0: VC0 (default) | |
176 | 1: VC2 | |
177 | - fsps,hd-audio-pwr-gate: HD-Audio Power Gating | |
178 | - fsps,hd-audio-clk-gate: HD-Audio Clock Gating | |
179 | - fsps,dsp-feature-mask: Bitmask of DSP Feature | |
180 | 0x01: WoV | |
181 | 0x02: BT Sideband | |
182 | 0x04: Codec VAD | |
183 | 0x20: BT Intel HFP | |
184 | 0x40: BT Intel A2DP | |
185 | 0x80: DSP based speech pre-processing disabled | |
186 | - fsps,dsp-pp-module-mask: Bitmask of supported DSP Post-Processing Modules | |
187 | 0x01: WoV | |
188 | 0x02: BT Sideband | |
189 | 0x04: Codec VAD | |
190 | 0x20: BT Intel HFP | |
191 | 0x40: BT Intel A2DP | |
192 | 0x80: DSP based speech pre-processing disabled | |
193 | - fsps,bios-cfg-lock-down: HD-Audio BIOS Configuration Lock Down | |
194 | - fsps,hpet: Enable High Precision Timer | |
195 | - fsps,hpet-bdf-valid: Hpet Valid BDF Value | |
196 | - fsps,hpet-bus-number: Bus Number of Hpet | |
197 | 0xFA: (default) | |
198 | - fsps,hpet-device-number: Device Number of Hpet | |
199 | 0x1F: (default) | |
200 | - fsps,hpet-function-number: Function Number of Hpet | |
201 | 0x00: (default) | |
202 | - fsps,io-apic-bdf-valid: IoApic Valid BDF Value | |
203 | - fsps,io-apic-bus-number: Bus Number of IoApic | |
204 | 0xFA: (default) | |
205 | - fsps,io-apic-device-number: Device Number of IoApic | |
206 | 0x0F: (default) | |
207 | - fsps,io-apic-function-number: Function Number of IoApic | |
208 | 0x00: (default) | |
209 | - fsps,io-apic-entry24-119: IOAPIC Entry 24-119 | |
210 | - fsps,io-apic-id: IO APIC ID | |
211 | 0x01: (default) | |
212 | - fsps,io-apic-range-select: IoApic Range | |
213 | 0x00: (default) | |
214 | - fsps,ish-enable: ISH Controller | |
215 | - fsps,bios-interface: BIOS Interface Lock Down | |
216 | - fsps,bios-lock: Bios LockDown Enable | |
217 | - fsps,spi-eiss: SPI EISS Status | |
218 | - fsps,bios-lock-sw-smi-number: BiosLock SWSMI Number | |
219 | 0xA9: (default) | |
220 | - fsps,lpss-s0ix-enable: LPSS IOSF PMCTL S0ix Enable | |
221 | - fsps,i2c-clk-gate-cfg: LPSS I2C Clock Gating Configuration | |
222 | - fsps,hsuart-clk-gate-cfg: LPSS HSUART Clock Gating Configuration | |
223 | - fsps,spi-clk-gate-cfg: LPSS SPI Clock Gating Configuration | |
224 | - fsps,i2cX-enable: 2C Device X | |
225 | 0: Disabled | |
226 | 1: PCI Mode (default) | |
227 | 2: ACPI Mode | |
228 | - fsps,hsuartX-enable: UART Device X | |
229 | 0: Disabled | |
230 | 1: PCI Mode (default) | |
231 | 2: ACPI Mode | |
232 | - fsps,spiX-enable: SPI UART Device X | |
233 | 0: Disabled | |
234 | 1: PCI Mode (default) | |
235 | 2: ACPI Mode | |
236 | - fsps,os-dbg-enable: OS Debug Feature | |
237 | - fsps,dci-en: DCI Feature | |
238 | - fsps,uart2-kernel-debug-base-address: UART Debug Base Address | |
239 | 0x00000000: (default) | |
240 | - fsps,pcie-clock-gating-disabled: Enable PCIE Clock Gating | |
241 | - fsps,pcie-root-port8xh-decode: Enable PCIE Root Port 8xh Decode | |
242 | - fsps,pcie8xh-decode-port-index: PCIE 8xh Decode Port Index | |
243 | 0x00: (default) | |
244 | - fsps,pcie-root-port-peer-memory-write-enable: Enable PCIE Root Port Peer | |
245 | Memory Write | |
246 | - fsps,pcie-aspm-sw-smi-number: PCIE SWSMI Number | |
247 | 0xAA: (default) | |
248 | - fsps,pcie-root-port-en: PCI Express Root Port | |
249 | - fsps,pcie-rp-hide: Hide PCIE Root Port Configuration Space | |
250 | - fsps,pcie-rp-slot-implemented: PCIE Root Port Slot Implement | |
251 | - fsps,pcie-rp-hot-plug: Hot Plug | |
252 | - fsps,pcie-rp-pm-sci: PCIE PM SCI | |
253 | - fsps,pcie-rp-ext-sync: PCIE Root Port Extended Sync | |
254 | - fsps,pcie-rp-transmitter-half-swing: Transmitter Half Swing | |
255 | - fsps,pcie-rp-acs: ACS | |
256 | - fsps,pcie-rp-clk-req-supported: Clock Request Support | |
257 | - fsps,pcie-rp-clk-req-number: Configure CLKREQ Number | |
258 | - fsps,pcie-rp-clk-req-detect: CLKREQ# Detection | |
259 | - fsps,advanced-error-reportingt: Advanced Error Reporting | |
260 | - fsps,pme-interrupt: PME Interrupt | |
261 | - fsps,fatal-error-report: URR | |
262 | - fsps,no-fatal-error-report: FER | |
263 | - fsps,correctable-error-report: NFER | |
264 | - fsps,system-error-on-fatal-error: CER | |
265 | - fsps,system-error-on-non-fatal-error: SEFE | |
266 | - fsps,system-error-on-correctable-error: SENFE | |
267 | - fsps,pcie-rp-speed: SECE | |
268 | - fsps,physical-slot-number: PCIe Speed | |
269 | 0: Auto (default) | |
270 | 1: Gen1 | |
271 | 2: Gen2 | |
272 | 3: Gen3 | |
273 | - fsps,pcie-rp-completion-timeout: Physical Slot Number | |
274 | 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 (default) | |
275 | - fsps,enable-ptm: PTM Support | |
276 | - fsps,pcie-rp-aspm: ASPM | |
277 | - fsps,pcie-rp-l1-substates: L1 Substates | |
278 | - fsps,pcie-rp-ltr-enable: PCH PCIe LTR | |
279 | - fsps,pcie-rp-ltr-config-lock: PCIE LTR Lock | |
280 | - fsps,pme-b0-s5-di: PME_B0_S5 Disable bit | |
281 | - fsps,pci-clock-run: PCI Clock Run | |
282 | - fsps,timer8254-clk-setting: Enable/Disable Timer 8254 Clock Setting | |
283 | - fsps,enable-sata: Chipset SATA | |
284 | - fsps,sata-mode: SATA Mode Selection | |
285 | 0: AHCI (default) | |
286 | 1: RAID | |
287 | - fsps,sata-salp-support: Aggressive LPM Support | |
288 | - fsps,sata-pwr-opt-enable: SATA Power Optimization | |
289 | - fsps,e-sata-speed-limit: eSATA Speed Limit | |
290 | - fsps,speed-limit: SATA Speed Limit | |
291 | 0x1: 1.5Gb/s(Gen 1) | |
292 | 0x2: 3Gb/s(Gen 2) | |
293 | 0x3: 6Gb/s(Gen 3) | |
294 | - fsps,sata-ports-enable: SATA Port | |
295 | - fsps,sata-ports-dev-slp: SATA Port DevSlp | |
296 | - fsps,sata-ports-hot-plug: SATA Port HotPlug | |
297 | - fsps,sata-ports-interlock-sw: Mechanical Presence Switch | |
298 | - fsps,sata-ports-external: External SATA Ports | |
299 | - fsps,sata-ports-spin-up: Spin Up Device | |
300 | - fsps,sata-ports-solid-state-drive: SATA Solid State | |
301 | 0: Hard Disk Drive (default) | |
302 | 1: Solid State Drive | |
303 | - fsps,sata-ports-enable-dito-config: DITO Configuration | |
304 | - fsps,sata-ports-dm-val: DM Value | |
305 | 0x0F: Maximum (default) | |
306 | - fsps,sata-ports-dito-val: DITO Value | |
307 | 0x0271 (default) | |
308 | - fsps,sub-system-vendor-id: Subsystem Vendor ID | |
309 | 0x8086: (default) | |
310 | - fsps,sub-system-id: Subsystem ID | |
311 | 0x7270: (default) | |
312 | - fsps,crid-setting: CRIDSettings | |
313 | 0: Disable (default) | |
314 | 1: CRID_1 | |
315 | 2: CRID_2 | |
316 | 3: CRID_3 | |
317 | - fsps,reset-select: ResetSelect | |
318 | 0x6: warm reset (default) | |
319 | 0xE: cold reset | |
320 | - fsps,sdcard-enabled: SD Card Support (D27:F0) | |
674c58c7 | 321 | - fsps,emmc-enabled: SeMMC Support (D28:F0) |
d9e7efe1 BM |
322 | - fsps,emmc-host-max-speed: eMMC Max Speed |
323 | 0: HS400(default) | |
324 | 1: HS200 | |
325 | 2: DDR50 | |
326 | - fsps,ufs-enabled: UFS Support (D29:F0) | |
327 | - fsps,sdio-enabled: SDIO Support (D30:F0) | |
328 | - fsps,gpp-lock: GPP Lock Feature | |
329 | - fsps,sirq-enable: Serial IRQ | |
330 | - fsps,sirq-mode: Serial IRQ Mode | |
331 | 0: Quiet mode (default) | |
332 | 1: Continuous mode | |
333 | - fsps,start-frame-pulse: Start Frame Pulse Width | |
334 | 0: ScSfpw4Clk (default) | |
335 | 1: ScSfpw6Clk | |
336 | 2: ScSfpw8Clk | |
337 | - fsps,smbus-enable: SMBus | |
338 | - fsps,arp-enable: SMBus ARP Support | |
339 | - fsps,num-rsvd-smbus-addresses: SMBus Table Elements | |
340 | 0x0080: (default) | |
341 | - fsps,rsvd-smbus-address-table: Reserved SMBus Address Table | |
342 | 0x00: (default) | |
343 | - fsps,disable-compliance-mode: XHCI Disable Compliance Mode | |
344 | - fsps,usb-per-port-ctl: USB Per-Port Control | |
345 | - fsps,usb30-mode: xHCI Mode | |
346 | 0: Disable | |
347 | 1: Enable | |
348 | 2: Auto (default) | |
349 | - fsps,port-usb20-enable: Enable USB2 ports | |
350 | - fsps,port-usb20-over-current-pin: USB20 Over Current Pin | |
351 | - fsps,usb-otg: XDCI Support | |
352 | 0: Disable | |
353 | 1: PCI_Mode (default) | |
354 | 2: ACPI_mode | |
355 | - fsps,hsic-support-enable: Enable XHCI HSIC Support | |
356 | - fsps,port-usb30-enable: Enable USB3 ports | |
357 | - fsps,port-usb30-over-current-pin: USB30 Over Current Pin | |
358 | - fsps,ssic-port-enable: Enable XHCI SSIC Support | |
359 | - fsps,dlane-pwr-gating: SSIC Dlane PowerGating | |
360 | - fsps,vtd-enable: VT-d | |
361 | - fsps,lock-down-global-smi: SMI Lock bit | |
362 | - fsps,reset-wait-timer: HDAudio Delay Timer | |
363 | 0x012C: (default) | |
364 | - fsps,rtc-lock: RTC Lock Bits | |
365 | - fsps,sata-test-mode: SATA Test Mode Selection | |
366 | - fsps,ssic-rate: XHCI SSIC RATE | |
367 | 1: A Series (default) | |
368 | 2: B Series | |
369 | - fsps,dynamic-power-gating: SMBus Dynamic Power Gating | |
370 | - fsps,pcie-rp-ltr-max-snoop-latency: Max Snoop Latency | |
371 | 0x0000: (default) | |
372 | - fsps,pcie-rp-snoop-latency-override-mode: Snoop Latency Override | |
373 | 0: Disable | |
374 | 1: Enable | |
375 | 2: Auto (default) | |
376 | - fsps,pcie-rp-snoop-latency-override-value: Snoop Latency Value | |
377 | 0x003C (default) | |
378 | - fsps,pcie-rp-snoop-latency-override-multiplier: Snoop Latency Multiplier | |
379 | 0: 1ns | |
380 | 1: 32ns | |
381 | 2: 1024ns (default) | |
382 | 3: 32768ns | |
383 | 4: 1048576ns | |
384 | 5: 33554432ns | |
385 | - fsps,skip-mp-init: Skip Multi-Processor Initialization | |
386 | - fsps,dci-auto-detect: DCI Auto Detect | |
387 | - fsps,pcie-rp-ltr-max-non-snoop-latency: Max Non-Snoop Latency | |
388 | 0x0000: (default) | |
389 | - fsps,pcie-rp-non-snoop-latency-override-mode: Non Snoop Latency Override | |
390 | - fsps,tco-timer-halt-lock: Halt and Lock TCO Timer | |
391 | - fsps,pwr-btn-override-period: Power Button Override Period | |
392 | 000: 4s (default) | |
393 | 001: 6s | |
394 | 010: 8s | |
395 | 011: 10s | |
396 | 100: 12s | |
397 | 101: 14s | |
398 | - fsps,pcie-rp-non-snoop-latency-override-value: | |
399 | 0x003C: (default) | |
400 | - fsps,pcie-rp-non-snoop-latency-override-multiplier: Non Snoop Latency Value | |
401 | 0: 1ns | |
402 | 1: 32ns | |
403 | 2: 1024ns (default) | |
404 | 3: 32768ns | |
405 | 4: 1048576ns | |
406 | 5: 33554432ns | |
407 | - fsps,pcie-rp-slot-power-limit-scale: PCIE Root Port Slot Power Limit Scale | |
408 | 0x00: (default) | |
409 | - fsps,pcie-rp-slot-power-limit-value: | |
410 | 0x00: (default) | |
411 | - fsps,disable-native-power-button: Power Button Native Mode Disable | |
412 | - fsps,power-butter-debounce-mode: Power Button Debounce Mode | |
413 | - fsps,sdio-tx-cmd-cntl: SDIO_TX_CMD_DLL_CNTL | |
414 | 0x505: (default) | |
415 | - fsps,sdio-tx-data-cntl1: SDIO_TX_DATA_DLL_CNTL1 | |
416 | 0xE: (default) | |
417 | - fsps,sdio-tx-data-cntl2: SDIO_TX_DATA_DLL_CNTL2 | |
418 | 0x22272828: (default) | |
419 | - fsps,sdio-rx-cmd-data-cntl1: SDIO_RX_CMD_DATA_DLL_CNTL1 | |
420 | 0x16161616: (default) | |
421 | - fsps,sdio-rx-cmd-data-cntl2: SDIO_RX_CMD_DATA_DLL_CNTL2 | |
422 | 0x10000: (default) | |
423 | - fsps,sdcard-tx-cmd-cntl: SDCARD_TX_CMD_DLL_CNTL | |
424 | 0x505 (default) | |
425 | - fsps,sdcard-tx-data-cntl1: SDCARD_TX_DATA_DLL_CNTL1 | |
426 | 0xA13: (default) | |
427 | - fsps,sdcard-tx-data-cntl2: SDCARD_TX_DATA_DLL_CNTL2 | |
428 | 0x24242828: (default) | |
429 | - fsps,sdcard-rx-cmd-data-cntl1: SDCARD_RX_CMD_DATA_DLL_CNTL1 | |
430 | 0x73A3637 (default) | |
431 | - fsps,sdcard-rx-strobe-cntl: SDCARD_RX_STROBE_DLL_CNTL | |
432 | 0x0: (default) | |
433 | - fsps,sdcard-rx-cmd-data-cntl2: SDCARD_RX_CMD_DATA_DLL_CNTL2 | |
434 | 0x10000: (default) | |
435 | - fsps,emmc-tx-cmd-cntl: EMMC_TX_CMD_DLL_CNTL | |
436 | 0x505: (default) | |
437 | - fsps,emmc-tx-data-cntl1: EMMC_TX_DATA_DLL_CNTL1 | |
438 | 0xC11: (default) | |
439 | - fsps,emmc-tx-data-cntl2: EMMC_TX_DATA_DLL_CNTL2 | |
440 | 0x1C2A2927: (default) | |
441 | - fsps,emmc-rx-cmd-data-cntl1: EMMC_RX_CMD_DATA_DLL_CNTL1 | |
442 | 0x000D162F: (default) | |
443 | - fsps,emmc-rx-strobe-cntl: EMMC_RX_STROBE_DLL_CNTL | |
444 | 0x0a0a: (default) | |
445 | - fsps,emmc-rx-cmd-data-cntl2: EMMC_RX_CMD_DATA_DLL_CNTL2 | |
446 | 0x1003b: (default) | |
447 | - fsps,emmc-master-sw-cntl: EMMC_MASTER_DLL_CNTL | |
448 | 0x001: (default) | |
449 | - fsps,pcie-rp-selectable-deemphasis: PCIe Selectable De-emphasis | |
450 | 1: -3.5 dB (default) | |
451 | 0: -6 dB | |
452 | - fsps,monitor-mwait-enable: Monitor Mwait Enable | |
453 | - fsps,hd-audio-dsp-uaa-compliance: Universal Audio Architecture | |
454 | compliance for DSP enabled system | |
455 | - fsps,ipc: IRQ Interrupt Polarity Control | |
456 | - fsps,sata-ports-disable-dynamic-pg: Disable ModPHY dynamic power gate | |
457 | - fsps,init-s3-cpu: Init CPU during S3 resume | |
458 | - fsps,skip-punit-init: Skip P-unit Initialization | |
459 | - fsps,port-usb20-per-port-tx-pe-half: PerPort Half Bit Pre-emphasis | |
460 | - fsps,port-usb20-per-port-pe-txi-set: PerPort HS Pre-emphasis Bias | |
461 | - fsps,port-usb20-per-port-txi-set: PerPort HS Transmitter Bias | |
462 | - fsps,port-usb20-hs-skew-sel: Select the skew direction for HS transition | |
463 | - fsps,port-usb20-i-usb-tx-emphasis-en: PerPort HS Transmitter Emphasis | |
464 | - fsps,port-usb20-per-port-rxi-set: PerPort HS Receiver Bias | |
465 | - fsps,port-usb20-hs-npre-drv-sel: Delay/skew's strength control for HS driver | |
a0186110 BM |
466 | - fsps,os-selection: OS Selection |
467 | 0: Windows | |
468 | 1: Android | |
469 | 3: Linux | |
470 | - fsps,dptf-enabled: DPTF | |
471 | - fsps,pwm-enabled: PWM Enabled | |
d9e7efe1 BM |
472 | |
473 | Example: | |
474 | ||
475 | &fsp_s { | |
476 | u-boot,dm-pre-proper; | |
477 | ||
478 | fsps,ish-enable = <0>; | |
479 | fsps,enable-sata = <0>; | |
480 | fsps,pcie-root-port-en = [00 00 00 00 00 01]; | |
481 | fsps,pcie-rp-hot-plug = [00 00 00 00 00 01]; | |
482 | fsps,i2c6-enable = <I2CX_ENABLE_DISABLED>; | |
483 | fsps,i2c7-enable = <I2CX_ENABLE_DISABLED>; | |
484 | fsps,hsuart3-enable = <HSUARTX_ENABLE_DISABLED>; | |
485 | fsps,spi1-enable = <SPIX_ENABLE_DISABLED>; | |
486 | fsps,spi2-enable = <SPIX_ENABLE_DISABLED>; | |
487 | fsps,sdio-enabled = <0>; | |
488 | ... | |
489 | }; |