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Commit | Line | Data |
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c8a7ba9e TC |
1 | menu "Timer Support" |
2 | ||
3 | config TIMER | |
435ae76e | 4 | bool "Enable driver model for timer drivers" |
c8a7ba9e TC |
5 | depends on DM |
6 | help | |
435ae76e BM |
7 | Enable driver model for timer access. It uses the same API as |
8 | lib/time.c, but now implemented by the uclass. The first timer | |
c8a7ba9e TC |
9 | will be used. The timer is usually a 32 bits free-running up |
10 | counter. There may be no real tick, and no timer interrupt. | |
11 | ||
e9e5d9d2 PT |
12 | config SPL_TIMER |
13 | bool "Enable driver model for timer drivers in SPL" | |
14 | depends on TIMER && SPL | |
15 | help | |
16 | Enable support for timer drivers in SPL. These can be used to get | |
17 | a timer value when in SPL, or perhaps for implementing a delay | |
18 | function. This enables the drivers in drivers/timer as part of an | |
19 | SPL build. | |
20 | ||
21 | config TPL_TIMER | |
22 | bool "Enable driver model for timer drivers in TPL" | |
23 | depends on TIMER && TPL | |
24 | help | |
25 | Enable support for timer drivers in TPL. These can be used to get | |
26 | a timer value when in TPL, or perhaps for implementing a delay | |
27 | function. This enables the drivers in drivers/timer as part of an | |
28 | TPL build. | |
29 | ||
c95fec31 SG |
30 | config TIMER_EARLY |
31 | bool "Allow timer to be used early in U-Boot" | |
32 | depends on TIMER | |
97d20f69 SG |
33 | # initr_bootstage() requires a timer and is called before initr_dm() |
34 | # so only the early timer is available | |
35 | default y if X86 && BOOTSTAGE | |
c95fec31 SG |
36 | help |
37 | In some cases the timer must be accessible before driver model is | |
38 | active. Examples include when using CONFIG_TRACE to trace U-Boot's | |
39 | execution before driver model is set up. Enable this option to | |
40 | use an early timer. These functions must be supported by your timer | |
41 | driver: timer_early_get_count() and timer_early_get_rate(). | |
42 | ||
73fe4111 BM |
43 | config AG101P_TIMER |
44 | bool "AG101P timer support" | |
45 | depends on TIMER && NDS32 | |
46 | help | |
47 | Select this to enable a timer for AG01P devices. | |
48 | ||
a54915d8 | 49 | config ALTERA_TIMER |
435ae76e | 50 | bool "Altera timer support" |
a54915d8 TC |
51 | depends on TIMER |
52 | help | |
435ae76e | 53 | Select this to enable a timer for Altera devices. Please find |
a54915d8 TC |
54 | details on the "Embedded Peripherals IP User Guide" of Altera. |
55 | ||
7dbebebb | 56 | config ANDES_PLMT_TIMER |
79b135f1 SA |
57 | bool |
58 | depends on RISCV_MMODE || SPL_RISCV_MMODE | |
59 | help | |
60 | The Andes PLMT block holds memory-mapped mtime register | |
61 | associated with timer tick. | |
62 | ||
73fe4111 BM |
63 | config ARC_TIMER |
64 | bool "ARC timer support" | |
65 | depends on TIMER && ARC && CLK | |
66 | help | |
67 | Select this to enable built-in ARC timers. | |
68 | ARC cores may have up to 2 built-in timers: timer0 and timer1, | |
69 | usually at least one of them exists. Either of them is supported | |
70 | in U-Boot. | |
71 | ||
72 | config AST_TIMER | |
73 | bool "Aspeed ast2400/ast2500 timer support" | |
74 | depends on TIMER | |
75 | default y if ARCH_ASPEED | |
76 | help | |
77 | Select this to enable timer for Aspeed ast2400/ast2500 devices. | |
78 | This is a simple sys timer driver, it is compatible with lib/time.c, | |
79 | but does not support any interrupts. Even though SoC has 8 hardware | |
80 | counters, they are all treated as a single device by this driver. | |
81 | This is mostly because they all share several registers which | |
82 | makes it difficult to completely separate them. | |
83 | ||
84 | config ATCPIT100_TIMER | |
85 | bool "ATCPIT100 timer support" | |
86 | depends on TIMER | |
87 | help | |
88 | Select this to enable a ATCPIT100 timer which will be embedded | |
89 | in AE3XX, AE250 boards. | |
90 | ||
47edaea4 WY |
91 | config ATMEL_PIT_TIMER |
92 | bool "Atmel periodic interval timer support" | |
93 | depends on TIMER | |
94 | help | |
95 | Select this to enable a periodic interval timer for Atmel devices, | |
96 | it is designed to offer maximum accuracy and efficient management, | |
97 | even for systems with long response time. | |
98 | ||
72c37d12 MS |
99 | config CADENCE_TTC_TIMER |
100 | bool "Cadence TTC (Triple Timer Counter)" | |
101 | depends on TIMER | |
102 | help | |
103 | Enables support for the cadence ttc driver. This driver is present | |
104 | on Xilinx Zynq and ZynqMP SoCs. | |
105 | ||
66011a08 MV |
106 | config DESIGNWARE_APB_TIMER |
107 | bool "Designware APB Timer" | |
108 | depends on TIMER | |
109 | help | |
110 | Enables support for the Designware APB Timer driver. This timer is | |
111 | present on Altera SoCFPGA SoCs. | |
112 | ||
73fe4111 BM |
113 | config MPC83XX_TIMER |
114 | bool "MPC83xx timer support" | |
115 | depends on TIMER | |
7030f27e | 116 | help |
73fe4111 BM |
117 | Select this to enable support for the timer found on |
118 | devices based on the MPC83xx family of SoCs. | |
7030f27e | 119 | |
4d0732bf MV |
120 | config RENESAS_OSTM_TIMER |
121 | bool "Renesas RZ/A1 R7S72100 OSTM Timer" | |
122 | depends on TIMER | |
123 | help | |
124 | Enables support for the Renesas OSTM Timer driver. | |
125 | This timer is present on Renesas RZ/A1 R7S72100 SoCs. | |
126 | ||
5824bc6d BM |
127 | config X86_TSC_TIMER_FREQ |
128 | int "x86 TSC timer frequency in Hz" | |
6ce38364 | 129 | depends on X86_TSC_TIMER |
5824bc6d | 130 | default 1000000000 |
6ce38364 | 131 | help |
5824bc6d | 132 | Sets the estimated CPU frequency in Hz when TSC is used as the |
6ce38364 BM |
133 | early timer and the frequency can neither be calibrated via some |
134 | hardware ways, nor got from device tree at the time when device | |
135 | tree is not available yet. | |
136 | ||
057b6139 SG |
137 | config NOMADIK_MTU_TIMER |
138 | bool "Nomadik MTU Timer" | |
139 | depends on TIMER | |
140 | help | |
141 | Enables support for the Nomadik Multi Timer Unit (MTU), | |
142 | used in ST-Ericsson Ux500 SoCs. | |
143 | The MTU provides 4 decrementing free-running timers. | |
144 | At the moment, only the first timer is used by the driver. | |
145 | ||
dadf3137 M |
146 | config OMAP_TIMER |
147 | bool "Omap timer support" | |
148 | depends on TIMER | |
149 | help | |
150 | Select this to enable an timer for Omap devices. | |
151 | ||
60262cd0 BM |
152 | config RISCV_TIMER |
153 | bool "RISC-V timer support" | |
154 | depends on TIMER && RISCV | |
155 | help | |
c33efafa SA |
156 | Select this to enable support for a generic RISC-V S-Mode timer |
157 | driver. | |
60262cd0 | 158 | |
73fe4111 BM |
159 | config ROCKCHIP_TIMER |
160 | bool "Rockchip timer support" | |
4697abea | 161 | depends on TIMER |
4697abea | 162 | help |
73fe4111 BM |
163 | Select this to enable support for the timer found on |
164 | Rockchip devices. | |
165 | ||
166 | config SANDBOX_TIMER | |
167 | bool "Sandbox timer support" | |
168 | depends on SANDBOX && TIMER | |
169 | help | |
170 | Select this to enable an emulated timer for sandbox. It gets | |
171 | time from host os. | |
4697abea | 172 | |
347cb2ed PC |
173 | config STI_TIMER |
174 | bool "STi timer support" | |
175 | depends on TIMER | |
176 | default y if ARCH_STI | |
177 | help | |
178 | Select this to enable a timer for STi devices. | |
179 | ||
5120a083 | 180 | config STM32_TIMER |
73fe4111 | 181 | bool "STM32 timer support" |
5120a083 PC |
182 | depends on TIMER |
183 | help | |
184 | Select this to enable support for the timer found on | |
185 | STM32 devices. | |
186 | ||
73fe4111 BM |
187 | config X86_TSC_TIMER |
188 | bool "x86 Time-Stamp Counter (TSC) timer support" | |
189 | depends on TIMER && X86 | |
2c21749d | 190 | help |
73fe4111 | 191 | Select this to enable Time-Stamp Counter (TSC) timer for x86. |
2c21749d | 192 | |
77dd7c68 SG |
193 | config X86_TSC_READ_BASE |
194 | bool "Read the TSC timer base on start-up" | |
195 | depends on X86_TSC_TIMER | |
196 | help | |
197 | On x86 platforms the TSC timer tick starts at the value 0 on reset. | |
198 | This it makes no sense to read the timer on boot and use that as the | |
199 | base, since we will miss some time taken to load U-Boot, etc. This | |
200 | delay is controlled by the SoC and we cannot reduce it, but for | |
201 | bootstage we want to record the time since reset as accurately as | |
202 | possible. | |
203 | ||
204 | The only exception is when U-Boot is used as a secondary bootloader, | |
205 | where this option should be enabled. | |
206 | ||
642e8487 SG |
207 | config TPL_X86_TSC_TIMER_NATIVE |
208 | bool "x86 TSC timer uses native calibration" | |
209 | depends on TPL && X86_TSC_TIMER | |
210 | help | |
211 | Selects native timer calibration for TPL and don't include the other | |
212 | methods in the code. This helps to reduce code size in TPL and works | |
213 | on fairly modern Intel chips. Code-size reductions is about 700 | |
214 | bytes. | |
215 | ||
d3c3606c RL |
216 | config MTK_TIMER |
217 | bool "MediaTek timer support" | |
218 | depends on TIMER | |
219 | help | |
220 | Select this to enable support for the timer found on | |
221 | MediaTek devices. | |
222 | ||
ed1b7266 CB |
223 | config MCHP_PIT64B_TIMER |
224 | bool "Microchip 64-bit periodic interval timer support" | |
225 | depends on TIMER | |
226 | help | |
227 | Select this to enable support for Microchip 64-bit periodic | |
228 | interval timer. | |
229 | ||
f8c8573b GB |
230 | config IMX_GPT_TIMER |
231 | bool "NXP i.MX GPT timer support" | |
232 | depends on TIMER | |
233 | help | |
234 | Select this to enable support for the timer found on | |
235 | NXP i.MX devices. | |
236 | ||
c8a7ba9e | 237 | endmenu |