projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 8a3244d0 | 1 | CONFIG_ARM=y |
| abf8d963 | 2 | CONFIG_COUNTER_FREQUENCY=400000000 |
| 8a3244d0 SCL |
3 | CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" |
| 4 | CONFIG_ARCH_SOCFPGA=y | |
| 5 | CONFIG_SYS_TEXT_BASE=0x200000 | |
| 9802154a | 6 | CONFIG_SYS_MALLOC_LEN=0x500000 |
| 8a3244d0 SCL |
7 | CONFIG_NR_DRAM_BANKS=2 |
| 8 | CONFIG_ENV_SIZE=0x1000 | |
| 9 | CONFIG_ENV_OFFSET=0x200 | |
| 8a3244d0 | 10 | CONFIG_DM_GPIO=y |
| 2bba7807 | 11 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" |
| 8a3244d0 SCL |
12 | CONFIG_SPL_TEXT_BASE=0xFFE00000 |
| 13 | CONFIG_SOCFPGA_SECURE_VAB_AUTH=y | |
| 14 | CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y | |
| 15 | CONFIG_IDENT_STRING="socfpga_agilex" | |
| 16 | CONFIG_SPL_FS_FAT=y | |
| 49c8ef0e | 17 | CONFIG_SYS_LOAD_ADDR=0x02000000 |
| eaf6ea6a TR |
18 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 19 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 | |
| d46e86d2 | 20 | CONFIG_REMAKE_ELF=y |
| 8a3244d0 | 21 | CONFIG_FIT=y |
| cdca9860 | 22 | CONFIG_SPL_FIT_SIGNATURE=y |
| 8a3244d0 SCL |
23 | CONFIG_SPL_LOAD_FIT=y |
| 24 | CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000 | |
| 25 | # CONFIG_USE_SPL_FIT_GENERATOR is not set | |
| 8a3244d0 SCL |
26 | CONFIG_BOOTDELAY=5 |
| 27 | CONFIG_USE_BOOTARGS=y | |
| 28 | CONFIG_BOOTARGS="earlycon" | |
| 29 | CONFIG_USE_BOOTCOMMAND=y | |
| 30 | CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" | |
| ca8a329a | 31 | CONFIG_SPL_MAX_SIZE=0x40000 |
| 6600b355 TR |
32 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 33 | CONFIG_SPL_BSS_START_ADDR=0x3ff00000 | |
| 9b5f9aeb | 34 | CONFIG_SPL_BSS_MAX_SIZE=0x100000 |
| f113d7d3 TR |
35 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| 36 | CONFIG_SPL_STACK=0xffe3f000 | |
| 1e52db67 | 37 | CONFIG_SPL_CRC32=y |
| 8a3244d0 SCL |
38 | CONFIG_SPL_CACHE=y |
| 39 | CONFIG_SPL_SPI_LOAD=y | |
| 3e5b62f7 | 40 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 |
| 8a3244d0 SCL |
41 | CONFIG_SPL_ATF=y |
| 42 | CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y | |
| 43 | CONFIG_HUSH_PARSER=y | |
| 44 | CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " | |
| cf493582 | 45 | CONFIG_SYS_MAXARGS=64 |
| d0ee7f29 | 46 | CONFIG_SYS_PBSIZE=2082 |
| 8a3244d0 SCL |
47 | CONFIG_CMD_MEMTEST=y |
| 48 | CONFIG_CMD_GPIO=y | |
| 49 | CONFIG_CMD_I2C=y | |
| 50 | CONFIG_CMD_MMC=y | |
| 51 | CONFIG_CMD_SPI=y | |
| 52 | CONFIG_CMD_USB=y | |
| 53 | CONFIG_CMD_DHCP=y | |
| 54 | CONFIG_CMD_MII=y | |
| 55 | CONFIG_CMD_PING=y | |
| 56 | CONFIG_CMD_CACHE=y | |
| 57 | CONFIG_CMD_EXT4=y | |
| 58 | CONFIG_CMD_FAT=y | |
| 59 | CONFIG_CMD_FS_GENERIC=y | |
| 60 | CONFIG_ENV_IS_IN_MMC=y | |
| fdfb17b1 TR |
61 | CONFIG_USE_BOOTFILE=y |
| 62 | CONFIG_BOOTFILE="kernel.itb" | |
| 8a3244d0 SCL |
63 | CONFIG_NET_RANDOM_ETHADDR=y |
| 64 | CONFIG_SPL_DM_SEQ_ALIAS=y | |
| 65 | CONFIG_SPL_ALTERA_SDRAM=y | |
| 66 | CONFIG_DWAPB_GPIO=y | |
| 67 | CONFIG_DM_I2C=y | |
| 68 | CONFIG_SYS_I2C_DW=y | |
| 8a3244d0 SCL |
69 | CONFIG_MMC_DW=y |
| 70 | CONFIG_MTD=y | |
| 71 | CONFIG_SF_DEFAULT_MODE=0x2003 | |
| 72 | CONFIG_SPI_FLASH_SPANSION=y | |
| 73 | CONFIG_SPI_FLASH_STMICRO=y | |
| 74 | CONFIG_PHY_MICREL=y | |
| 75 | CONFIG_PHY_MICREL_KSZ90X1=y | |
| 76 | CONFIG_DM_ETH=y | |
| 77 | CONFIG_ETH_DESIGNWARE=y | |
| 78 | CONFIG_MII=y | |
| 79 | CONFIG_DM_RESET=y | |
| 80 | CONFIG_SPI=y | |
| 81 | CONFIG_CADENCE_QSPI=y | |
| 82 | CONFIG_DESIGNWARE_SPI=y | |
| 83 | CONFIG_USB=y | |
| 8a3244d0 SCL |
84 | CONFIG_USB_DWC2=y |
| 85 | CONFIG_USB_STORAGE=y | |
| 86 | CONFIG_DESIGNWARE_WATCHDOG=y | |
| 87 | CONFIG_WDT=y | |
| 88 | # CONFIG_SPL_USE_TINY_PRINTF is not set | |
| 89 | CONFIG_PANIC_HANG=y |