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Commit | Line | Data |
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0900840b JT |
1 | { |
2 | { | |
3 | { | |
4 | .rank = 0x1, | |
5 | .col = 0xB, | |
6 | .bk = 0x3, | |
7 | .bw = 0x1, | |
8 | .dbw = 0x1, | |
9 | .row_3_4 = 0x0, | |
10 | .cs0_row = 0x11, | |
11 | .cs1_row = 0x11, | |
12 | .cs0_high16bit_row = 0x0, | |
13 | .cs1_high16bit_row = 0x0, | |
14 | .ddrconfig = 0 | |
15 | }, | |
16 | { | |
17 | {0x2f0d060a}, | |
18 | {0x07020804}, | |
19 | {0x00000602}, | |
20 | {0x00001111}, | |
21 | {0x00000054}, | |
22 | {0x00000000}, | |
23 | 0x000000ff | |
24 | } | |
25 | }, | |
26 | { | |
27 | .ddr_freq = 328, /* clock rate(MHz) */ | |
28 | .dramtype = LPDDR4, | |
29 | .num_channels = 1, | |
30 | .stride = 0, | |
31 | .odt = 0 | |
32 | }, | |
33 | { | |
34 | { | |
35 | {0x00000000, 0x81081020}, /* MSTR */ | |
36 | {0x00000064, 0x0014002e}, /* RFSHTMG */ | |
37 | {0x000000d0, 0x00020142}, /* INIT0 */ | |
38 | {0x000000d4, 0x00220000}, /* INIT1 */ | |
39 | {0x000000d8, 0x00000202}, /* INIT2 */ | |
40 | {0x000000dc, 0x00240012}, /* INIT3 */ | |
41 | {0x000000e0, 0x00310000}, /* INIT4 */ | |
42 | {0x000000e8, 0x00100000}, /* INIT6 */ | |
43 | {0x000000ec, 0x00000000}, /* INIT7 */ | |
44 | {0x000000f4, 0x000f033f}, /* RANKCTL */ | |
45 | {0x00000100, 0x0c070507}, /* DRAMTMG0 */ | |
46 | {0x00000104, 0x0003040b}, /* DRAMTMG1 */ | |
47 | {0x00000108, 0x04070c0d}, /* DRAMTMG2 */ | |
48 | {0x0000010c, 0x00505000}, /* DRAMTMG3 */ | |
49 | {0x00000110, 0x03040204}, /* DRAMTMG4 */ | |
50 | {0x00000114, 0x02030303}, /* DRAMTMG5 */ | |
51 | {0x00000118, 0x01010004}, /* DRAMTMG6 */ | |
52 | {0x0000011c, 0x00000301}, /* DRAMTMG7 */ | |
53 | {0x00000120, 0x00000303}, /* DRAMTMG8 */ | |
54 | {0x00000130, 0x00020000}, /* DRAMTMG12 */ | |
55 | {0x00000134, 0x00100002}, /* DRAMTMG13 */ | |
56 | {0x00000138, 0x00000030}, /* DRAMTMG14 */ | |
57 | {0x00000180, 0x00a40005}, /* ZQCTL0 */ | |
58 | {0x00000184, 0x00900000}, /* ZQCTL1 */ | |
59 | {0x00000190, 0x07040000}, /* DFITMG0 */ | |
60 | {0x00000198, 0x07000101}, /* DFILPCFG0 */ | |
61 | {0x000001a0, 0xc0400003}, /* DFIUPD0 */ | |
62 | {0x00000240, 0x0905092c}, /* ODTCFG */ | |
63 | {0x00000244, 0x00000101}, /* ODTMAP */ | |
64 | {0x00000250, 0x00001f00}, /* SCHED */ | |
65 | {0x00000490, 0x00000001}, /* PCTRL_0 */ | |
66 | {0xffffffff, 0xffffffff} | |
67 | } | |
68 | }, | |
69 | { | |
70 | { | |
71 | {0x00000004, 0x0000008d}, /* PHYREG01 */ | |
72 | {0x00000014, 0x0000000e}, /* PHYREG05 */ | |
73 | {0x00000018, 0x00000000}, /* PHYREG06 */ | |
74 | {0x0000001c, 0x00000008}, /* PHYREG07 */ | |
75 | {0xffffffff, 0xffffffff} | |
76 | } | |
77 | } | |
78 | }, |