[J-u-boot.git] / drivers / mtd / spi / spi_flash.c

/*
 * SPI flash interface
 *
 * Copyright (C) 2008 Atmel Corporation
 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
 *
 * Licensed under the GPL-2 or later.
 */

#include <common.h>
#include <fdtdec.h>
#include <malloc.h>
#include <spi.h>
#include <spi_flash.h>
#include <watchdog.h>

#include "spi_flash_internal.h"

DECLARE_GLOBAL_DATA_PTR;

static void spi_flash_addr(u32 addr, u8 *cmd)
{
	/* cmd[0] is actual command */
	cmd[1] = addr >> 16;
	cmd[2] = addr >> 8;
	cmd[3] = addr >> 0;
}

static int spi_flash_read_write(struct spi_slave *spi,
				const u8 *cmd, size_t cmd_len,
				const u8 *data_out, u8 *data_in,
				size_t data_len)
{
	unsigned long flags = SPI_XFER_BEGIN;
	int ret;

	if (data_len == 0)
		flags |= SPI_XFER_END;

	ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
	if (ret) {
		debug("SF: Failed to send command (%zu bytes): %d\n",
				cmd_len, ret);
	} else if (data_len != 0) {
		ret = spi_xfer(spi, data_len * 8, data_out, data_in, SPI_XFER_END);
		if (ret)
			debug("SF: Failed to transfer %zu bytes of data: %d\n",
					data_len, ret);
	}

	return ret;
}

int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
{
	return spi_flash_cmd_read(spi, &cmd, 1, response, len);
}

int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
		size_t cmd_len, void *data, size_t data_len)
{
	return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len);
}

int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
		const void *data, size_t data_len)
{
	return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
}

int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
		size_t len, const void *buf)
{
	unsigned long page_addr, byte_addr, page_size;
	size_t chunk_len, actual;
	int ret;
	u8 cmd[4];

	page_size = flash->page_size;
	page_addr = offset / page_size;
	byte_addr = offset % page_size;

	ret = spi_claim_bus(flash->spi);
	if (ret) {
		debug("SF: unable to claim SPI bus\n");
		return ret;
	}

	cmd[0] = CMD_PAGE_PROGRAM;
	for (actual = 0; actual < len; actual += chunk_len) {
		chunk_len = min(len - actual, page_size - byte_addr);

		if (flash->spi->max_write_size)
			chunk_len = min(chunk_len, flash->spi->max_write_size);

		cmd[1] = page_addr >> 8;
		cmd[2] = page_addr;
		cmd[3] = byte_addr;

		debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
		      buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);

		ret = spi_flash_cmd_write_enable(flash);
		if (ret < 0) {
			debug("SF: enabling write failed\n");
			break;
		}

		ret = spi_flash_cmd_write(flash->spi, cmd, 4,
					  buf + actual, chunk_len);
		if (ret < 0) {
			debug("SF: write failed\n");
			break;
		}

		ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
		if (ret)
			break;

		byte_addr += chunk_len;
		if (byte_addr == page_size) {
			page_addr++;
			byte_addr = 0;
		}
	}

	spi_release_bus(flash->spi);
	return ret;
}

int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
		size_t cmd_len, void *data, size_t data_len)
{
	struct spi_slave *spi = flash->spi;
	int ret;

	spi_claim_bus(spi);
	ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
	spi_release_bus(spi);

	return ret;
}

int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
		size_t len, void *data)
{
	u8 cmd[5];

	/* Handle memory-mapped SPI */
	if (flash->memory_map) {
		memcpy(data, flash->memory_map + offset, len);
		return 0;
	}

	cmd[0] = CMD_READ_ARRAY_FAST;
	spi_flash_addr(offset, cmd);
	cmd[4] = 0x00;

	return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len);
}

int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
			   u8 cmd, u8 poll_bit)
{
	struct spi_slave *spi = flash->spi;
	unsigned long timebase;
	int ret;
	u8 status;

	ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
	if (ret) {
		debug("SF: Failed to send command %02x: %d\n", cmd, ret);
		return ret;
	}

	timebase = get_timer(0);
	do {
		WATCHDOG_RESET();

		ret = spi_xfer(spi, 8, NULL, &status, 0);
		if (ret)
			return -1;

		if ((status & poll_bit) == 0)
			break;

	} while (get_timer(timebase) < timeout);

	spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);

	if ((status & poll_bit) == 0)
		return 0;

	/* Timed out */
	debug("SF: time out!\n");
	return -1;
}

int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
{
	return spi_flash_cmd_poll_bit(flash, timeout,
		CMD_READ_STATUS, STATUS_WIP);
}

int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
{
	u32 end, erase_size;
	int ret;
	u8 cmd[4];

	erase_size = flash->sector_size;
	if (offset % erase_size || len % erase_size) {
		debug("SF: Erase offset/length not multiple of erase size\n");
		return -1;
	}

	ret = spi_claim_bus(flash->spi);
	if (ret) {
		debug("SF: Unable to claim SPI bus\n");
		return ret;
	}

	if (erase_size == 4096)
		cmd[0] = CMD_ERASE_4K;
	else
		cmd[0] = CMD_ERASE_64K;
	end = offset + len;

	while (offset < end) {
		spi_flash_addr(offset, cmd);
		offset += erase_size;

		debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
		      cmd[2], cmd[3], offset);

		ret = spi_flash_cmd_write_enable(flash);
		if (ret)
			goto out;

		ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), NULL, 0);
		if (ret)
			goto out;

		ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT);
		if (ret)
			goto out;
	}

 out:
	spi_release_bus(flash->spi);
	return ret;
}

int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
{
	u8 cmd;
	int ret;

	ret = spi_flash_cmd_write_enable(flash);
	if (ret < 0) {
		debug("SF: enabling write failed\n");
		return ret;
	}

	cmd = CMD_WRITE_STATUS;
	ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &sr, 1);
	if (ret) {
		debug("SF: fail to write status register\n");
		return ret;
	}

	ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
	if (ret < 0) {
		debug("SF: write status register timed out\n");
		return ret;
	}

	return 0;
}

#ifdef CONFIG_OF_CONTROL
int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
{
	fdt_addr_t addr;
	fdt_size_t size;
	int node;

	/* If there is no node, do nothing */
	node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
	if (node < 0)
		return 0;

	addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
	if (addr == FDT_ADDR_T_NONE) {
		debug("%s: Cannot decode address\n", __func__);
		return 0;
	}

	if (flash->size != size) {
		debug("%s: Memory map must cover entire device\n", __func__);
		return -1;
	}
	flash->memory_map = (void *)addr;

	return 0;
}
#endif /* CONFIG_OF_CONTROL */

/*
 * The following table holds all device probe functions
 *
 * shift:  number of continuation bytes before the ID
 * idcode: the expected IDCODE or 0xff for non JEDEC devices
 * probe:  the function to call
 *
 * Non JEDEC devices should be ordered in the table such that
 * the probe functions with best detection algorithms come first.
 *
 * Several matching entries are permitted, they will be tried
 * in sequence until a probe function returns non NULL.
 *
 * IDCODE_CONT_LEN may be redefined if a device needs to declare a
 * larger "shift" value.  IDCODE_PART_LEN generally shouldn't be
 * changed.  This is the max number of bytes probe functions may
 * examine when looking up part-specific identification info.
 *
 * Probe functions will be given the idcode buffer starting at their
 * manu id byte (the "idcode" in the table below).  In other words,
 * all of the continuation bytes will be skipped (the "shift" below).
 */
#define IDCODE_CONT_LEN 0
#define IDCODE_PART_LEN 5
static const struct {
	const u8 shift;
	const u8 idcode;
	struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
} flashes[] = {
	/* Keep it sorted by define name */
#ifdef CONFIG_SPI_FLASH_ATMEL
	{ 0, 0x1f, spi_flash_probe_atmel, },
#endif
#ifdef CONFIG_SPI_FLASH_EON
	{ 0, 0x1c, spi_flash_probe_eon, },
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX
	{ 0, 0xc2, spi_flash_probe_macronix, },
#endif
#ifdef CONFIG_SPI_FLASH_SPANSION
	{ 0, 0x01, spi_flash_probe_spansion, },
#endif
#ifdef CONFIG_SPI_FLASH_SST
	{ 0, 0xbf, spi_flash_probe_sst, },
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO
	{ 0, 0x20, spi_flash_probe_stmicro, },
#endif
#ifdef CONFIG_SPI_FLASH_WINBOND
	{ 0, 0xef, spi_flash_probe_winbond, },
#endif
#ifdef CONFIG_SPI_FRAM_RAMTRON
	{ 6, 0xc2, spi_fram_probe_ramtron, },
# undef IDCODE_CONT_LEN
# define IDCODE_CONT_LEN 6
#endif
	/* Keep it sorted by best detection */
#ifdef CONFIG_SPI_FLASH_STMICRO
	{ 0, 0xff, spi_flash_probe_stmicro, },
#endif
#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
	{ 0, 0xff, spi_fram_probe_ramtron, },
#endif
};
#define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)

struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
		unsigned int max_hz, unsigned int spi_mode)
{
	struct spi_slave *spi;
	struct spi_flash *flash = NULL;
	int ret, i, shift;
	u8 idcode[IDCODE_LEN], *idp;

	spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
	if (!spi) {
		printf("SF: Failed to set up slave\n");
		return NULL;
	}

	ret = spi_claim_bus(spi);
	if (ret) {
		debug("SF: Failed to claim SPI bus: %d\n", ret);
		goto err_claim_bus;
	}

	/* Read the ID codes */
	ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
	if (ret)
		goto err_read_id;

#ifdef DEBUG
	printf("SF: Got idcodes\n");
	print_buffer(0, idcode, 1, sizeof(idcode), 0);
#endif

	/* count the number of continuation bytes */
	for (shift = 0, idp = idcode;
	     shift < IDCODE_CONT_LEN && *idp == 0x7f;
	     ++shift, ++idp)
		continue;

	/* search the table for matches in shift and id */
	for (i = 0; i < ARRAY_SIZE(flashes); ++i)
		if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
			/* we have a match, call probe */
			flash = flashes[i].probe(spi, idp);
			if (flash)
				break;
		}

	if (!flash) {
		printf("SF: Unsupported manufacturer %02x\n", *idp);
		goto err_manufacturer_probe;
	}

#ifdef CONFIG_OF_CONTROL
	if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
		debug("SF: FDT decode error\n");
		goto err_manufacturer_probe;
	}
#endif
	printf("SF: Detected %s with page size ", flash->name);
	print_size(flash->sector_size, ", total ");
	print_size(flash->size, "");
	if (flash->memory_map)
		printf(", mapped at %p", flash->memory_map);
	puts("\n");

	spi_release_bus(spi);

	return flash;

err_manufacturer_probe:
err_read_id:
	spi_release_bus(spi);
err_claim_bus:
	spi_free_slave(spi);
	return NULL;
}

void *spi_flash_do_alloc(int offset, int size, struct spi_slave *spi,
			 const char *name)
{
	struct spi_flash *flash;
	void *ptr;

	ptr = malloc(size);
	if (!ptr) {
		debug("SF: Failed to allocate memory\n");
		return NULL;
	}
	memset(ptr, '\0', size);
	flash = (struct spi_flash *)(ptr + offset);

	/* Set up some basic fields - caller will sort out sizes */
	flash->spi = spi;
	flash->name = name;

	flash->read = spi_flash_cmd_read_fast;
	flash->write = spi_flash_cmd_write_multi;
	flash->erase = spi_flash_cmd_erase;

	return flash;
}

void spi_flash_free(struct spi_flash *flash)
{
	spi_free_slave(flash->spi);
	free(flash);
}
Commit	Line	Data
d25ce7d2 HS	1	/*
	2	* SPI flash interface
	3	*
	4	* Copyright (C) 2008 Atmel Corporation
0d3fe2b1 RM	5	* Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
0d3fe2b1 RM	6	*
4166ee58	7	* Licensed under the GPL-2 or later.
d25ce7d2	8	*/
f773a1bb	9
d25ce7d2	10	#include <common.h>
bb8215f4	11	#include <fdtdec.h>
d25ce7d2 HS	12	#include <malloc.h>
	13	#include <spi.h>
	14	#include <spi_flash.h>
bd0d19cc	15	#include <watchdog.h>
d25ce7d2 HS	16
	17	#include "spi_flash_internal.h"
	18
bb8215f4 SG	19	DECLARE_GLOBAL_DATA_PTR;
bb8215f4 SG	20
e7b44edd MF	21	static void spi_flash_addr(u32 addr, u8 *cmd)
	22	{
	23	/* cmd[0] is actual command */
	24	cmd[1] = addr >> 16;
	25	cmd[2] = addr >> 8;
	26	cmd[3] = addr >> 0;
	27	}
	28
000044d8 MF	29	static int spi_flash_read_write(struct spi_slave *spi,
	30	const u8 *cmd, size_t cmd_len,
	31	const u8 data_out, u8 data_in,
	32	size_t data_len)
d25ce7d2 HS	33	{
	34	unsigned long flags = SPI_XFER_BEGIN;
	35	int ret;
	36
	37	if (data_len == 0)
	38	flags \|= SPI_XFER_END;
	39
	40	ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
	41	if (ret) {
000044d8	42	debug("SF: Failed to send command (%zu bytes): %d\n",
d25ce7d2 HS	43	cmd_len, ret);
d25ce7d2 HS	44	} else if (data_len != 0) {
000044d8	45	ret = spi_xfer(spi, data_len * 8, data_out, data_in, SPI_XFER_END);
d25ce7d2	46	if (ret)
000044d8	47	debug("SF: Failed to transfer %zu bytes of data: %d\n",
d25ce7d2 HS	48	data_len, ret);
	49	}
	50
	51	return ret;
	52	}
	53
000044d8	54	int spi_flash_cmd(struct spi_slave spi, u8 cmd, void response, size_t len)
d25ce7d2	55	{
000044d8 MF	56	return spi_flash_cmd_read(spi, &cmd, 1, response, len);
000044d8 MF	57	}
d25ce7d2	58
000044d8 MF	59	int spi_flash_cmd_read(struct spi_slave spi, const u8 cmd,
	60	size_t cmd_len, void *data, size_t data_len)
	61	{
	62	return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len);
d25ce7d2 HS	63	}
d25ce7d2 HS	64
000044d8 MF	65	int spi_flash_cmd_write(struct spi_slave spi, const u8 cmd, size_t cmd_len,
	66	const void *data, size_t data_len)
	67	{
	68	return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
	69	}
d25ce7d2	70
d4aa5009 MF	71	int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
	72	size_t len, const void *buf)
	73	{
	74	unsigned long page_addr, byte_addr, page_size;
	75	size_t chunk_len, actual;
	76	int ret;
	77	u8 cmd[4];
	78
	79	page_size = flash->page_size;
	80	page_addr = offset / page_size;
	81	byte_addr = offset % page_size;
	82
	83	ret = spi_claim_bus(flash->spi);
	84	if (ret) {
	85	debug("SF: unable to claim SPI bus\n");
	86	return ret;
	87	}
	88
	89	cmd[0] = CMD_PAGE_PROGRAM;
	90	for (actual = 0; actual < len; actual += chunk_len) {
	91	chunk_len = min(len - actual, page_size - byte_addr);
	92
1e566bc6 SG	93	if (flash->spi->max_write_size)
	94	chunk_len = min(chunk_len, flash->spi->max_write_size);
	95
d4aa5009 MF	96	cmd[1] = page_addr >> 8;
	97	cmd[2] = page_addr;
	98	cmd[3] = byte_addr;
	99
	100	debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
	101	buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
	102
	103	ret = spi_flash_cmd_write_enable(flash);
	104	if (ret < 0) {
	105	debug("SF: enabling write failed\n");
	106	break;
	107	}
	108
	109	ret = spi_flash_cmd_write(flash->spi, cmd, 4,
	110	buf + actual, chunk_len);
	111	if (ret < 0) {
	112	debug("SF: write failed\n");
	113	break;
	114	}
	115
	116	ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
	117	if (ret)
	118	break;
	119
1e566bc6 SG	120	byte_addr += chunk_len;
	121	if (byte_addr == page_size) {
	122	page_addr++;
	123	byte_addr = 0;
	124	}
d4aa5009 MF	125	}
d4aa5009 MF	126
d4aa5009 MF	127	spi_release_bus(flash->spi);
	128	return ret;
	129	}
	130
d25ce7d2 HS	131	int spi_flash_read_common(struct spi_flash flash, const u8 cmd,
	132	size_t cmd_len, void *data, size_t data_len)
	133	{
	134	struct spi_slave *spi = flash->spi;
	135	int ret;
	136
	137	spi_claim_bus(spi);
	138	ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
	139	spi_release_bus(spi);
	140
	141	return ret;
	142	}
	143
a4c3b40b MF	144	int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
	145	size_t len, void *data)
	146	{
	147	u8 cmd[5];
	148
bb8215f4	149	/* Handle memory-mapped SPI */
0d3b596a	150	if (flash->memory_map) {
bb8215f4	151	memcpy(data, flash->memory_map + offset, len);
0d3b596a JT	152	return 0;
0d3b596a JT	153	}
bb8215f4	154
a4c3b40b MF	155	cmd[0] = CMD_READ_ARRAY_FAST;
	156	spi_flash_addr(offset, cmd);
	157	cmd[4] = 0x00;
	158
	159	return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len);
	160	}
	161
6163045b MF	162	int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
	163	u8 cmd, u8 poll_bit)
	164	{
	165	struct spi_slave *spi = flash->spi;
	166	unsigned long timebase;
	167	int ret;
	168	u8 status;
	169
	170	ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
	171	if (ret) {
	172	debug("SF: Failed to send command %02x: %d\n", cmd, ret);
	173	return ret;
	174	}
	175
	176	timebase = get_timer(0);
	177	do {
bd0d19cc PS	178	WATCHDOG_RESET();
bd0d19cc PS	179
6163045b MF	180	ret = spi_xfer(spi, 8, NULL, &status, 0);
	181	if (ret)
	182	return -1;
	183
	184	if ((status & poll_bit) == 0)
	185	break;
	186
	187	} while (get_timer(timebase) < timeout);
	188
	189	spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
	190
	191	if ((status & poll_bit) == 0)
	192	return 0;
	193
	194	/* Timed out */
	195	debug("SF: time out!\n");
	196	return -1;
	197	}
	198
	199	int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
	200	{
	201	return spi_flash_cmd_poll_bit(flash, timeout,
	202	CMD_READ_STATUS, STATUS_WIP);
	203	}
	204
c4e932ce	205	int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
e7b44edd	206	{
96bbf556	207	u32 end, erase_size;
e7b44edd MF	208	int ret;
	209	u8 cmd[4];
	210
4e6a5158	211	erase_size = flash->sector_size;
e7b44edd MF	212	if (offset % erase_size \|\| len % erase_size) {
	213	debug("SF: Erase offset/length not multiple of erase size\n");
	214	return -1;
	215	}
	216
	217	ret = spi_claim_bus(flash->spi);
	218	if (ret) {
	219	debug("SF: Unable to claim SPI bus\n");
	220	return ret;
	221	}
	222
c4e932ce MF	223	if (erase_size == 4096)
	224	cmd[0] = CMD_ERASE_4K;
	225	else
	226	cmd[0] = CMD_ERASE_64K;
96bbf556	227	end = offset + len;
e7b44edd MF	228
	229	while (offset < end) {
	230	spi_flash_addr(offset, cmd);
	231	offset += erase_size;
	232
	233	debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
	234	cmd[2], cmd[3], offset);
	235
2744a4e6	236	ret = spi_flash_cmd_write_enable(flash);
e7b44edd MF	237	if (ret)
	238	goto out;
	239
	240	ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), NULL, 0);
	241	if (ret)
	242	goto out;
	243
	244	ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT);
	245	if (ret)
	246	goto out;
	247	}
	248
e7b44edd MF	249	out:
	250	spi_release_bus(flash->spi);
	251	return ret;
	252	}
	253
41e17134 MF	254	int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
	255	{
	256	u8 cmd;
	257	int ret;
	258
	259	ret = spi_flash_cmd_write_enable(flash);
	260	if (ret < 0) {
	261	debug("SF: enabling write failed\n");
	262	return ret;
	263	}
	264
	265	cmd = CMD_WRITE_STATUS;
	266	ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &sr, 1);
	267	if (ret) {
	268	debug("SF: fail to write status register\n");
	269	return ret;
	270	}
	271
	272	ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
	273	if (ret < 0) {
	274	debug("SF: write status register timed out\n");
	275	return ret;
	276	}
	277
	278	return 0;
	279	}
	280
bb8215f4 SG	281	#ifdef CONFIG_OF_CONTROL
	282	int spi_flash_decode_fdt(const void blob, struct spi_flash flash)
	283	{
	284	fdt_addr_t addr;
	285	fdt_size_t size;
	286	int node;
	287
	288	/* If there is no node, do nothing */
	289	node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
	290	if (node < 0)
	291	return 0;
	292
	293	addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
	294	if (addr == FDT_ADDR_T_NONE) {
	295	debug("%s: Cannot decode address\n", __func__);
	296	return 0;
	297	}
	298
	299	if (flash->size != size) {
	300	debug("%s: Memory map must cover entire device\n", __func__);
	301	return -1;
	302	}
	303	flash->memory_map = (void *)addr;
	304
	305	return 0;
	306	}
	307	#endif /* CONFIG_OF_CONTROL */
	308
0d3fe2b1 RM	309	/*
	310	* The following table holds all device probe functions
	311	*
	312	* shift: number of continuation bytes before the ID
	313	* idcode: the expected IDCODE or 0xff for non JEDEC devices
	314	* probe: the function to call
	315	*
	316	* Non JEDEC devices should be ordered in the table such that
	317	* the probe functions with best detection algorithms come first.
	318	*
	319	* Several matching entries are permitted, they will be tried
	320	* in sequence until a probe function returns non NULL.
	321	*
	322	* IDCODE_CONT_LEN may be redefined if a device needs to declare a
	323	* larger "shift" value. IDCODE_PART_LEN generally shouldn't be
	324	* changed. This is the max number of bytes probe functions may
	325	* examine when looking up part-specific identification info.
	326	*
	327	* Probe functions will be given the idcode buffer starting at their
	328	* manu id byte (the "idcode" in the table below). In other words,
	329	* all of the continuation bytes will be skipped (the "shift" below).
	330	*/
	331	#define IDCODE_CONT_LEN 0
	332	#define IDCODE_PART_LEN 5
	333	static const struct {
	334	const u8 shift;
	335	const u8 idcode;
	336	struct spi_flash (probe) (struct spi_slave spi, u8 idcode);
	337	} flashes[] = {
	338	/* Keep it sorted by define name */
	339	#ifdef CONFIG_SPI_FLASH_ATMEL
	340	{ 0, 0x1f, spi_flash_probe_atmel, },
	341	#endif
d1d90656 CH	342	#ifdef CONFIG_SPI_FLASH_EON
	343	{ 0, 0x1c, spi_flash_probe_eon, },
	344	#endif
0d3fe2b1 RM	345	#ifdef CONFIG_SPI_FLASH_MACRONIX
	346	{ 0, 0xc2, spi_flash_probe_macronix, },
	347	#endif
	348	#ifdef CONFIG_SPI_FLASH_SPANSION
	349	{ 0, 0x01, spi_flash_probe_spansion, },
	350	#endif
	351	#ifdef CONFIG_SPI_FLASH_SST
	352	{ 0, 0xbf, spi_flash_probe_sst, },
	353	#endif
	354	#ifdef CONFIG_SPI_FLASH_STMICRO
	355	{ 0, 0x20, spi_flash_probe_stmicro, },
	356	#endif
	357	#ifdef CONFIG_SPI_FLASH_WINBOND
	358	{ 0, 0xef, spi_flash_probe_winbond, },
e0987e25 RM	359	#endif
	360	#ifdef CONFIG_SPI_FRAM_RAMTRON
	361	{ 6, 0xc2, spi_fram_probe_ramtron, },
	362	# undef IDCODE_CONT_LEN
	363	# define IDCODE_CONT_LEN 6
0d3fe2b1 RM	364	#endif
	365	/* Keep it sorted by best detection */
	366	#ifdef CONFIG_SPI_FLASH_STMICRO
	367	{ 0, 0xff, spi_flash_probe_stmicro, },
	368	#endif
e0987e25 RM	369	#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
	370	{ 0, 0xff, spi_fram_probe_ramtron, },
	371	#endif
0d3fe2b1 RM	372	};
	373	#define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
	374
d25ce7d2 HS	375	struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
	376	unsigned int max_hz, unsigned int spi_mode)
	377	{
	378	struct spi_slave *spi;
0d3fe2b1 RM	379	struct spi_flash *flash = NULL;
	380	int ret, i, shift;
	381	u8 idcode[IDCODE_LEN], *idp;
d25ce7d2 HS	382
	383	spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
	384	if (!spi) {
b376bbb4	385	printf("SF: Failed to set up slave\n");
d25ce7d2 HS	386	return NULL;
	387	}
	388
	389	ret = spi_claim_bus(spi);
	390	if (ret) {
	391	debug("SF: Failed to claim SPI bus: %d\n", ret);
	392	goto err_claim_bus;
	393	}
	394
	395	/* Read the ID codes */
0d3fe2b1	396	ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
d25ce7d2 HS	397	if (ret)
	398	goto err_read_id;
	399
0d3fe2b1 RM	400	#ifdef DEBUG
	401	printf("SF: Got idcodes\n");
	402	print_buffer(0, idcode, 1, sizeof(idcode), 0);
d25ce7d2	403	#endif
d25ce7d2	404
0d3fe2b1 RM	405	/* count the number of continuation bytes */
	406	for (shift = 0, idp = idcode;
	407	shift < IDCODE_CONT_LEN && *idp == 0x7f;
	408	++shift, ++idp)
	409	continue;
	410
	411	/* search the table for matches in shift and id */
	412	for (i = 0; i < ARRAY_SIZE(flashes); ++i)
	413	if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
	414	/* we have a match, call probe */
	415	flash = flashes[i].probe(spi, idp);
	416	if (flash)
	417	break;
	418	}
	419
	420	if (!flash) {
	421	printf("SF: Unsupported manufacturer %02x\n", *idp);
d25ce7d2	422	goto err_manufacturer_probe;
0d3fe2b1	423	}
d25ce7d2	424
bb8215f4 SG	425	#ifdef CONFIG_OF_CONTROL
	426	if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
	427	debug("SF: FDT decode error\n");
	428	goto err_manufacturer_probe;
	429	}
	430	#endif
493c3607 MF	431	printf("SF: Detected %s with page size ", flash->name);
493c3607 MF	432	print_size(flash->sector_size, ", total ");
bb8215f4 SG	433	print_size(flash->size, "");
	434	if (flash->memory_map)
	435	printf(", mapped at %p", flash->memory_map);
	436	puts("\n");
4e6a5158	437
d25ce7d2 HS	438	spi_release_bus(spi);
	439
	440	return flash;
	441
	442	err_manufacturer_probe:
	443	err_read_id:
	444	spi_release_bus(spi);
	445	err_claim_bus:
	446	spi_free_slave(spi);
	447	return NULL;
	448	}
	449
b5aec142 SG	450	void spi_flash_do_alloc(int offset, int size, struct spi_slave spi,
	451	const char *name)
	452	{
	453	struct spi_flash *flash;
	454	void *ptr;
	455
	456	ptr = malloc(size);
	457	if (!ptr) {
	458	debug("SF: Failed to allocate memory\n");
	459	return NULL;
	460	}
	461	memset(ptr, '\0', size);
	462	flash = (struct spi_flash *)(ptr + offset);
	463
	464	/* Set up some basic fields - caller will sort out sizes */
	465	flash->spi = spi;
	466	flash->name = name;
	467
	468	flash->read = spi_flash_cmd_read_fast;
	469	flash->write = spi_flash_cmd_write_multi;
	470	flash->erase = spi_flash_cmd_erase;
	471
	472	return flash;
	473	}
	474
d25ce7d2 HS	475	void spi_flash_free(struct spi_flash *flash)
	476	{
	477	spi_free_slave(flash->spi);
	478	free(flash);
	479	}