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Commit | Line | Data |
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0764c164 VL |
1 | /* |
2 | * (C) Copyright 2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
0764c164 VL |
6 | */ |
7 | ||
8 | /* | |
8875e3ab | 9 | * This file contains the configuration parameters for qemu-mips target. |
0764c164 VL |
10 | */ |
11 | ||
12 | #ifndef __CONFIG_H | |
13 | #define __CONFIG_H | |
14 | ||
6b2eba1b | 15 | #define CONFIG_QEMU_MIPS |
bdb53cf0 | 16 | |
0764c164 VL |
17 | #define CONFIG_MISC_INIT_R |
18 | ||
8875e3ab | 19 | #define CONFIG_TIMESTAMP /* Print image info with timestamp */ |
0764c164 | 20 | |
8875e3ab | 21 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
0764c164 VL |
22 | "addmisc=setenv bootargs ${bootargs} " \ |
23 | "console=ttyS0,${baudrate} " \ | |
24 | "panic=1\0" \ | |
25 | "bootfile=/tftpboot/vmlinux\0" \ | |
26 | "load=tftp 80500000 ${u-boot}\0" \ | |
27 | "" | |
28 | ||
29 | #define CONFIG_BOOTCOMMAND "bootp;bootelf" | |
30 | ||
0764c164 VL |
31 | /* |
32 | * BOOTP options | |
33 | */ | |
34 | #define CONFIG_BOOTP_BOOTFILESIZE | |
35 | #define CONFIG_BOOTP_BOOTPATH | |
36 | #define CONFIG_BOOTP_GATEWAY | |
37 | #define CONFIG_BOOTP_HOSTNAME | |
38 | ||
0764c164 VL |
39 | /* |
40 | * Command line configuration. | |
41 | */ | |
0764c164 VL |
42 | |
43 | #define CONFIG_DRIVER_NE2000 | |
6b2eba1b | 44 | #define CONFIG_DRIVER_NE2000_BASE 0xb4000300 |
0764c164 | 45 | |
6d0f6bcf JCPV |
46 | #define CONFIG_SYS_NS16550_SERIAL |
47 | #define CONFIG_SYS_NS16550_REG_SIZE 1 | |
48 | #define CONFIG_SYS_NS16550_CLK 115200 | |
6b2eba1b DS |
49 | #define CONFIG_SYS_NS16550_COM1 0xb40003f8 |
50 | #define CONFIG_CONS_INDEX 1 | |
0764c164 | 51 | |
713a9e15 SG |
52 | #ifdef CONFIG_SYS_BIG_ENDIAN |
53 | #define CONFIG_IDE_SWAP_IO | |
54 | #endif | |
55 | ||
6d0f6bcf | 56 | #define CONFIG_SYS_IDE_MAXBUS 2 |
6b2eba1b DS |
57 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0 |
58 | #define CONFIG_SYS_ATA_IDE1_OFFSET 0x170 | |
59 | #define CONFIG_SYS_ATA_DATA_OFFSET 0 | |
60 | #define CONFIG_SYS_ATA_REG_OFFSET 0 | |
61 | #define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000 | |
0764c164 | 62 | |
6b2eba1b | 63 | #define CONFIG_SYS_IDE_MAXDEVICE 4 |
0764c164 VL |
64 | |
65 | /* | |
66 | * Miscellaneous configurable options | |
67 | */ | |
6b2eba1b | 68 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
0764c164 | 69 | |
bed8ce83 JCPV |
70 | #define CONFIG_AUTO_COMPLETE |
71 | #define CONFIG_CMDLINE_EDITING | |
bed8ce83 | 72 | |
6b2eba1b DS |
73 | /* Console I/O Buffer Size */ |
74 | #define CONFIG_SYS_CBSIZE 256 | |
75 | /* Print Buffer Size */ | |
76 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) | |
77 | /* max number of command args */ | |
78 | #define CONFIG_SYS_MAXARGS 16 | |
0764c164 | 79 | |
1967228b | 80 | #define CONFIG_SYS_MALLOC_LEN (256 << 10) |
0764c164 | 81 | |
6d0f6bcf | 82 | #define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 |
0764c164 | 83 | |
6d0f6bcf | 84 | #define CONFIG_SYS_MHZ 132 |
0764c164 | 85 | |
6d0f6bcf | 86 | #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) |
a55d4817 | 87 | |
6b2eba1b DS |
88 | /* Cached addr */ |
89 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 | |
0764c164 | 90 | |
6b2eba1b DS |
91 | /* default load address */ |
92 | #define CONFIG_SYS_LOAD_ADDR 0x81000000 | |
0764c164 | 93 | |
6d0f6bcf JCPV |
94 | #define CONFIG_SYS_MEMTEST_START 0x80100000 |
95 | #define CONFIG_SYS_MEMTEST_END 0x80800000 | |
0764c164 VL |
96 | |
97 | /*----------------------------------------------------------------------- | |
98 | * FLASH and environment organization | |
99 | */ | |
0764c164 | 100 | /* The following #defines are needed to get flash environment right */ |
14d0a02a | 101 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
0764c164 | 102 | |
6d0f6bcf | 103 | #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 |
0764c164 VL |
104 | |
105 | /* We boot from this flash, selected with dip switch */ | |
6d0f6bcf JCPV |
106 | #define CONFIG_SYS_FLASH_BASE 0xbfc00000 |
107 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
108 | #define CONFIG_SYS_MAX_FLASH_SECT 128 | |
6b2eba1b DS |
109 | #define CONFIG_SYS_FLASH_CFI |
110 | #define CONFIG_FLASH_CFI_DRIVER | |
111 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE | |
0764c164 | 112 | |
8875e3ab | 113 | /* Address and size of Primary Environment Sector */ |
0e8d1586 | 114 | #define CONFIG_ENV_SIZE 0x8000 |
9828d050 | 115 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE) |
b4aff1ff JCPV |
116 | |
117 | #define CONFIG_ENV_OVERWRITE 1 | |
8875e3ab | 118 | |
8875e3ab | 119 | #define MEM_SIZE 128 |
0764c164 | 120 | |
8875e3ab | 121 | #endif /* __CONFIG_H */ |