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rockchip: Kconfig: move rk3288 config into its Kconfig
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CommitLineData
2444dae5
SG
1if ARCH_ROCKCHIP
2
041cdb5f
HS
3config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
acf15001 5 select CPU_V7A
a381bcf5
KY
6 select SUPPORT_SPL
7 select SPL
451dcf5c
EC
8 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
041cdb5f
HS
10 help
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
15
daeed1db
KY
16config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
acf15001 18 select CPU_V7A
daeed1db
KY
19 help
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
0a2be69f
HS
25config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
acf15001 27 select CPU_V7A
0680f1b1 28 select SPL_BOARD_INIT if SPL
0a2be69f 29 select SUPPORT_SPL
0a2be69f 30 select SPL
4bbb05bc 31 select SPL_CLK
4bbb05bc
PT
32 select SPL_REGMAP
33 select SPL_SYSCON
34 select SPL_RAM
35 select SPL_DRIVERS_MISC_SUPPORT
4d9253fb 36 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
008a610b 37 select BOARD_LATE_INIT
0a2be69f
HS
38 select ROCKCHIP_BROM_HELPER
39 help
40 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
41 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
42 video interfaces, several memory options and video codec support.
43 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
44 UART, SPI, I2C and PWMs.
168eef7a
KY
45
46config ROCKCHIP_RK322X
47 bool "Support Rockchip RK3228/RK3229"
acf15001 48 select CPU_V7A
168eef7a 49 select SUPPORT_SPL
c34643e0 50 select SUPPORT_TPL
168eef7a 51 select SPL
c34643e0
KY
52 select SPL_DM
53 select SPL_OF_LIBFDT
54 select TPL
55 select TPL_DM
56 select TPL_OF_LIBFDT
57 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
58 select TPL_NEEDS_SEPARATE_STACK if TPL
59 select SPL_DRIVERS_MISC_SUPPORT
60 imply SPL_SERIAL_SUPPORT
61 imply TPL_SERIAL_SUPPORT
168eef7a 62 select ROCKCHIP_BROM_HELPER
c34643e0
KY
63 select TPL_LIBCOMMON_SUPPORT
64 select TPL_LIBGENERIC_SUPPORT
168eef7a
KY
65 help
66 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
67 including NEON and GPU, Mali-400 graphics, several DDR3 options
68 and video codec support. Peripherals include Gigabit Ethernet,
69 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
0a2be69f 70
2444dae5
SG
71config ROCKCHIP_RK3288
72 bool "Support Rockchip RK3288"
acf15001 73 select CPU_V7A
0680f1b1 74 select SPL_BOARD_INIT if SPL
a381bcf5
KY
75 select SUPPORT_SPL
76 select SPL
d18ca747
KY
77 select SUPPORT_TPL
78 imply TPL_BOOTROM_SUPPORT
79 imply TPL_CLK
80 imply TPL_DM
81 imply TPL_DRIVERS_MISC_SUPPORT
82 imply TPL_LIBCOMMON_SUPPORT
83 imply TPL_LIBGENERIC_SUPPORT
84 imply TPL_NEEDS_SEPARATE_TEXT_BASE
45290847 85 imply TPL_NEEDS_SEPARATE_STACK
d18ca747
KY
86 imply TPL_OF_CONTROL
87 imply TPL_OF_PLATDATA
88 imply TPL_RAM
89 imply TPL_REGMAP
90 imply TPL_SERIAL_SUPPORT
91 imply TPL_SYSCON
c3d098e7
EC
92 imply USB_FUNCTION_ROCKUSB
93 imply CMD_ROCKUSB
2444dae5
SG
94 help
95 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
96 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
97 video interfaces supporting HDMI and eDP, several DDR3 options
98 and video codec support. Peripherals include Gigabit Ethernet,
ef904bf2 99 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
2444dae5 100
85a3cfb8
KY
101config ROCKCHIP_RK3328
102 bool "Support Rockchip RK3328"
103 select ARM64
c009aeb8
KY
104 select SUPPORT_SPL
105 select SPL
106 imply SPL_SERIAL_SUPPORT
107 imply SPL_SEPARATE_BSS
108 select ENABLE_ARM_SOC_BOOT0_HOOK
109 select DEBUG_UART_BOARD_INIT
110 select SYS_NS16550
85a3cfb8
KY
111 help
112 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
113 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
114 video interfaces supporting HDMI and eDP, several DDR3 options
115 and video codec support. Peripherals include Gigabit Ethernet,
116 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
117
37a0c600
AF
118config ROCKCHIP_RK3368
119 bool "Support Rockchip RK3368"
120 select ARM64
5071457e
PT
121 select SUPPORT_SPL
122 select SUPPORT_TPL
4cf4378e
PT
123 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
124 select TPL_NEEDS_SEPARATE_STACK if TPL
5071457e
PT
125 imply SPL_SEPARATE_BSS
126 imply SPL_SERIAL_SUPPORT
127 imply TPL_SERIAL_SUPPORT
37a0c600 128 help
9a8f009f
PT
129 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
130 into a big and little cluster with 4 cores each) Cortex-A53 including
131 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
132 (for the little cluster), PowerVR G6110 based graphics, one video
133 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
134 video codec support.
135
136 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
137 I2S, UARTs, SPI, I2C and PWMs.
37a0c600 138
d9d1242b
PT
139if ROCKCHIP_RK3368
140
5aa49af3
PT
141config TPL_TEXT_BASE
142 default 0xff8c1000
143
144config TPL_MAX_SIZE
145 default 28672
146
147config TPL_STACK
148 default 0xff8cffff
149
d9d1242b
PT
150endif
151
a381bcf5
KY
152config ROCKCHIP_RK3399
153 bool "Support Rockchip RK3399"
154 select ARM64
66e87cc8 155 select SUPPORT_SPL
6bbf5e1a 156 select SUPPORT_TPL
66e87cc8 157 select SPL
2666bd42
JT
158 select SPL_ATF
159 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
adde32d0 160 select SPL_BOARD_INIT if SPL
2666bd42
JT
161 select SPL_LOAD_FIT
162 select SPL_CLK if SPL
163 select SPL_PINCTRL if SPL
164 select SPL_RAM if SPL
165 select SPL_REGMAP if SPL
166 select SPL_SYSCON if SPL
6bbf5e1a
KY
167 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
168 select TPL_NEEDS_SEPARATE_STACK if TPL
66e87cc8 169 select SPL_SEPARATE_BSS
c0508e42
PT
170 select SPL_SERIAL_SUPPORT
171 select SPL_DRIVERS_MISC_SUPPORT
2666bd42
JT
172 select CLK
173 select FIT
174 select PINCTRL
175 select RAM
176 select REGMAP
177 select SYSCON
178 select DM_PMIC
179 select DM_REGULATOR_FIXED
e3067793 180 select BOARD_LATE_INIT
b4d23f76 181 select ROCKCHIP_BROM_HELPER
6bbf5e1a
KY
182 imply TPL_SERIAL_SUPPORT
183 imply TPL_LIBCOMMON_SUPPORT
184 imply TPL_LIBGENERIC_SUPPORT
185 imply TPL_SYS_MALLOC_SIMPLE
4977cf67 186 imply TPL_BOARD_INIT
6bbf5e1a
KY
187 imply TPL_BOOTROM_SUPPORT
188 imply TPL_DRIVERS_MISC_SUPPORT
189 imply TPL_OF_CONTROL
190 imply TPL_DM
191 imply TPL_REGMAP
192 imply TPL_SYSCON
193 imply TPL_RAM
194 imply TPL_CLK
195 imply TPL_TINY_MEMSET
a381bcf5
KY
196 help
197 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
198 and quad-core Cortex-A53.
199 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
200 video interfaces supporting HDMI and eDP, several DDR3 options
201 and video codec support. Peripherals include Gigabit Ethernet,
202 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
203
6bbf5e1a
KY
204if ROCKCHIP_RK3399
205
206config TPL_LDSCRIPT
207 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
208
209config TPL_TEXT_BASE
210 default 0xff8c2000
211
212config TPL_MAX_SIZE
213 default 188416
214
215config TPL_STACK
216 default 0xff8effff
217
218endif
219
2c1e11dd
AY
220config ROCKCHIP_RV1108
221 bool "Support Rockchip RV1108"
acf15001 222 select CPU_V7A
2c1e11dd
AY
223 help
224 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
225 and a DSP.
226
5b5ca4c0
HS
227config ROCKCHIP_USB_UART
228 bool "Route uart output to usb pins"
229 help
230 Rockchip SoCs have the ability to route the signals of the debug
231 uart through the d+ and d- pins of a specific usb phy to enable
232 some form of closed-case debugging. With this option supported
233 SoCs will enable this routing as a debug measure.
234
ee14d29d 235config SPL_ROCKCHIP_BACK_TO_BROM
b47ea792
XZ
236 bool "SPL returns to bootrom"
237 default y if ROCKCHIP_RK3036
1d845947 238 select ROCKCHIP_BROM_HELPER
ee14d29d
PT
239 depends on SPL
240 help
241 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
242 SPL will return to the boot rom, which will then load the U-Boot
243 binary to keep going on.
244
245config TPL_ROCKCHIP_BACK_TO_BROM
246 bool "TPL returns to bootrom"
6bbf5e1a 247 default y
ee14d29d
PT
248 select ROCKCHIP_BROM_HELPER
249 depends on TPL
b47ea792
XZ
250 help
251 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
252 SPL will return to the boot rom, which will then load the U-Boot
253 binary to keep going on.
254
e3067793
AY
255config ROCKCHIP_BOOT_MODE_REG
256 hex "Rockchip boot mode flag register address"
257 default 0x200081c8 if ROCKCHIP_RK3036
258 default 0x20004040 if ROCKCHIP_RK3188
259 default 0x110005c8 if ROCKCHIP_RK322X
260 default 0xff730094 if ROCKCHIP_RK3288
261 default 0xff738200 if ROCKCHIP_RK3368
262 default 0xff320300 if ROCKCHIP_RK3399
263 default 0x10300580 if ROCKCHIP_RV1108
264 default 0
265 help
15f09a1a 266 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
e3067793
AY
267 according to the value from this register.
268
fa1392a2
KY
269config ROCKCHIP_SPL_RESERVE_IRAM
270 hex "Size of IRAM reserved in SPL"
8a8106f0 271 default 0
fa1392a2
KY
272 help
273 SPL may need reserve memory for firmware loaded by SPL, whose load
274 address is in IRAM and may overlay with SPL text area if not
275 reserved.
276
1d845947
HS
277config ROCKCHIP_BROM_HELPER
278 bool
279
b377d222
PT
280config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
281 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
282 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
283 help
284 Some Rockchip BROM variants (e.g. on the RK3188) load the
285 first stage in segments and enter multiple times. E.g. on
286 the RK3188, the first 1KB of the first stage are loaded
287 first and entered; after returning to the BROM, the
288 remainder of the first stage is loaded, but the BROM
289 re-enters at the same address/to the same code as previously.
290
291 This enables support code in the BOOT0 hook for the SPL stage
292 to allow multiple entries.
293
294config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
295 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
296 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
297 help
298 Some Rockchip BROM variants (e.g. on the RK3188) load the
299 first stage in segments and enter multiple times. E.g. on
300 the RK3188, the first 1KB of the first stage are loaded
301 first and entered; after returning to the BROM, the
302 remainder of the first stage is loaded, but the BROM
303 re-enters at the same address/to the same code as previously.
304
305 This enables support code in the BOOT0 hook for the TPL stage
306 to allow multiple entries.
307
230e0e09 308config SPL_MMC_SUPPORT
ee14d29d 309 default y if !SPL_ROCKCHIP_BACK_TO_BROM
230e0e09 310
be1d5e03 311source "arch/arm/mach-rockchip/rk3036/Kconfig"
daeed1db 312source "arch/arm/mach-rockchip/rk3128/Kconfig"
0a2be69f 313source "arch/arm/mach-rockchip/rk3188/Kconfig"
b24a8ec1 314source "arch/arm/mach-rockchip/rk322x/Kconfig"
041cdb5f 315source "arch/arm/mach-rockchip/rk3288/Kconfig"
85a3cfb8 316source "arch/arm/mach-rockchip/rk3328/Kconfig"
37a0c600 317source "arch/arm/mach-rockchip/rk3368/Kconfig"
a381bcf5 318source "arch/arm/mach-rockchip/rk3399/Kconfig"
2c1e11dd 319source "arch/arm/mach-rockchip/rv1108/Kconfig"
2444dae5 320endif
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