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2e54a1d4 SCL |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
3 | * Copyright (C) 2020 Intel Corporation <www.intel.com> | |
4 | * | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
8 | #include <hang.h> | |
9 | #include <asm/io.h> | |
10 | #include <asm/system.h> | |
11 | #include <asm/arch/misc.h> | |
12 | #include <asm/arch/secure_reg_helper.h> | |
13 | #include <asm/arch/smc_api.h> | |
14 | #include <asm/arch/system_manager.h> | |
15 | #include <linux/errno.h> | |
16 | #include <linux/intel-smc.h> | |
17 | ||
18 | int socfpga_secure_convert_reg_id_to_addr(u32 id, phys_addr_t *reg_addr) | |
19 | { | |
20 | switch (id) { | |
21 | case SOCFPGA_SECURE_REG_SYSMGR_SOC64_SDMMC: | |
22 | *reg_addr = socfpga_get_sysmgr_addr() + SYSMGR_SOC64_SDMMC; | |
23 | break; | |
24 | case SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC0: | |
25 | *reg_addr = socfpga_get_sysmgr_addr() + SYSMGR_SOC64_EMAC0; | |
26 | break; | |
27 | case SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC1: | |
28 | *reg_addr = socfpga_get_sysmgr_addr() + SYSMGR_SOC64_EMAC1; | |
29 | break; | |
30 | case SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC2: | |
31 | *reg_addr = socfpga_get_sysmgr_addr() + SYSMGR_SOC64_EMAC2; | |
32 | break; | |
33 | default: | |
34 | return -EADDRNOTAVAIL; | |
35 | } | |
36 | return 0; | |
37 | } | |
38 | ||
39 | int socfpga_secure_reg_read32(u32 id, u32 *val) | |
40 | { | |
41 | int ret; | |
42 | u64 ret_arg; | |
43 | u64 args[1]; | |
44 | ||
45 | phys_addr_t reg_addr; | |
46 | ret = socfpga_secure_convert_reg_id_to_addr(id, ®_addr); | |
47 | if (ret) | |
48 | return ret; | |
49 | ||
50 | args[0] = (u64)reg_addr; | |
51 | ret = invoke_smc(INTEL_SIP_SMC_REG_READ, args, 1, &ret_arg, 1); | |
52 | if (ret) | |
53 | return ret; | |
54 | ||
55 | *val = (u32)ret_arg; | |
56 | ||
57 | return 0; | |
58 | } | |
59 | ||
60 | int socfpga_secure_reg_write32(u32 id, u32 val) | |
61 | { | |
62 | int ret; | |
63 | u64 args[2]; | |
64 | ||
65 | phys_addr_t reg_addr; | |
66 | ret = socfpga_secure_convert_reg_id_to_addr(id, ®_addr); | |
67 | if (ret) | |
68 | return ret; | |
69 | ||
70 | args[0] = (u64)reg_addr; | |
71 | args[1] = val; | |
72 | return invoke_smc(INTEL_SIP_SMC_REG_WRITE, args, 2, NULL, 0); | |
73 | } | |
74 | ||
75 | int socfpga_secure_reg_update32(u32 id, u32 mask, u32 val) | |
76 | { | |
77 | int ret; | |
78 | u64 args[3]; | |
79 | ||
80 | phys_addr_t reg_addr; | |
81 | ret = socfpga_secure_convert_reg_id_to_addr(id, ®_addr); | |
82 | if (ret) | |
83 | return ret; | |
84 | ||
85 | args[0] = (u64)reg_addr; | |
86 | args[1] = mask; | |
87 | args[2] = val; | |
88 | return invoke_smc(INTEL_SIP_SMC_REG_UPDATE, args, 3, NULL, 0); | |
89 | } |