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83d290c5 1# SPDX-License-Identifier: GPL-2.0+
c609719b 2#
eca3aeb3 3# (C) Copyright 2000 - 2013
c609719b 4# Wolfgang Denk, DENX Software Engineering, [email protected].
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5
6Summary:
7========
8
24ee89b9 9This directory contains the source code for U-Boot, a boot loader for
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10Embedded boards based on PowerPC, ARM, MIPS and several other
11processors, which can be installed in a boot ROM and used to
12initialize and test the hardware or to download and run application
13code.
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14
15The development of U-Boot is closely related to Linux: some parts of
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16the source code originate in the Linux source tree, we have some
17header files in common, and special provision has been made to
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18support booting of Linux images.
19
20Some attention has been paid to make this software easily
21configurable and extendable. For instance, all monitor commands are
22implemented with the same call interface, so that it's very easy to
23add new commands. Also, instead of permanently adding rarely used
24code (for instance hardware test utilities) to the monitor, you can
25load and run it dynamically.
26
27
28Status:
29=======
30
31In general, all boards for which a configuration option exists in the
24ee89b9 32Makefile have been tested to some extent and can be considered
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33"working". In fact, many of them are used in production systems.
34
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35In case of problems see the CHANGELOG file to find out who contributed
36the specific port. In addition, there are various MAINTAINERS files
37scattered throughout the U-Boot source identifying the people or
38companies responsible for various boards and subsystems.
c609719b 39
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40Note: As of August, 2010, there is no longer a CHANGELOG file in the
41actual U-Boot source tree; however, it can be created dynamically
42from the Git log using:
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43
44 make CHANGELOG
45
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46
47Where to get help:
48==================
49
24ee89b9 50In case you have questions about, problems with or contributions for
7207b366 51U-Boot, you should send a message to the U-Boot mailing list at
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52<[email protected]>. There is also an archive of previous traffic
53on the mailing list - please search the archive before asking FAQ's.
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54Please see https://lists.denx.de/pipermail/u-boot and
55https://marc.info/?l=u-boot
c609719b 56
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57Where to get source code:
58=========================
59
7207b366 60The U-Boot source code is maintained in the Git repository at
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61https://source.denx.de/u-boot/u-boot.git ; you can browse it online at
62https://source.denx.de/u-boot/u-boot
218ca724 63
c4bd51e2 64The "Tags" links on this page allow you to download tarballs of
11ccc33f 65any version you might be interested in. Official releases are also
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66available from the DENX file server through HTTPS or FTP.
67https://ftp.denx.de/pub/u-boot/
68ftp://ftp.denx.de/pub/u-boot/
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69
70
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71Where we come from:
72===================
73
74- start from 8xxrom sources
047f6ec0 75- create PPCBoot project (https://sourceforge.net/projects/ppcboot)
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76- clean up code
77- make it easier to add custom boards
78- make it possible to add other [PowerPC] CPUs
79- extend functions, especially:
80 * Provide extended interface to Linux boot loader
81 * S-Record download
82 * network boot
9e5616de 83 * ATA disk / SCSI ... boot
047f6ec0 84- create ARMBoot project (https://sourceforge.net/projects/armboot)
c609719b 85- add other CPU families (starting with ARM)
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86- create U-Boot project (https://sourceforge.net/projects/u-boot)
87- current project page: see https://www.denx.de/wiki/U-Boot
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88
89
90Names and Spelling:
91===================
92
93The "official" name of this project is "Das U-Boot". The spelling
94"U-Boot" shall be used in all written text (documentation, comments
95in source files etc.). Example:
96
97 This is the README file for the U-Boot project.
98
99File names etc. shall be based on the string "u-boot". Examples:
100
101 include/asm-ppc/u-boot.h
102
103 #include <asm/u-boot.h>
104
105Variable names, preprocessor constants etc. shall be either based on
106the string "u_boot" or on "U_BOOT". Example:
107
108 U_BOOT_VERSION u_boot_logo
109 IH_OS_U_BOOT u_boot_hush_start
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110
111
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112Versioning:
113===========
114
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115Starting with the release in October 2008, the names of the releases
116were changed from numerical release numbers without deeper meaning
117into a time stamp based numbering. Regular releases are identified by
118names consisting of the calendar year and month of the release date.
119Additional fields (if present) indicate release candidates or bug fix
120releases in "stable" maintenance trees.
121
122Examples:
c0f40859 123 U-Boot v2009.11 - Release November 2009
360d883a 124 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
0de21ecb 125 U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release
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126
127
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128Directory Hierarchy:
129====================
130
6e73ed00 131/arch Architecture-specific files
6eae68e4 132 /arc Files generic to ARC architecture
8d321b81 133 /arm Files generic to ARM architecture
8d321b81 134 /m68k Files generic to m68k architecture
8d321b81 135 /microblaze Files generic to microblaze architecture
8d321b81 136 /mips Files generic to MIPS architecture
afc1ce82 137 /nds32 Files generic to NDS32 architecture
8d321b81 138 /nios2 Files generic to Altera NIOS2 architecture
a47a12be 139 /powerpc Files generic to PowerPC architecture
3fafced7 140 /riscv Files generic to RISC-V architecture
7207b366 141 /sandbox Files generic to HW-independent "sandbox"
8d321b81 142 /sh Files generic to SH architecture
33c7731b 143 /x86 Files generic to x86 architecture
e4eb313a 144 /xtensa Files generic to Xtensa architecture
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145/api Machine/arch-independent API for external apps
146/board Board-dependent files
19a91f24 147/boot Support for images and booting
740f7e5c 148/cmd U-Boot commands functions
6e73ed00 149/common Misc architecture-independent functions
7207b366 150/configs Board default configuration files
8d321b81 151/disk Code for disk drive partition handling
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152/doc Documentation (a mix of ReST and READMEs)
153/drivers Device drivers
154/dts Makefile for building internal U-Boot fdt.
155/env Environment support
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156/examples Example code for standalone applications, etc.
157/fs Filesystem code (cramfs, ext2, jffs2, etc.)
158/include Header Files
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159/lib Library routines generic to all architectures
160/Licenses Various license files
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161/net Networking code
162/post Power On Self Test
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163/scripts Various build scripts and Makefiles
164/test Various unit test files
6e73ed00 165/tools Tools to build and sign FIT images, etc.
c609719b 166
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167Software Configuration:
168=======================
169
170Configuration is usually done using C preprocessor defines; the
171rationale behind that is to avoid dead code whenever possible.
172
173There are two classes of configuration variables:
174
175* Configuration _OPTIONS_:
176 These are selectable by the user and have names beginning with
177 "CONFIG_".
178
179* Configuration _SETTINGS_:
180 These depend on the hardware etc. and should not be meddled with if
181 you don't know what you're doing; they have names beginning with
6d0f6bcf 182 "CONFIG_SYS_".
c609719b 183
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184Previously, all configuration was done by hand, which involved creating
185symbolic links and editing configuration files manually. More recently,
186U-Boot has added the Kbuild infrastructure used by the Linux kernel,
187allowing you to use the "make menuconfig" command to configure your
188build.
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189
190
191Selection of Processor Architecture and Board Type:
192---------------------------------------------------
193
194For all supported boards there are ready-to-use default
ab584d67 195configurations available; just type "make <board_name>_defconfig".
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196
197Example: For a TQM823L module type:
198
199 cd u-boot
ab584d67 200 make TQM823L_defconfig
c609719b 201
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202Note: If you're looking for the default configuration file for a board
203you're sure used to be there but is now missing, check the file
204doc/README.scrapyard for a list of no longer supported boards.
c609719b 205
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206Sandbox Environment:
207--------------------
208
209U-Boot can be built natively to run on a Linux host using the 'sandbox'
210board. This allows feature development which is not board- or architecture-
211specific to be undertaken on a native platform. The sandbox is also used to
212run some of U-Boot's tests.
213
bbb140ed 214See doc/arch/sandbox.rst for more details.
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215
216
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217Board Initialisation Flow:
218--------------------------
219
220This is the intended start-up flow for boards. This should apply for both
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221SPL and U-Boot proper (i.e. they both follow the same rules).
222
223Note: "SPL" stands for "Secondary Program Loader," which is explained in
224more detail later in this file.
225
226At present, SPL mostly uses a separate code path, but the function names
227and roles of each function are the same. Some boards or architectures
228may not conform to this. At least most ARM boards which use
229CONFIG_SPL_FRAMEWORK conform to this.
230
231Execution typically starts with an architecture-specific (and possibly
232CPU-specific) start.S file, such as:
233
234 - arch/arm/cpu/armv7/start.S
235 - arch/powerpc/cpu/mpc83xx/start.S
236 - arch/mips/cpu/start.S
db910353 237
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238and so on. From there, three functions are called; the purpose and
239limitations of each of these functions are described below.
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240
241lowlevel_init():
242 - purpose: essential init to permit execution to reach board_init_f()
243 - no global_data or BSS
244 - there is no stack (ARMv7 may have one but it will soon be removed)
245 - must not set up SDRAM or use console
246 - must only do the bare minimum to allow execution to continue to
247 board_init_f()
248 - this is almost never needed
249 - return normally from this function
250
251board_init_f():
252 - purpose: set up the machine ready for running board_init_r():
253 i.e. SDRAM and serial UART
254 - global_data is available
255 - stack is in SRAM
256 - BSS is not available, so you cannot use global/static variables,
257 only stack variables and global_data
258
259 Non-SPL-specific notes:
260 - dram_init() is called to set up DRAM. If already done in SPL this
261 can do nothing
262
263 SPL-specific notes:
264 - you can override the entire board_init_f() function with your own
265 version as needed.
266 - preloader_console_init() can be called here in extremis
267 - should set up SDRAM, and anything needed to make the UART work
499696e4 268 - there is no need to clear BSS, it will be done by crt0.S
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269 - for specific scenarios on certain architectures an early BSS *can*
270 be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing
271 of BSS prior to entering board_init_f()) but doing so is discouraged.
272 Instead it is strongly recommended to architect any code changes
273 or additions such to not depend on the availability of BSS during
274 board_init_f() as indicated in other sections of this README to
275 maintain compatibility and consistency across the entire code base.
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276 - must return normally from this function (don't call board_init_r()
277 directly)
278
279Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
280this point the stack and global_data are relocated to below
281CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
282memory.
283
284board_init_r():
285 - purpose: main execution, common code
286 - global_data is available
287 - SDRAM is available
288 - BSS is available, all static/global variables can be used
289 - execution eventually continues to main_loop()
290
291 Non-SPL-specific notes:
292 - U-Boot is relocated to the top of memory and is now running from
293 there.
294
295 SPL-specific notes:
296 - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
297 CONFIG_SPL_STACK_R_ADDR points into SDRAM
298 - preloader_console_init() can be called here - typically this is
0680f1b1 299 done by selecting CONFIG_SPL_BOARD_INIT and then supplying a
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300 spl_board_init() function containing this call
301 - loads U-Boot or (in falcon mode) Linux
302
303
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304Configuration Options:
305----------------------
306
307Configuration depends on the combination of board and CPU type; all
308such information is kept in a configuration file
309"include/configs/<board_name>.h".
310
311Example: For a TQM823L module, all configuration settings are in
312"include/configs/TQM823L.h".
313
314
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315Many of the options are named exactly as the corresponding Linux
316kernel configuration options. The intention is to make it easier to
317build a config tool - later.
318
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319- ARM Platform Bus Type(CCI):
320 CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
321 provides full cache coherency between two clusters of multi-core
322 CPUs and I/O coherency for devices and I/O masters
323
324 CONFIG_SYS_FSL_HAS_CCI400
325
326 Defined For SoC that has cache coherent interconnect
327 CCN-400
7f6c2cbc 328
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329 CONFIG_SYS_FSL_HAS_CCN504
330
331 Defined for SoC that has cache coherent interconnect CCN-504
332
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333The following options need to be configured:
334
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335- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
336
337- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
6ccec449 338
66412c63 339- 85xx CPU Options:
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340 CONFIG_SYS_PPC64
341
342 Specifies that the core is a 64-bit PowerPC implementation (implements
343 the "64" category of the Power ISA). This is necessary for ePAPR
344 compliance, among other possible reasons.
345
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346 CONFIG_SYS_FSL_TBCLK_DIV
347
348 Defines the core time base clock divider ratio compared to the
349 system clock. On most PQ3 devices this is 8, on newer QorIQ
350 devices it can be 16 or 32. The ratio varies from SoC to Soc.
351
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352 CONFIG_SYS_FSL_PCIE_COMPAT
353
354 Defines the string to utilize when trying to match PCIe device
355 tree nodes for the given platform.
356
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357 CONFIG_SYS_FSL_ERRATUM_A004510
358
359 Enables a workaround for erratum A004510. If set,
360 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
361 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
362
363 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
364 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
365
366 Defines one or two SoC revisions (low 8 bits of SVR)
367 for which the A004510 workaround should be applied.
368
369 The rest of SVR is either not relevant to the decision
370 of whether the erratum is present (e.g. p2040 versus
371 p2041) or is implied by the build target, which controls
372 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
373
374 See Freescale App Note 4493 for more information about
375 this erratum.
376
377 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
378
379 This is the value to write into CCSR offset 0x18600
380 according to the A004510 workaround.
381
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382 CONFIG_SYS_FSL_DSP_DDR_ADDR
383 This value denotes start offset of DDR memory which is
384 connected exclusively to the DSP cores.
385
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386 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
387 This value denotes start offset of M2 memory
388 which is directly connected to the DSP core.
389
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390 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
391 This value denotes start offset of M3 memory which is directly
392 connected to the DSP core.
393
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394 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
395 This value denotes start offset of DSP CCSR space.
396
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397 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
398 Single Source Clock is clocking mode present in some of FSL SoC's.
399 In this mode, a single differential clock is used to supply
400 clocks to the sysclock, ddrclock and usbclock.
401
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402 CONFIG_SYS_CPC_REINIT_F
403 This CONFIG is defined when the CPC is configured as SRAM at the
a187559e 404 time of U-Boot entry and is required to be re-initialized.
fb4a2409 405
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406- Generic CPU options:
407 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
408
409 Defines the endianess of the CPU. Implementation of those
410 values is arch specific.
411
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412 CONFIG_SYS_FSL_DDR
413 Freescale DDR driver in use. This type of DDR controller is
1c58857a 414 found in mpc83xx, mpc85xx as well as some ARM core SoCs.
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415
416 CONFIG_SYS_FSL_DDR_ADDR
417 Freescale DDR memory-mapped register base.
418
419 CONFIG_SYS_FSL_DDR_EMU
420 Specify emulator support for DDR. Some DDR features such as
421 deskew training are not available.
422
423 CONFIG_SYS_FSL_DDRC_GEN1
424 Freescale DDR1 controller.
425
426 CONFIG_SYS_FSL_DDRC_GEN2
427 Freescale DDR2 controller.
428
429 CONFIG_SYS_FSL_DDRC_GEN3
430 Freescale DDR3 controller.
431
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432 CONFIG_SYS_FSL_DDRC_GEN4
433 Freescale DDR4 controller.
434
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435 CONFIG_SYS_FSL_DDRC_ARM_GEN3
436 Freescale DDR3 controller for ARM-based SoCs.
437
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438 CONFIG_SYS_FSL_DDR1
439 Board config to use DDR1. It can be enabled for SoCs with
440 Freescale DDR1 or DDR2 controllers, depending on the board
441 implemetation.
442
443 CONFIG_SYS_FSL_DDR2
62a3b7dd 444 Board config to use DDR2. It can be enabled for SoCs with
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445 Freescale DDR2 or DDR3 controllers, depending on the board
446 implementation.
447
448 CONFIG_SYS_FSL_DDR3
449 Board config to use DDR3. It can be enabled for SoCs with
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450 Freescale DDR3 or DDR3L controllers.
451
452 CONFIG_SYS_FSL_DDR3L
453 Board config to use DDR3L. It can be enabled for SoCs with
454 DDR3L controllers.
5614e71b 455
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456 CONFIG_SYS_FSL_IFC_BE
457 Defines the IFC controller register space as Big Endian
458
459 CONFIG_SYS_FSL_IFC_LE
460 Defines the IFC controller register space as Little Endian
461
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462 CONFIG_SYS_FSL_IFC_CLK_DIV
463 Defines divider of platform clock(clock input to IFC controller).
464
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465 CONFIG_SYS_FSL_LBC_CLK_DIV
466 Defines divider of platform clock(clock input to eLBC controller).
467
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468 CONFIG_SYS_FSL_DDR_BE
469 Defines the DDR controller register space as Big Endian
470
471 CONFIG_SYS_FSL_DDR_LE
472 Defines the DDR controller register space as Little Endian
473
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474 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
475 Physical address from the view of DDR controllers. It is the
476 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
477 it could be different for ARM SoCs.
478
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479 CONFIG_SYS_FSL_DDR_INTLV_256B
480 DDR controller interleaving on 256-byte. This is a special
481 interleaving mode, handled by Dickens for Freescale layerscape
482 SoCs with ARM core.
483
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484 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
485 Number of controllers used as main memory.
486
487 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
488 Number of controllers used for other than main memory.
489
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490 CONFIG_SYS_FSL_SEC_BE
491 Defines the SEC controller register space as Big Endian
492
493 CONFIG_SYS_FSL_SEC_LE
494 Defines the SEC controller register space as Little Endian
495
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496- MIPS CPU options:
497 CONFIG_SYS_INIT_SP_OFFSET
498
499 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
500 pointer. This is needed for the temporary stack before
501 relocation.
502
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503 CONFIG_XWAY_SWAP_BYTES
504
505 Enable compilation of tools/xway-swap-bytes needed for Lantiq
506 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
507 be swapped if a flash programmer is used.
508
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509- ARM options:
510 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
511
512 Select high exception vectors of the ARM core, e.g., do not
513 clear the V bit of the c1 register of CP15.
514
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515 COUNTER_FREQUENCY
516 Generic timer clock source frequency.
517
518 COUNTER_FREQUENCY_REAL
519 Generic timer clock source frequency if the real clock is
520 different from COUNTER_FREQUENCY, and can only be determined
521 at run time.
522
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523- Tegra SoC options:
524 CONFIG_TEGRA_SUPPORT_NON_SECURE
525
526 Support executing U-Boot in non-secure (NS) mode. Certain
527 impossible actions will be skipped if the CPU is in NS mode,
528 such as ARM architectural timer initialization.
529
5da627a4 530- Linux Kernel Interface:
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531 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
532
b445bbb4 533 When transferring memsize parameter to Linux, some versions
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534 expect it to be in bytes, others in MB.
535 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
536
fec6d9ee 537 CONFIG_OF_LIBFDT
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538
539 New kernel versions are expecting firmware settings to be
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540 passed using flattened device trees (based on open firmware
541 concepts).
542
543 CONFIG_OF_LIBFDT
544 * New libfdt-based support
545 * Adds the "fdt" command
3bb342fc 546 * The bootm command automatically updates the fdt
213bf8c8 547
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548 OF_TBCLK - The timebase frequency.
549
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550 boards with QUICC Engines require OF_QE to set UCC MAC
551 addresses
3bb342fc 552
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553 CONFIG_OF_IDE_FIXUP
554
555 U-Boot can detect if an IDE device is present or not.
556 If not, and this new config option is activated, U-Boot
557 removes the ATA node from the DTS before booting Linux,
558 so the Linux IDE driver does not probe the device and
559 crash. This is needed for buggy hardware (uc101) where
560 no pull down resistor is connected to the signal IDE5V_DD7.
561
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562- vxWorks boot parameters:
563
564 bootvx constructs a valid bootline using the following
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565 environments variables: bootdev, bootfile, ipaddr, netmask,
566 serverip, gatewayip, hostname, othbootargs.
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567 It loads the vxWorks image pointed bootfile.
568
81a05d9b 569 Note: If a "bootargs" environment is defined, it will override
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570 the defaults discussed just above.
571
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572- Cache Configuration for ARM:
573 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
574 controller
575 CONFIG_SYS_PL310_BASE - Physical base address of PL310
576 controller register space
577
6705d81e 578- Serial Ports:
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579 CONFIG_PL011_CLOCK
580
581 If you have Amba PrimeCell PL011 UARTs, set this variable to
582 the clock speed of the UARTs.
583
584 CONFIG_PL01x_PORTS
585
586 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
587 define this to a list of base addresses for each (supported)
588 port. See e.g. include/configs/versatile.h
589
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590 CONFIG_SERIAL_HW_FLOW_CONTROL
591
592 Define this variable to enable hw flow control in serial driver.
593 Current user of this option is drivers/serial/nsl16550.c driver
6705d81e 594
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595- Serial Download Echo Mode:
596 CONFIG_LOADS_ECHO
597 If defined to 1, all characters received during a
598 serial download (using the "loads" command) are
599 echoed back. This might be needed by some terminal
600 emulations (like "cu"), but may as well just take
601 time on others. This setting #define's the initial
602 value of the "loads_echo" environment variable.
603
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604- Removal of commands
605 If no commands are needed to boot, you can disable
606 CONFIG_CMDLINE to remove them. In this case, the command line
607 will not be available, and when U-Boot wants to execute the
608 boot command (on start-up) it will call board_run_command()
609 instead. This can reduce image size significantly for very
610 simple boot procedures.
611
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612- Regular expression support:
613 CONFIG_REGEX
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614 If this variable is defined, U-Boot is linked against
615 the SLRE (Super Light Regular Expression) library,
616 which adds regex support to some commands, as for
617 example "env grep" and "setexpr".
a5ecbe62 618
c609719b 619- Watchdog:
933ada56
RV
620 CONFIG_SYS_WATCHDOG_FREQ
621 Some platforms automatically call WATCHDOG_RESET()
622 from the timer interrupt handler every
623 CONFIG_SYS_WATCHDOG_FREQ interrupts. If not set by the
624 board configuration file, a default of CONFIG_SYS_HZ/2
625 (i.e. 500) is used. Setting CONFIG_SYS_WATCHDOG_FREQ
626 to 0 disables calling WATCHDOG_RESET() from the timer
627 interrupt.
628
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629- Real-Time Clock:
630
602ad3b3 631 When CONFIG_CMD_DATE is selected, the type of the RTC
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632 has to be selected, too. Define exactly one of the
633 following options:
634
c609719b 635 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
4e8b7544 636 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
c609719b 637 CONFIG_RTC_MC146818 - use MC146818 RTC
1cb8e980 638 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
c609719b 639 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
7f70e853 640 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
412921d2 641 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
3bac3513 642 CONFIG_RTC_DS164x - use Dallas DS164x RTC
9536dfcc 643 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
4c0d4c3b 644 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
2bd3cab3 645 CONFIG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
71d19f30
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646 CONFIG_SYS_RV3029_TCR - enable trickle charger on
647 RV3029 RTC.
c609719b 648
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649 Note that if the RTC uses I2C, then the I2C interface
650 must also be configured. See I2C Support, below.
651
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652- GPIO Support:
653 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
e92739d3 654
5dec49ca
CP
655 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
656 chip-ngpio pairs that tell the PCA953X driver the number of
657 pins supported by a particular chip.
658
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659 Note that if the GPIO device uses I2C, then the I2C interface
660 must also be configured. See I2C Support, below.
661
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SG
662- I/O tracing:
663 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
664 accesses and can checksum them or write a list of them out
665 to memory. See the 'iotrace' command for details. This is
666 useful for testing device drivers since it can confirm that
667 the driver behaves the same way before and after a code
668 change. Currently this is supported on sandbox and arm. To
669 add support for your architecture, add '#include <iotrace.h>'
670 to the bottom of arch/<arch>/include/asm/io.h and test.
671
672 Example output from the 'iotrace stats' command is below.
673 Note that if the trace buffer is exhausted, the checksum will
674 still continue to operate.
675
676 iotrace is enabled
677 Start: 10000000 (buffer start address)
678 Size: 00010000 (buffer size)
679 Offset: 00000120 (current buffer offset)
680 Output: 10000120 (start + offset)
681 Count: 00000018 (number of trace records)
682 CRC32: 9526fb66 (CRC32 of all trace records)
683
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684- Timestamp Support:
685
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686 When CONFIG_TIMESTAMP is selected, the timestamp
687 (date and time) of an image is printed by image
688 commands like bootm or iminfo. This option is
602ad3b3 689 automatically enabled when you select CONFIG_CMD_DATE .
c609719b 690
923c46f9
KP
691- Partition Labels (disklabels) Supported:
692 Zero or more of the following:
693 CONFIG_MAC_PARTITION Apple's MacOS partition table.
923c46f9
KP
694 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
695 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
696 bootloader. Note 2TB partition limit; see
697 disk/part_efi.c
c649e3c9 698 CONFIG_SCSI) you must configure support for at
923c46f9 699 least one non-MTD partition type as well.
c609719b 700
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701- LBA48 Support
702 CONFIG_LBA48
703
704 Set this to enable support for disks larger than 137GB
4b142feb 705 Also look at CONFIG_SYS_64BIT_LBA.
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706 Whithout these , LBA48 support uses 32bit variables and will 'only'
707 support disks up to 2.1TB.
708
6d0f6bcf 709 CONFIG_SYS_64BIT_LBA:
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710 When enabled, makes the IDE subsystem use 64bit sector addresses.
711 Default is 32bit.
712
c609719b 713- NETWORK Support (PCI):
ce5207e1
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714 CONFIG_E1000_SPI
715 Utility code for direct access to the SPI bus on Intel 8257x.
716 This does not do anything useful unless you set at least one
717 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
718
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719 CONFIG_NATSEMI
720 Support for National dp83815 chips.
721
722 CONFIG_NS8382X
723 Support for National dp8382[01] gigabit chips.
724
45219c46 725- NETWORK Support (other):
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726 CONFIG_CALXEDA_XGMAC
727 Support for the Calxeda XGMAC device
728
3bb46d23 729 CONFIG_LAN91C96
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730 Support for SMSC's LAN91C96 chips.
731
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732 CONFIG_LAN91C96_USE_32_BIT
733 Define this to enable 32 bit addressing
734
3bb46d23 735 CONFIG_SMC91111
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736 Support for SMSC's LAN91C111 chip
737
738 CONFIG_SMC91111_BASE
739 Define this to hold the physical address
740 of the device (I/O space)
741
742 CONFIG_SMC_USE_32_BIT
743 Define this if data bus is 32 bits
744
745 CONFIG_SMC_USE_IOFUNCS
746 Define this to use i/o functions instead of macros
747 (some hardware wont work with macros)
748
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HS
749 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
750 Define this if you have more then 3 PHYs.
751
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ML
752 CONFIG_FTGMAC100
753 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
754
755 CONFIG_FTGMAC100_EGIGA
756 Define this to use GE link update with gigabit PHY.
757 Define this if FTGMAC100 is connected to gigabit PHY.
758 If your system has 10/100 PHY only, it might not occur
759 wrong behavior. Because PHY usually return timeout or
760 useless data when polling gigabit status and gigabit
761 control registers. This behavior won't affect the
762 correctnessof 10/100 link speed update.
763
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764 CONFIG_SH_ETHER
765 Support for Renesas on-chip Ethernet controller
766
767 CONFIG_SH_ETHER_USE_PORT
768 Define the number of ports to be used
769
770 CONFIG_SH_ETHER_PHY_ADDR
771 Define the ETH PHY's address
772
68260aab
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773 CONFIG_SH_ETHER_CACHE_WRITEBACK
774 If this option is set, the driver enables cache flush.
775
5e124724 776- TPM Support:
90899cc0
CC
777 CONFIG_TPM
778 Support TPM devices.
779
0766ad2f
CR
780 CONFIG_TPM_TIS_INFINEON
781 Support for Infineon i2c bus TPM devices. Only one device
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TWHT
782 per system is supported at this time.
783
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TWHT
784 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
785 Define the burst count bytes upper limit
786
3aa74088
CR
787 CONFIG_TPM_ST33ZP24
788 Support for STMicroelectronics TPM devices. Requires DM_TPM support.
789
790 CONFIG_TPM_ST33ZP24_I2C
791 Support for STMicroelectronics ST33ZP24 I2C devices.
792 Requires TPM_ST33ZP24 and I2C.
793
b75fdc11
CR
794 CONFIG_TPM_ST33ZP24_SPI
795 Support for STMicroelectronics ST33ZP24 SPI devices.
796 Requires TPM_ST33ZP24 and SPI.
797
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DE
798 CONFIG_TPM_ATMEL_TWI
799 Support for Atmel TWI TPM device. Requires I2C support.
800
90899cc0 801 CONFIG_TPM_TIS_LPC
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VB
802 Support for generic parallel port TPM devices. Only one device
803 per system is supported at this time.
804
805 CONFIG_TPM_TIS_BASE_ADDRESS
806 Base address where the generic TPM device is mapped
807 to. Contemporary x86 systems usually map it at
808 0xfed40000.
809
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RP
810 CONFIG_TPM
811 Define this to enable the TPM support library which provides
812 functional interfaces to some TPM commands.
813 Requires support for a TPM device.
814
815 CONFIG_TPM_AUTH_SESSIONS
816 Define this to enable authorized functions in the TPM library.
817 Requires CONFIG_TPM and CONFIG_SHA1.
818
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819- USB Support:
820 At the moment only the UHCI host controller is
064b55cf 821 supported (PIP405, MIP405); define
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822 CONFIG_USB_UHCI to enable it.
823 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
30d56fae 824 and define CONFIG_USB_STORAGE to enable the USB
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WD
825 storage devices.
826 Note:
827 Supported are USB Keyboards and USB Floppy drives
828 (TEAC FD-05PUB).
4d13cbad 829
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SG
830 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
831 txfilltuning field in the EHCI controller on reset.
832
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OT
833 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
834 HW module registers.
835
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836- USB Device:
837 Define the below if you wish to use the USB console.
838 Once firmware is rebuilt from a serial console issue the
839 command "setenv stdin usbtty; setenv stdout usbtty" and
11ccc33f 840 attach your USB cable. The Unix command "dmesg" should print
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WD
841 it has found a new device. The environment variable usbtty
842 can be set to gserial or cdc_acm to enable your device to
386eda02 843 appear to a USB host as a Linux gserial device or a
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WD
844 Common Device Class Abstract Control Model serial device.
845 If you select usbtty = gserial you should be able to enumerate
846 a Linux host by
847 # modprobe usbserial vendor=0xVendorID product=0xProductID
848 else if using cdc_acm, simply setting the environment
849 variable usbtty to be cdc_acm should suffice. The following
850 might be defined in YourBoardName.h
386eda02 851
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WD
852 CONFIG_USB_DEVICE
853 Define this to build a UDC device
854
855 CONFIG_USB_TTY
856 Define this to have a tty type of device available to
857 talk to the UDC device
386eda02 858
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VK
859 CONFIG_USBD_HS
860 Define this to enable the high speed support for usb
861 device and usbtty. If this feature is enabled, a routine
862 int is_usbd_high_speed(void)
863 also needs to be defined by the driver to dynamically poll
864 whether the enumeration has succeded at high speed or full
865 speed.
866
386eda02 867 If you have a USB-IF assigned VendorID then you may wish to
16c8d5e7 868 define your own vendor specific values either in BoardName.h
386eda02 869 or directly in usbd_vendor_info.h. If you don't define
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870 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
871 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
872 should pretend to be a Linux device to it's target host.
873
874 CONFIG_USBD_MANUFACTURER
875 Define this string as the name of your company for
876 - CONFIG_USBD_MANUFACTURER "my company"
386eda02 877
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WD
878 CONFIG_USBD_PRODUCT_NAME
879 Define this string as the name of your product
880 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
881
882 CONFIG_USBD_VENDORID
883 Define this as your assigned Vendor ID from the USB
884 Implementors Forum. This *must* be a genuine Vendor ID
885 to avoid polluting the USB namespace.
886 - CONFIG_USBD_VENDORID 0xFFFF
386eda02 887
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WD
888 CONFIG_USBD_PRODUCTID
889 Define this as the unique Product ID
890 for your device
891 - CONFIG_USBD_PRODUCTID 0xFFFF
4d13cbad 892
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IG
893- ULPI Layer Support:
894 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
895 the generic ULPI layer. The generic layer accesses the ULPI PHY
896 via the platform viewport, so you need both the genric layer and
897 the viewport enabled. Currently only Chipidea/ARC based
898 viewport is supported.
899 To enable the ULPI layer support, define CONFIG_USB_ULPI and
900 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
6d365ea0
LS
901 If your ULPI phy needs a different reference clock than the
902 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
903 the appropriate value in Hz.
c609719b 904
71f95118 905- MMC Support:
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WD
906 The MMC controller on the Intel PXA is supported. To
907 enable this define CONFIG_MMC. The MMC can be
908 accessed from the boot prompt by mapping the device
71f95118 909 to physical memory similar to flash. Command line is
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JL
910 enabled with CONFIG_CMD_MMC. The MMC driver also works with
911 the FAT fs. This is enabled with CONFIG_CMD_FAT.
71f95118 912
afb35666
YS
913 CONFIG_SH_MMCIF
914 Support for Renesas on-chip MMCIF controller
915
916 CONFIG_SH_MMCIF_ADDR
917 Define the base address of MMCIF registers
918
919 CONFIG_SH_MMCIF_CLK
920 Define the clock frequency for MMCIF
921
b3ba6e94 922- USB Device Firmware Update (DFU) class support:
bb4059a5 923 CONFIG_DFU_OVER_USB
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924 This enables the USB portion of the DFU USB class
925
c6631764
PA
926 CONFIG_DFU_NAND
927 This enables support for exposing NAND devices via DFU.
928
a9479f04
AM
929 CONFIG_DFU_RAM
930 This enables support for exposing RAM via DFU.
931 Note: DFU spec refer to non-volatile memory usage, but
932 allow usages beyond the scope of spec - here RAM usage,
933 one that would help mostly the developer.
934
e7e75c70
HS
935 CONFIG_SYS_DFU_DATA_BUF_SIZE
936 Dfu transfer uses a buffer before writing data to the
937 raw storage device. Make the size (in bytes) of this buffer
938 configurable. The size of this buffer is also configurable
939 through the "dfu_bufsiz" environment variable.
940
ea2453d5
PA
941 CONFIG_SYS_DFU_MAX_FILE_SIZE
942 When updating files rather than the raw storage device,
943 we use a static buffer to copy the file into and then write
944 the buffer once we've been given the whole file. Define
945 this to the maximum filesize (in bytes) for the buffer.
946 Default is 4 MiB if undefined.
947
001a8319
HS
948 DFU_DEFAULT_POLL_TIMEOUT
949 Poll timeout [ms], is the timeout a device can send to the
950 host. The host must wait for this timeout before sending
951 a subsequent DFU_GET_STATUS request to the device.
952
953 DFU_MANIFEST_POLL_TIMEOUT
954 Poll timeout [ms], which the device sends to the host when
955 entering dfuMANIFEST state. Host waits this timeout, before
956 sending again an USB request to the device.
957
6705d81e 958- Journaling Flash filesystem support:
6d0f6bcf
JCPV
959 CONFIG_SYS_JFFS2_FIRST_SECTOR,
960 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
6705d81e
WD
961 Define these for a default partition on a NOR device
962
c609719b 963- Keyboard Support:
39f615ed
SG
964 See Kconfig help for available keyboard drivers.
965
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WD
966- LCD Support: CONFIG_LCD
967
968 Define this to enable LCD support (for output to LCD
969 display); also select one of the supported displays
970 by defining one of these:
971
fd3103bb 972 CONFIG_NEC_NL6448AC33:
c609719b 973
fd3103bb 974 NEC NL6448AC33-18. Active, color, single scan.
c609719b 975
fd3103bb 976 CONFIG_NEC_NL6448BC20
c609719b 977
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WD
978 NEC NL6448BC20-08. 6.5", 640x480.
979 Active, color, single scan.
980
981 CONFIG_NEC_NL6448BC33_54
982
983 NEC NL6448BC33-54. 10.4", 640x480.
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WD
984 Active, color, single scan.
985
986 CONFIG_SHARP_16x9
987
988 Sharp 320x240. Active, color, single scan.
989 It isn't 16x9, and I am not sure what it is.
990
991 CONFIG_SHARP_LQ64D341
992
993 Sharp LQ64D341 display, 640x480.
994 Active, color, single scan.
995
996 CONFIG_HLD1045
997
998 HLD1045 display, 640x480.
999 Active, color, single scan.
1000
1001 CONFIG_OPTREX_BW
1002
1003 Optrex CBL50840-2 NF-FW 99 22 M5
1004 or
1005 Hitachi LMG6912RPFC-00T
1006 or
1007 Hitachi SP14Q002
1008
1009 320x240. Black & white.
1010
676d319e
SG
1011 CONFIG_LCD_ALIGNMENT
1012
b445bbb4 1013 Normally the LCD is page-aligned (typically 4KB). If this is
676d319e
SG
1014 defined then the LCD will be aligned to this value instead.
1015 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1016 here, since it is cheaper to change data cache settings on
1017 a per-section basis.
1018
1019
604c7d4a
HP
1020 CONFIG_LCD_ROTATION
1021
1022 Sometimes, for example if the display is mounted in portrait
1023 mode or even if it's mounted landscape but rotated by 180degree,
1024 we need to rotate our content of the display relative to the
1025 framebuffer, so that user can read the messages which are
1026 printed out.
1027 Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
1028 initialized with a given rotation from "vl_rot" out of
1029 "vidinfo_t" which is provided by the board specific code.
1030 The value for vl_rot is coded as following (matching to
1031 fbcon=rotate:<n> linux-kernel commandline):
1032 0 = no rotation respectively 0 degree
1033 1 = 90 degree rotation
1034 2 = 180 degree rotation
1035 3 = 270 degree rotation
1036
1037 If CONFIG_LCD_ROTATION is not defined, the console will be
1038 initialized with 0degree rotation.
1039
17ea1177 1040- MII/PHY support:
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WD
1041 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1042
1043 The clock frequency of the MII bus
1044
17ea1177
WD
1045 CONFIG_PHY_CMD_DELAY (ppc4xx)
1046
1047 Some PHY like Intel LXT971A need extra delay after
1048 command issued before MII status register can be read
1049
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WD
1050- IP address:
1051 CONFIG_IPADDR
1052
1053 Define a default value for the IP address to use for
11ccc33f 1054 the default Ethernet interface, in case this is not
c609719b 1055 determined through e.g. bootp.
1ebcd654 1056 (Environment variable "ipaddr")
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WD
1057
1058- Server IP address:
1059 CONFIG_SERVERIP
1060
11ccc33f 1061 Defines a default value for the IP address of a TFTP
c609719b 1062 server to contact when using the "tftboot" command.
1ebcd654 1063 (Environment variable "serverip")
c609719b 1064
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WD
1065- Gateway IP address:
1066 CONFIG_GATEWAYIP
1067
1068 Defines a default value for the IP address of the
1069 default router where packets to other networks are
1070 sent to.
1071 (Environment variable "gatewayip")
1072
1073- Subnet mask:
1074 CONFIG_NETMASK
1075
1076 Defines a default value for the subnet mask (or
1077 routing prefix) which is used to determine if an IP
1078 address belongs to the local subnet or needs to be
1079 forwarded through a router.
1080 (Environment variable "netmask")
1081
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1082- BOOTP Recovery Mode:
1083 CONFIG_BOOTP_RANDOM_DELAY
1084
1085 If you have many targets in a network that try to
1086 boot using BOOTP, you may want to avoid that all
1087 systems send out BOOTP requests at precisely the same
1088 moment (which would happen for instance at recovery
1089 from a power failure, when all systems will try to
1090 boot, thus flooding the BOOTP server. Defining
1091 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1092 inserted before sending out BOOTP requests. The
6c33c785 1093 following delays are inserted then:
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WD
1094
1095 1st BOOTP request: delay 0 ... 1 sec
1096 2nd BOOTP request: delay 0 ... 2 sec
1097 3rd BOOTP request: delay 0 ... 4 sec
1098 4th and following
1099 BOOTP requests: delay 0 ... 8 sec
1100
92ac8acc
TR
1101 CONFIG_BOOTP_ID_CACHE_SIZE
1102
1103 BOOTP packets are uniquely identified using a 32-bit ID. The
1104 server will copy the ID from client requests to responses and
1105 U-Boot will use this to determine if it is the destination of
1106 an incoming response. Some servers will check that addresses
1107 aren't in use before handing them out (usually using an ARP
1108 ping) and therefore take up to a few hundred milliseconds to
1109 respond. Network congestion may also influence the time it
1110 takes for a response to make it back to the client. If that
1111 time is too long, U-Boot will retransmit requests. In order
1112 to allow earlier responses to still be accepted after these
1113 retransmissions, U-Boot's BOOTP client keeps a small cache of
1114 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
1115 cache. The default is to keep IDs for up to four outstanding
1116 requests. Increasing this will allow U-Boot to accept offers
1117 from a BOOTP client in networks with unusually high latency.
1118
fe389a82 1119- DHCP Advanced Options:
2c00e099 1120
d22c338e
JH
1121 - Link-local IP address negotiation:
1122 Negotiate with other link-local clients on the local network
1123 for an address that doesn't require explicit configuration.
1124 This is especially useful if a DHCP server cannot be guaranteed
1125 to exist in all environments that the device must operate.
1126
1127 See doc/README.link-local for more information.
1128
24acb83d
PK
1129 - MAC address from environment variables
1130
1131 FDT_SEQ_MACADDR_FROM_ENV
1132
1133 Fix-up device tree with MAC addresses fetched sequentially from
1134 environment variables. This config work on assumption that
1135 non-usable ethernet node of device-tree are either not present
1136 or their status has been marked as "disabled".
1137
a3d991bd 1138 - CDP Options:
6e592385 1139 CONFIG_CDP_DEVICE_ID
a3d991bd
WD
1140
1141 The device id used in CDP trigger frames.
1142
1143 CONFIG_CDP_DEVICE_ID_PREFIX
1144
1145 A two character string which is prefixed to the MAC address
1146 of the device.
1147
1148 CONFIG_CDP_PORT_ID
1149
1150 A printf format string which contains the ascii name of
1151 the port. Normally is set to "eth%d" which sets
11ccc33f 1152 eth0 for the first Ethernet, eth1 for the second etc.
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WD
1153
1154 CONFIG_CDP_CAPABILITIES
1155
1156 A 32bit integer which indicates the device capabilities;
1157 0x00000010 for a normal host which does not forwards.
1158
1159 CONFIG_CDP_VERSION
1160
1161 An ascii string containing the version of the software.
1162
1163 CONFIG_CDP_PLATFORM
1164
1165 An ascii string containing the name of the platform.
1166
1167 CONFIG_CDP_TRIGGER
1168
1169 A 32bit integer sent on the trigger.
1170
1171 CONFIG_CDP_POWER_CONSUMPTION
1172
1173 A 16bit integer containing the power consumption of the
1174 device in .1 of milliwatts.
1175
1176 CONFIG_CDP_APPLIANCE_VLAN_TYPE
1177
1178 A byte containing the id of the VLAN.
1179
79267edd 1180- Status LED: CONFIG_LED_STATUS
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WD
1181
1182 Several configurations allow to display the current
1183 status using a LED. For instance, the LED will blink
1184 fast while running U-Boot code, stop blinking as
1185 soon as a reply to a BOOTP request was received, and
1186 start blinking slow once the Linux kernel is running
1187 (supported by a status LED driver in the Linux
79267edd 1188 kernel). Defining CONFIG_LED_STATUS enables this
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WD
1189 feature in U-Boot.
1190
1df7bbba
IG
1191 Additional options:
1192
79267edd 1193 CONFIG_LED_STATUS_GPIO
1df7bbba
IG
1194 The status LED can be connected to a GPIO pin.
1195 In such cases, the gpio_led driver can be used as a
79267edd 1196 status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
1df7bbba
IG
1197 to include the gpio_led driver in the U-Boot binary.
1198
9dfdcdfe
IG
1199 CONFIG_GPIO_LED_INVERTED_TABLE
1200 Some GPIO connected LEDs may have inverted polarity in which
1201 case the GPIO high value corresponds to LED off state and
1202 GPIO low value corresponds to LED on state.
1203 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
1204 with a list of GPIO LEDs that have inverted polarity.
1205
55dabcc8 1206- I2C Support:
3f4978c7 1207 CONFIG_SYS_NUM_I2C_BUSES
945a18e6 1208 Hold the number of i2c buses you want to use.
3f4978c7
HS
1209
1210 CONFIG_SYS_I2C_DIRECT_BUS
1211 define this, if you don't use i2c muxes on your hardware.
1212 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
1213 omit this define.
1214
1215 CONFIG_SYS_I2C_MAX_HOPS
1216 define how many muxes are maximal consecutively connected
1217 on one i2c bus. If you not use i2c muxes, omit this
1218 define.
1219
1220 CONFIG_SYS_I2C_BUSES
b445bbb4 1221 hold a list of buses you want to use, only used if
3f4978c7
HS
1222 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
1223 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
1224 CONFIG_SYS_NUM_I2C_BUSES = 9:
1225
1226 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
1227 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
1228 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
1229 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
1230 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
1231 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
1232 {1, {I2C_NULL_HOP}}, \
1233 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
1234 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
1235 }
1236
1237 which defines
1238 bus 0 on adapter 0 without a mux
ea818dbb
HS
1239 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
1240 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
1241 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
1242 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
1243 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
3f4978c7 1244 bus 6 on adapter 1 without a mux
ea818dbb
HS
1245 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
1246 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
3f4978c7
HS
1247
1248 If you do not have i2c muxes on your board, omit this define.
1249
ce3b5d69 1250- Legacy I2C Support:
ea818dbb 1251 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
b37c7e5e
WD
1252 then the following macros need to be defined (examples are
1253 from include/configs/lwmon.h):
c609719b
WD
1254
1255 I2C_INIT
1256
b37c7e5e 1257 (Optional). Any commands necessary to enable the I2C
43d9616c 1258 controller or configure ports.
c609719b 1259
ba56f625 1260 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
b37c7e5e 1261
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WD
1262 I2C_ACTIVE
1263
1264 The code necessary to make the I2C data line active
1265 (driven). If the data line is open collector, this
1266 define can be null.
1267
b37c7e5e
WD
1268 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
1269
c609719b
WD
1270 I2C_TRISTATE
1271
1272 The code necessary to make the I2C data line tri-stated
1273 (inactive). If the data line is open collector, this
1274 define can be null.
1275
b37c7e5e
WD
1276 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
1277
c609719b
WD
1278 I2C_READ
1279
472d5460
YS
1280 Code that returns true if the I2C data line is high,
1281 false if it is low.
c609719b 1282
b37c7e5e
WD
1283 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
1284
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WD
1285 I2C_SDA(bit)
1286
472d5460
YS
1287 If <bit> is true, sets the I2C data line high. If it
1288 is false, it clears it (low).
c609719b 1289
b37c7e5e 1290 eg: #define I2C_SDA(bit) \
2535d602 1291 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
ba56f625 1292 else immr->im_cpm.cp_pbdat &= ~PB_SDA
b37c7e5e 1293
c609719b
WD
1294 I2C_SCL(bit)
1295
472d5460
YS
1296 If <bit> is true, sets the I2C clock line high. If it
1297 is false, it clears it (low).
c609719b 1298
b37c7e5e 1299 eg: #define I2C_SCL(bit) \
2535d602 1300 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
ba56f625 1301 else immr->im_cpm.cp_pbdat &= ~PB_SCL
b37c7e5e 1302
c609719b
WD
1303 I2C_DELAY
1304
1305 This delay is invoked four times per clock cycle so this
1306 controls the rate of data transfer. The data rate thus
b37c7e5e 1307 is 1 / (I2C_DELAY * 4). Often defined to be something
945af8d7
WD
1308 like:
1309
b37c7e5e 1310 #define I2C_DELAY udelay(2)
c609719b 1311
793b5726
MF
1312 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
1313
1314 If your arch supports the generic GPIO framework (asm/gpio.h),
1315 then you may alternatively define the two GPIOs that are to be
1316 used as SCL / SDA. Any of the previous I2C_xxx macros will
1317 have GPIO-based defaults assigned to them as appropriate.
1318
1319 You should define these to the GPIO value as given directly to
1320 the generic GPIO functions.
1321
6d0f6bcf 1322 CONFIG_SYS_I2C_INIT_BOARD
47cd00fa 1323
8bde7f77
WD
1324 When a board is reset during an i2c bus transfer
1325 chips might think that the current transfer is still
1326 in progress. On some boards it is possible to access
1327 the i2c SCLK line directly, either by using the
1328 processor pin as a GPIO or by having a second pin
1329 connected to the bus. If this option is defined a
1330 custom i2c_init_board() routine in boards/xxx/board.c
1331 is run early in the boot sequence.
47cd00fa 1332
bb99ad6d
BW
1333 CONFIG_I2C_MULTI_BUS
1334
1335 This option allows the use of multiple I2C buses, each of which
c0f40859
WD
1336 must have a controller. At any point in time, only one bus is
1337 active. To switch to a different bus, use the 'i2c dev' command.
bb99ad6d
BW
1338 Note that bus numbering is zero-based.
1339
6d0f6bcf 1340 CONFIG_SYS_I2C_NOPROBES
bb99ad6d
BW
1341
1342 This option specifies a list of I2C devices that will be skipped
c0f40859 1343 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
0f89c54b
PT
1344 is set, specify a list of bus-device pairs. Otherwise, specify
1345 a 1D array of device addresses
bb99ad6d
BW
1346
1347 e.g.
1348 #undef CONFIG_I2C_MULTI_BUS
c0f40859 1349 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
bb99ad6d
BW
1350
1351 will skip addresses 0x50 and 0x68 on a board with one I2C bus
1352
c0f40859 1353 #define CONFIG_I2C_MULTI_BUS
945a18e6 1354 #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
bb99ad6d
BW
1355
1356 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
1357
6d0f6bcf 1358 CONFIG_SYS_SPD_BUS_NUM
be5e6181
TT
1359
1360 If defined, then this indicates the I2C bus number for DDR SPD.
1361 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
1362
6d0f6bcf 1363 CONFIG_SYS_RTC_BUS_NUM
0dc018ec
SR
1364
1365 If defined, then this indicates the I2C bus number for the RTC.
1366 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
1367
2ac6985a
AD
1368 CONFIG_SOFT_I2C_READ_REPEATED_START
1369
1370 defining this will force the i2c_read() function in
1371 the soft_i2c driver to perform an I2C repeated start
1372 between writing the address pointer and reading the
1373 data. If this define is omitted the default behaviour
1374 of doing a stop-start sequence will be used. Most I2C
1375 devices can use either method, but some require one or
1376 the other.
be5e6181 1377
c609719b
WD
1378- SPI Support: CONFIG_SPI
1379
1380 Enables SPI driver (so far only tested with
1381 SPI EEPROM, also an instance works with Crystal A/D and
1382 D/As on the SACSng board)
1383
f659b573
HS
1384 CONFIG_SYS_SPI_MXC_WAIT
1385 Timeout for waiting until spi transfer completed.
1386 default: (CONFIG_SYS_HZ/100) /* 10 ms */
1387
0133502e 1388- FPGA Support: CONFIG_FPGA
c609719b 1389
0133502e
MF
1390 Enables FPGA subsystem.
1391
1392 CONFIG_FPGA_<vendor>
1393
1394 Enables support for specific chip vendors.
1395 (ALTERA, XILINX)
c609719b 1396
0133502e 1397 CONFIG_FPGA_<family>
c609719b 1398
0133502e
MF
1399 Enables support for FPGA family.
1400 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
1401
1402 CONFIG_FPGA_COUNT
1403
1404 Specify the number of FPGA devices to support.
c609719b 1405
6d0f6bcf 1406 CONFIG_SYS_FPGA_PROG_FEEDBACK
c609719b 1407
8bde7f77 1408 Enable printing of hash marks during FPGA configuration.
c609719b 1409
6d0f6bcf 1410 CONFIG_SYS_FPGA_CHECK_BUSY
c609719b 1411
43d9616c
WD
1412 Enable checks on FPGA configuration interface busy
1413 status by the configuration function. This option
1414 will require a board or device specific function to
1415 be written.
c609719b
WD
1416
1417 CONFIG_FPGA_DELAY
1418
1419 If defined, a function that provides delays in the FPGA
1420 configuration driver.
1421
6d0f6bcf 1422 CONFIG_SYS_FPGA_CHECK_CTRLC
c609719b
WD
1423 Allow Control-C to interrupt FPGA configuration
1424
6d0f6bcf 1425 CONFIG_SYS_FPGA_CHECK_ERROR
c609719b 1426
43d9616c
WD
1427 Check for configuration errors during FPGA bitfile
1428 loading. For example, abort during Virtex II
1429 configuration if the INIT_B line goes low (which
1430 indicated a CRC error).
c609719b 1431
6d0f6bcf 1432 CONFIG_SYS_FPGA_WAIT_INIT
c609719b 1433
b445bbb4
JM
1434 Maximum time to wait for the INIT_B line to de-assert
1435 after PROB_B has been de-asserted during a Virtex II
43d9616c 1436 FPGA configuration sequence. The default time is 500
11ccc33f 1437 ms.
c609719b 1438
6d0f6bcf 1439 CONFIG_SYS_FPGA_WAIT_BUSY
c609719b 1440
b445bbb4 1441 Maximum time to wait for BUSY to de-assert during
11ccc33f 1442 Virtex II FPGA configuration. The default is 5 ms.
c609719b 1443
6d0f6bcf 1444 CONFIG_SYS_FPGA_WAIT_CONFIG
c609719b 1445
43d9616c 1446 Time to wait after FPGA configuration. The default is
11ccc33f 1447 200 ms.
c609719b 1448
c609719b
WD
1449- Vendor Parameter Protection:
1450
43d9616c
WD
1451 U-Boot considers the values of the environment
1452 variables "serial#" (Board Serial Number) and
7152b1d0 1453 "ethaddr" (Ethernet Address) to be parameters that
43d9616c
WD
1454 are set once by the board vendor / manufacturer, and
1455 protects these variables from casual modification by
1456 the user. Once set, these variables are read-only,
1457 and write or delete attempts are rejected. You can
11ccc33f 1458 change this behaviour:
c609719b
WD
1459
1460 If CONFIG_ENV_OVERWRITE is #defined in your config
1461 file, the write protection for vendor parameters is
47cd00fa 1462 completely disabled. Anybody can change or delete
c609719b
WD
1463 these parameters.
1464
92ac5208
JH
1465 Alternatively, if you define _both_ an ethaddr in the
1466 default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
11ccc33f 1467 Ethernet address is installed in the environment,
c609719b
WD
1468 which can be changed exactly ONCE by the user. [The
1469 serial# is unaffected by this, i. e. it remains
1470 read-only.]
1471
2598090b
JH
1472 The same can be accomplished in a more flexible way
1473 for any variable by configuring the type of access
1474 to allow for those variables in the ".flags" variable
1475 or define CONFIG_ENV_FLAGS_LIST_STATIC.
1476
c609719b
WD
1477- Protected RAM:
1478 CONFIG_PRAM
1479
1480 Define this variable to enable the reservation of
1481 "protected RAM", i. e. RAM which is not overwritten
1482 by U-Boot. Define CONFIG_PRAM to hold the number of
1483 kB you want to reserve for pRAM. You can overwrite
1484 this default value by defining an environment
1485 variable "pram" to the number of kB you want to
1486 reserve. Note that the board info structure will
1487 still show the full amount of RAM. If pRAM is
1488 reserved, a new environment variable "mem" will
1489 automatically be defined to hold the amount of
1490 remaining RAM in a form that can be passed as boot
1491 argument to Linux, for instance like that:
1492
fe126d8b 1493 setenv bootargs ... mem=\${mem}
c609719b
WD
1494 saveenv
1495
1496 This way you can tell Linux not to use this memory,
1497 either, which results in a memory region that will
1498 not be affected by reboots.
1499
1500 *WARNING* If your board configuration uses automatic
1501 detection of the RAM size, you must make sure that
1502 this memory test is non-destructive. So far, the
1503 following board configurations are known to be
1504 "pRAM-clean":
1505
5b8e76c3 1506 IVMS8, IVML24, SPD8xx,
1b0757ec 1507 HERMES, IP860, RPXlite, LWMON,
2eb48ff7 1508 FLAGADM
c609719b
WD
1509
1510- Error Recovery:
c609719b
WD
1511 Note:
1512
8bde7f77
WD
1513 In the current implementation, the local variables
1514 space and global environment variables space are
1515 separated. Local variables are those you define by
1516 simply typing `name=value'. To access a local
1517 variable later on, you have write `$name' or
1518 `${name}'; to execute the contents of a variable
1519 directly type `$name' at the command prompt.
c609719b 1520
43d9616c
WD
1521 Global environment variables are those you use
1522 setenv/printenv to work with. To run a command stored
1523 in such a variable, you need to use the run command,
1524 and you must not use the '$' sign to access them.
c609719b
WD
1525
1526 To store commands and special characters in a
1527 variable, please use double quotation marks
1528 surrounding the whole text of the variable, instead
1529 of the backslashes before semicolons and special
1530 symbols.
1531
a8c7c708 1532- Default Environment:
c609719b
WD
1533 CONFIG_EXTRA_ENV_SETTINGS
1534
43d9616c
WD
1535 Define this to contain any number of null terminated
1536 strings (variable = value pairs) that will be part of
7152b1d0 1537 the default environment compiled into the boot image.
2262cfee 1538
43d9616c
WD
1539 For example, place something like this in your
1540 board's config file:
c609719b
WD
1541
1542 #define CONFIG_EXTRA_ENV_SETTINGS \
1543 "myvar1=value1\0" \
1544 "myvar2=value2\0"
1545
43d9616c
WD
1546 Warning: This method is based on knowledge about the
1547 internal format how the environment is stored by the
1548 U-Boot code. This is NOT an official, exported
1549 interface! Although it is unlikely that this format
7152b1d0 1550 will change soon, there is no guarantee either.
c609719b
WD
1551 You better know what you are doing here.
1552
43d9616c
WD
1553 Note: overly (ab)use of the default environment is
1554 discouraged. Make sure to check other ways to preset
74de7aef 1555 the environment like the "source" command or the
43d9616c 1556 boot command first.
c609719b 1557
06fd8538
SG
1558 CONFIG_DELAY_ENVIRONMENT
1559
1560 Normally the environment is loaded when the board is
b445bbb4 1561 initialised so that it is available to U-Boot. This inhibits
06fd8538
SG
1562 that so that the environment is not available until
1563 explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
1564 this is instead controlled by the value of
1565 /config/load-environment.
1566
4cf2609b
WD
1567 CONFIG_STANDALONE_LOAD_ADDR
1568
6feff899
WD
1569 This option defines a board specific value for the
1570 address where standalone program gets loaded, thus
1571 overwriting the architecture dependent default
4cf2609b
WD
1572 settings.
1573
1574- Frame Buffer Address:
1575 CONFIG_FB_ADDR
1576
1577 Define CONFIG_FB_ADDR if you want to use specific
44a53b57
WD
1578 address for frame buffer. This is typically the case
1579 when using a graphics controller has separate video
1580 memory. U-Boot will then place the frame buffer at
1581 the given address instead of dynamically reserving it
1582 in system RAM by calling lcd_setmem(), which grabs
1583 the memory for the frame buffer depending on the
1584 configured panel size.
4cf2609b
WD
1585
1586 Please see board_init_f function.
1587
cccfc2ab
DZ
1588- Automatic software updates via TFTP server
1589 CONFIG_UPDATE_TFTP
1590 CONFIG_UPDATE_TFTP_CNT_MAX
1591 CONFIG_UPDATE_TFTP_MSEC_MAX
1592
1593 These options enable and control the auto-update feature;
1594 for a more detailed description refer to doc/README.update.
1595
1596- MTD Support (mtdparts command, UBI support)
ff94bc40
HS
1597 CONFIG_MTD_UBI_WL_THRESHOLD
1598 This parameter defines the maximum difference between the highest
1599 erase counter value and the lowest erase counter value of eraseblocks
1600 of UBI devices. When this threshold is exceeded, UBI starts performing
1601 wear leveling by means of moving data from eraseblock with low erase
1602 counter to eraseblocks with high erase counter.
1603
1604 The default value should be OK for SLC NAND flashes, NOR flashes and
1605 other flashes which have eraseblock life-cycle 100000 or more.
1606 However, in case of MLC NAND flashes which typically have eraseblock
1607 life-cycle less than 10000, the threshold should be lessened (e.g.,
1608 to 128 or 256, although it does not have to be power of 2).
1609
1610 default: 4096
c654b517 1611
ff94bc40
HS
1612 CONFIG_MTD_UBI_BEB_LIMIT
1613 This option specifies the maximum bad physical eraseblocks UBI
1614 expects on the MTD device (per 1024 eraseblocks). If the
1615 underlying flash does not admit of bad eraseblocks (e.g. NOR
1616 flash), this value is ignored.
1617
1618 NAND datasheets often specify the minimum and maximum NVM
1619 (Number of Valid Blocks) for the flashes' endurance lifetime.
1620 The maximum expected bad eraseblocks per 1024 eraseblocks
1621 then can be calculated as "1024 * (1 - MinNVB / MaxNVB)",
1622 which gives 20 for most NANDs (MaxNVB is basically the total
1623 count of eraseblocks on the chip).
1624
1625 To put it differently, if this value is 20, UBI will try to
1626 reserve about 1.9% of physical eraseblocks for bad blocks
1627 handling. And that will be 1.9% of eraseblocks on the entire
1628 NAND chip, not just the MTD partition UBI attaches. This means
1629 that if you have, say, a NAND flash chip admits maximum 40 bad
1630 eraseblocks, and it is split on two MTD partitions of the same
1631 size, UBI will reserve 40 eraseblocks when attaching a
1632 partition.
1633
1634 default: 20
1635
1636 CONFIG_MTD_UBI_FASTMAP
1637 Fastmap is a mechanism which allows attaching an UBI device
1638 in nearly constant time. Instead of scanning the whole MTD device it
1639 only has to locate a checkpoint (called fastmap) on the device.
1640 The on-flash fastmap contains all information needed to attach
1641 the device. Using fastmap makes only sense on large devices where
1642 attaching by scanning takes long. UBI will not automatically install
1643 a fastmap on old images, but you can set the UBI parameter
1644 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note
1645 that fastmap-enabled images are still usable with UBI implementations
1646 without fastmap support. On typical flash devices the whole fastmap
1647 fits into one PEB. UBI will reserve PEBs to hold two fastmaps.
1648
1649 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT
1650 Set this parameter to enable fastmap automatically on images
1651 without a fastmap.
1652 default: 0
1653
0195a7bb
HS
1654 CONFIG_MTD_UBI_FM_DEBUG
1655 Enable UBI fastmap debug
1656 default: 0
1657
6a11cf48 1658- SPL framework
04e5ae79
WD
1659 CONFIG_SPL
1660 Enable building of SPL globally.
6a11cf48 1661
6ebc3461
AA
1662 CONFIG_SPL_MAX_FOOTPRINT
1663 Maximum size in memory allocated to the SPL, BSS included.
1664 When defined, the linker checks that the actual memory
1665 used by SPL from _start to __bss_end does not exceed it.
8960af8b 1666 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
6ebc3461
AA
1667 must not be both defined at the same time.
1668
95579793 1669 CONFIG_SPL_MAX_SIZE
6ebc3461
AA
1670 Maximum size of the SPL image (text, data, rodata, and
1671 linker lists sections), BSS excluded.
1672 When defined, the linker checks that the actual size does
1673 not exceed it.
95579793 1674
94a45bb1
SW
1675 CONFIG_SPL_RELOC_TEXT_BASE
1676 Address to relocate to. If unspecified, this is equal to
1677 CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
1678
95579793
TR
1679 CONFIG_SPL_BSS_START_ADDR
1680 Link address for the BSS within the SPL binary.
1681
1682 CONFIG_SPL_BSS_MAX_SIZE
6ebc3461
AA
1683 Maximum size in memory allocated to the SPL BSS.
1684 When defined, the linker checks that the actual memory used
1685 by SPL from __bss_start to __bss_end does not exceed it.
8960af8b 1686 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
6ebc3461 1687 must not be both defined at the same time.
95579793
TR
1688
1689 CONFIG_SPL_STACK
1690 Adress of the start of the stack SPL will use
1691
8c80eb3b
AA
1692 CONFIG_SPL_PANIC_ON_RAW_IMAGE
1693 When defined, SPL will panic() if the image it has
1694 loaded does not have a signature.
1695 Defining this is useful when code which loads images
1696 in SPL cannot guarantee that absolutely all read errors
1697 will be caught.
1698 An example is the LPC32XX MLC NAND driver, which will
1699 consider that a completely unreadable NAND block is bad,
1700 and thus should be skipped silently.
1701
94a45bb1
SW
1702 CONFIG_SPL_RELOC_STACK
1703 Adress of the start of the stack SPL will use after
1704 relocation. If unspecified, this is equal to
1705 CONFIG_SPL_STACK.
1706
95579793
TR
1707 CONFIG_SYS_SPL_MALLOC_START
1708 Starting address of the malloc pool used in SPL.
9ac4fc82
FE
1709 When this option is set the full malloc is used in SPL and
1710 it is set up by spl_init() and before that, the simple malloc()
1711 can be used if CONFIG_SYS_MALLOC_F is defined.
95579793
TR
1712
1713 CONFIG_SYS_SPL_MALLOC_SIZE
1714 The size of the malloc pool used in SPL.
6a11cf48 1715
861a86f4
TR
1716 CONFIG_SPL_DISPLAY_PRINT
1717 For ARM, enable an optional function to print more information
1718 about the running system.
1719
4b919725
SW
1720 CONFIG_SPL_INIT_MINIMAL
1721 Arch init code should be built for a very small image
1722
2b75b0ad
PK
1723 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
1724 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
1725 Sector and number of sectors to load kernel argument
1726 parameters from when MMC is being used in raw mode
1727 (for falcon mode)
1728
fae81c72
GG
1729 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
1730 Filename to read to load U-Boot when reading from filesystem
1731
1732 CONFIG_SPL_FS_LOAD_KERNEL_NAME
7ad2cc79 1733 Filename to read to load kernel uImage when reading
fae81c72 1734 from filesystem (for Falcon mode)
7ad2cc79 1735
fae81c72 1736 CONFIG_SPL_FS_LOAD_ARGS_NAME
7ad2cc79 1737 Filename to read to load kernel argument parameters
fae81c72 1738 when reading from filesystem (for Falcon mode)
7ad2cc79 1739
06f60ae3
SW
1740 CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
1741 Set this for NAND SPL on PPC mpc83xx targets, so that
1742 start.S waits for the rest of the SPL to load before
1743 continuing (the hardware starts execution after just
1744 loading the first page rather than the full 4K).
1745
651fcf60
PK
1746 CONFIG_SPL_SKIP_RELOCATE
1747 Avoid SPL relocation
1748
6f4e7d3c
TG
1749 CONFIG_SPL_UBI
1750 Support for a lightweight UBI (fastmap) scanner and
1751 loader
1752
0c3117b1
HS
1753 CONFIG_SPL_NAND_RAW_ONLY
1754 Support to boot only raw u-boot.bin images. Use this only
1755 if you need to save space.
1756
7c8eea59
YZ
1757 CONFIG_SPL_COMMON_INIT_DDR
1758 Set for common ddr init with serial presence detect in
1759 SPL binary.
1760
95579793
TR
1761 CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
1762 CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
1763 CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
1764 CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE,
1765 CONFIG_SYS_NAND_ECCBYTES
1766 Defines the size and behavior of the NAND that SPL uses
7d4b7955 1767 to read U-Boot
95579793 1768
7d4b7955
SW
1769 CONFIG_SYS_NAND_U_BOOT_DST
1770 Location in memory to load U-Boot to
1771
1772 CONFIG_SYS_NAND_U_BOOT_SIZE
1773 Size of image to load
95579793
TR
1774
1775 CONFIG_SYS_NAND_U_BOOT_START
7d4b7955 1776 Entry point in loaded image to jump to
95579793
TR
1777
1778 CONFIG_SYS_NAND_HW_ECC_OOBFIRST
1779 Define this if you need to first read the OOB and then the
b445bbb4 1780 data. This is used, for example, on davinci platforms.
95579793 1781
c57b953d
PM
1782 CONFIG_SPL_RAM_DEVICE
1783 Support for running image already present in ram, in SPL binary
6a11cf48 1784
74752baa 1785 CONFIG_SPL_PAD_TO
6113d3f2
BT
1786 Image offset to which the SPL should be padded before appending
1787 the SPL payload. By default, this is defined as
1788 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
1789 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
1790 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
74752baa 1791
ca2fca22
SW
1792 CONFIG_SPL_TARGET
1793 Final target image containing SPL and payload. Some SPLs
1794 use an arch-specific makefile fragment instead, for
1795 example if more than one image needs to be produced.
1796
b527b9c6 1797 CONFIG_SPL_FIT_PRINT
87ebee39
SG
1798 Printing information about a FIT image adds quite a bit of
1799 code to SPL. So this is normally disabled in SPL. Use this
1800 option to re-enable it. This will affect the output of the
1801 bootm command when booting a FIT image.
1802
3aa29de0
YZ
1803- TPL framework
1804 CONFIG_TPL
1805 Enable building of TPL globally.
1806
1807 CONFIG_TPL_PAD_TO
1808 Image offset to which the TPL should be padded before appending
1809 the TPL payload. By default, this is defined as
93e14596
WD
1810 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
1811 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
1812 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
3aa29de0 1813
a8c7c708
WD
1814- Interrupt support (PPC):
1815
d4ca31c4
WD
1816 There are common interrupt_init() and timer_interrupt()
1817 for all PPC archs. interrupt_init() calls interrupt_init_cpu()
11ccc33f 1818 for CPU specific initialization. interrupt_init_cpu()
d4ca31c4 1819 should set decrementer_count to appropriate value. If
11ccc33f 1820 CPU resets decrementer automatically after interrupt
d4ca31c4 1821 (ppc4xx) it should set decrementer_count to zero.
11ccc33f 1822 timer_interrupt() calls timer_interrupt_cpu() for CPU
d4ca31c4
WD
1823 specific handling. If board has watchdog / status_led
1824 / other_activity_monitor it works automatically from
1825 general timer_interrupt().
a8c7c708 1826
c609719b 1827
9660e442
HR
1828Board initialization settings:
1829------------------------------
1830
1831During Initialization u-boot calls a number of board specific functions
1832to allow the preparation of board specific prerequisites, e.g. pin setup
1833before drivers are initialized. To enable these callbacks the
1834following configuration macros have to be defined. Currently this is
1835architecture specific, so please check arch/your_architecture/lib/board.c
1836typically in board_init_f() and board_init_r().
1837
1838- CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f()
1839- CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r()
1840- CONFIG_BOARD_LATE_INIT: Call board_late_init()
c609719b 1841
c609719b
WD
1842Configuration Settings:
1843-----------------------
1844
4d979bfd 1845- MEM_SUPPORT_64BIT_DATA: Defined automatically if compiled as 64-bit.
4d1fd7f1
YS
1846 Optionally it can be defined to support 64-bit memory commands.
1847
6d0f6bcf 1848- CONFIG_SYS_LONGHELP: Defined when you want long help messages included;
c609719b
WD
1849 undefine this when you're short of memory.
1850
2fb2604d
PT
1851- CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default
1852 width of the commands listed in the 'help' command output.
1853
6d0f6bcf 1854- CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
c609719b
WD
1855 prompt for user input.
1856
6d0f6bcf 1857- CONFIG_SYS_CBSIZE: Buffer size for input from the Console
c609719b 1858
6d0f6bcf 1859- CONFIG_SYS_PBSIZE: Buffer size for Console output
c609719b 1860
6d0f6bcf 1861- CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands
c609719b 1862
6d0f6bcf 1863- CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to
c609719b
WD
1864 the application (usually a Linux kernel) when it is
1865 booted
1866
6d0f6bcf 1867- CONFIG_SYS_BAUDRATE_TABLE:
c609719b
WD
1868 List of legal baudrate settings for this board.
1869
e8149522 1870- CONFIG_SYS_MEM_RESERVE_SECURE
e61a7534 1871 Only implemented for ARMv8 for now.
e8149522
YS
1872 If defined, the size of CONFIG_SYS_MEM_RESERVE_SECURE memory
1873 is substracted from total RAM and won't be reported to OS.
1874 This memory can be used as secure memory. A variable
e61a7534 1875 gd->arch.secure_ram is used to track the location. In systems
e8149522
YS
1876 the RAM base is not zero, or RAM is divided into banks,
1877 this variable needs to be recalcuated to get the address.
1878
aabd7ddb 1879- CONFIG_SYS_MEM_TOP_HIDE:
6d0f6bcf 1880 If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
14f73ca6 1881 this specified memory area will get subtracted from the top
11ccc33f 1882 (end) of RAM and won't get "touched" at all by U-Boot. By
14f73ca6
SR
1883 fixing up gd->ram_size the Linux kernel should gets passed
1884 the now "corrected" memory size and won't touch it either.
1885 This should work for arch/ppc and arch/powerpc. Only Linux
5e12e75d 1886 board ports in arch/powerpc with bootwrapper support that
14f73ca6 1887 recalculate the memory size from the SDRAM controller setup
5e12e75d 1888 will have to get fixed in Linux additionally.
14f73ca6
SR
1889
1890 This option can be used as a workaround for the 440EPx/GRx
1891 CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
1892 be touched.
1893
1894 WARNING: Please make sure that this value is a multiple of
1895 the Linux page size (normally 4k). If this is not the case,
1896 then the end address of the Linux memory will be located at a
1897 non page size aligned address and this could cause major
1898 problems.
1899
6d0f6bcf 1900- CONFIG_SYS_LOADS_BAUD_CHANGE:
c609719b
WD
1901 Enable temporary baudrate change while serial download
1902
6d0f6bcf 1903- CONFIG_SYS_SDRAM_BASE:
c609719b
WD
1904 Physical start address of SDRAM. _Must_ be 0 here.
1905
6d0f6bcf 1906- CONFIG_SYS_FLASH_BASE:
c609719b
WD
1907 Physical start address of Flash memory.
1908
6d0f6bcf 1909- CONFIG_SYS_MONITOR_LEN:
8bde7f77
WD
1910 Size of memory reserved for monitor code, used to
1911 determine _at_compile_time_ (!) if the environment is
1912 embedded within the U-Boot image, or in a separate
1913 flash sector.
c609719b 1914
6d0f6bcf 1915- CONFIG_SYS_MALLOC_LEN:
c609719b
WD
1916 Size of DRAM reserved for malloc() use.
1917
d59476b6
SG
1918- CONFIG_SYS_MALLOC_F_LEN
1919 Size of the malloc() pool for use before relocation. If
1920 this is defined, then a very simple malloc() implementation
1921 will become available before relocation. The address is just
1922 below the global data, and the stack is moved down to make
1923 space.
1924
1925 This feature allocates regions with increasing addresses
1926 within the region. calloc() is supported, but realloc()
1927 is not available. free() is supported but does nothing.
b445bbb4 1928 The memory will be freed (or in fact just forgotten) when
d59476b6
SG
1929 U-Boot relocates itself.
1930
38687ae6
SG
1931- CONFIG_SYS_MALLOC_SIMPLE
1932 Provides a simple and small malloc() and calloc() for those
1933 boards which do not use the full malloc in SPL (which is
1934 enabled with CONFIG_SYS_SPL_MALLOC_START).
1935
1dfdd9ba
TR
1936- CONFIG_SYS_NONCACHED_MEMORY:
1937 Size of non-cached memory area. This area of memory will be
1938 typically located right below the malloc() area and mapped
1939 uncached in the MMU. This is useful for drivers that would
1940 otherwise require a lot of explicit cache maintenance. For
1941 some drivers it's also impossible to properly maintain the
1942 cache. For example if the regions that need to be flushed
1943 are not a multiple of the cache-line size, *and* padding
1944 cannot be allocated between the regions to align them (i.e.
1945 if the HW requires a contiguous array of regions, and the
1946 size of each region is not cache-aligned), then a flush of
1947 one region may result in overwriting data that hardware has
1948 written to another region in the same cache-line. This can
1949 happen for example in network drivers where descriptors for
1950 buffers are typically smaller than the CPU cache-line (e.g.
1951 16 bytes vs. 32 or 64 bytes).
1952
1953 Non-cached memory is only supported on 32-bit ARM at present.
1954
6d0f6bcf 1955- CONFIG_SYS_BOOTM_LEN:
15940c9a
SR
1956 Normally compressed uImages are limited to an
1957 uncompressed size of 8 MBytes. If this is not enough,
6d0f6bcf 1958 you can define CONFIG_SYS_BOOTM_LEN in your board config file
15940c9a
SR
1959 to adjust this setting to your needs.
1960
6d0f6bcf 1961- CONFIG_SYS_BOOTMAPSZ:
c609719b
WD
1962 Maximum size of memory mapped by the startup code of
1963 the Linux kernel; all data that must be processed by
7d721e34
BS
1964 the Linux kernel (bd_info, boot arguments, FDT blob if
1965 used) must be put below this limit, unless "bootm_low"
1bce2aeb 1966 environment variable is defined and non-zero. In such case
7d721e34 1967 all data for the Linux kernel must be between "bootm_low"
c0f40859 1968 and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment
c3624e6e
GL
1969 variable "bootm_mapsize" will override the value of
1970 CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined,
1971 then the value in "bootm_size" will be used instead.
c609719b 1972
fca43cc8
JR
1973- CONFIG_SYS_BOOT_RAMDISK_HIGH:
1974 Enable initrd_high functionality. If defined then the
1975 initrd_high feature is enabled and the bootm ramdisk subcommand
1976 is enabled.
1977
1978- CONFIG_SYS_BOOT_GET_CMDLINE:
1979 Enables allocating and saving kernel cmdline in space between
1980 "bootm_low" and "bootm_low" + BOOTMAPSZ.
1981
1982- CONFIG_SYS_BOOT_GET_KBD:
1983 Enables allocating and saving a kernel copy of the bd_info in
1984 space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
1985
6d0f6bcf 1986- CONFIG_SYS_MAX_FLASH_SECT:
c609719b
WD
1987 Max number of sectors on a Flash chip
1988
6d0f6bcf 1989- CONFIG_SYS_FLASH_ERASE_TOUT:
c609719b
WD
1990 Timeout for Flash erase operations (in ms)
1991
6d0f6bcf 1992- CONFIG_SYS_FLASH_WRITE_TOUT:
c609719b
WD
1993 Timeout for Flash write operations (in ms)
1994
6d0f6bcf 1995- CONFIG_SYS_FLASH_LOCK_TOUT
8564acf9
WD
1996 Timeout for Flash set sector lock bit operation (in ms)
1997
6d0f6bcf 1998- CONFIG_SYS_FLASH_UNLOCK_TOUT
8564acf9
WD
1999 Timeout for Flash clear lock bits operation (in ms)
2000
6d0f6bcf 2001- CONFIG_SYS_FLASH_PROTECTION
8564acf9
WD
2002 If defined, hardware flash sectors protection is used
2003 instead of U-Boot software protection.
2004
6d0f6bcf 2005- CONFIG_SYS_DIRECT_FLASH_TFTP:
c609719b
WD
2006
2007 Enable TFTP transfers directly to flash memory;
2008 without this option such a download has to be
2009 performed in two steps: (1) download to RAM, and (2)
2010 copy from RAM to flash.
2011
2012 The two-step approach is usually more reliable, since
2013 you can check if the download worked before you erase
11ccc33f
MZ
2014 the flash, but in some situations (when system RAM is
2015 too limited to allow for a temporary copy of the
c609719b
WD
2016 downloaded image) this option may be very useful.
2017
6d0f6bcf 2018- CONFIG_SYS_FLASH_CFI:
43d9616c 2019 Define if the flash driver uses extra elements in the
5653fc33
WD
2020 common flash structure for storing flash geometry.
2021
00b1883a 2022- CONFIG_FLASH_CFI_DRIVER
5653fc33
WD
2023 This option also enables the building of the cfi_flash driver
2024 in the drivers directory
c609719b 2025
91809ed5
PZ
2026- CONFIG_FLASH_CFI_MTD
2027 This option enables the building of the cfi_mtd driver
2028 in the drivers directory. The driver exports CFI flash
2029 to the MTD layer.
2030
6d0f6bcf 2031- CONFIG_SYS_FLASH_USE_BUFFER_WRITE
96ef831f
GL
2032 Use buffered writes to flash.
2033
2034- CONFIG_FLASH_SPANSION_S29WS_N
2035 s29ws-n MirrorBit flash has non-standard addresses for buffered
2036 write commands.
2037
6d0f6bcf 2038- CONFIG_SYS_FLASH_QUIET_TEST
5568e613
SR
2039 If this option is defined, the common CFI flash doesn't
2040 print it's warning upon not recognized FLASH banks. This
2041 is useful, if some of the configured banks are only
2042 optionally available.
2043
9a042e9c
JVB
2044- CONFIG_FLASH_SHOW_PROGRESS
2045 If defined (must be an integer), print out countdown
2046 digits and dots. Recommended value: 45 (9..1) for 80
2047 column displays, 15 (3..1) for 40 column displays.
2048
352ef3f1
SR
2049- CONFIG_FLASH_VERIFY
2050 If defined, the content of the flash (destination) is compared
2051 against the source after the write operation. An error message
2052 will be printed when the contents are not identical.
2053 Please note that this option is useless in nearly all cases,
2054 since such flash programming errors usually are detected earlier
2055 while unprotecting/erasing/programming. Please only enable
2056 this option if you really know what you are doing.
2057
ea882baf
WD
2058- CONFIG_ENV_MAX_ENTRIES
2059
071bc923
WD
2060 Maximum number of entries in the hash table that is used
2061 internally to store the environment settings. The default
2062 setting is supposed to be generous and should work in most
2063 cases. This setting can be used to tune behaviour; see
2064 lib/hashtable.c for details.
ea882baf 2065
2598090b
JH
2066- CONFIG_ENV_FLAGS_LIST_DEFAULT
2067- CONFIG_ENV_FLAGS_LIST_STATIC
1bce2aeb 2068 Enable validation of the values given to environment variables when
2598090b
JH
2069 calling env set. Variables can be restricted to only decimal,
2070 hexadecimal, or boolean. If CONFIG_CMD_NET is also defined,
2071 the variables can also be restricted to IP address or MAC address.
2072
2073 The format of the list is:
2074 type_attribute = [s|d|x|b|i|m]
b445bbb4
JM
2075 access_attribute = [a|r|o|c]
2076 attributes = type_attribute[access_attribute]
2598090b
JH
2077 entry = variable_name[:attributes]
2078 list = entry[,list]
2079
2080 The type attributes are:
2081 s - String (default)
2082 d - Decimal
2083 x - Hexadecimal
2084 b - Boolean ([1yYtT|0nNfF])
2085 i - IP address
2086 m - MAC address
2087
267541f7
JH
2088 The access attributes are:
2089 a - Any (default)
2090 r - Read-only
2091 o - Write-once
2092 c - Change-default
2093
2598090b
JH
2094 - CONFIG_ENV_FLAGS_LIST_DEFAULT
2095 Define this to a list (string) to define the ".flags"
b445bbb4 2096 environment variable in the default or embedded environment.
2598090b
JH
2097
2098 - CONFIG_ENV_FLAGS_LIST_STATIC
2099 Define this to a list (string) to define validation that
2100 should be done if an entry is not found in the ".flags"
2101 environment variable. To override a setting in the static
2102 list, simply add an entry for the same variable name to the
2103 ".flags" variable.
2104
bdf1fe4e
JH
2105 If CONFIG_REGEX is defined, the variable_name above is evaluated as a
2106 regular expression. This allows multiple variables to define the same
2107 flags without explicitly listing them for each variable.
2108
c609719b
WD
2109The following definitions that deal with the placement and management
2110of environment data (variable area); in general, we support the
2111following configurations:
2112
c3eb3fe4
MF
2113- CONFIG_BUILD_ENVCRC:
2114
2115 Builds up envcrc with the target environment so that external utils
2116 may easily extract it and embed it in final U-Boot images.
2117
c609719b 2118BE CAREFUL! The first access to the environment happens quite early
b445bbb4 2119in U-Boot initialization (when we try to get the setting of for the
11ccc33f 2120console baudrate). You *MUST* have mapped your NVRAM area then, or
c609719b
WD
2121U-Boot will hang.
2122
2123Please note that even with NVRAM we still use a copy of the
2124environment in RAM: we could work on NVRAM directly, but we want to
2125keep settings there always unmodified except somebody uses "saveenv"
2126to save the current settings.
2127
0a85a9e7
LG
2128BE CAREFUL! For some special cases, the local device can not use
2129"saveenv" command. For example, the local device will get the
fc54c7fa
LG
2130environment stored in a remote NOR flash by SRIO or PCIE link,
2131but it can not erase, write this NOR flash by SRIO or PCIE interface.
0a85a9e7 2132
b74ab737
GL
2133- CONFIG_NAND_ENV_DST
2134
2135 Defines address in RAM to which the nand_spl code should copy the
2136 environment. If redundant environment is used, it will be copied to
2137 CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.
2138
e881cb56 2139Please note that the environment is read-only until the monitor
c609719b 2140has been relocated to RAM and a RAM copy of the environment has been
00caae6d 2141created; also, when using EEPROM you will have to use env_get_f()
c609719b
WD
2142until then to read environment variables.
2143
85ec0bcc
WD
2144The environment is protected by a CRC32 checksum. Before the monitor
2145is relocated into RAM, as a result of a bad CRC you will be working
2146with the compiled-in default environment - *silently*!!! [This is
2147necessary, because the first environment variable we need is the
2148"baudrate" setting for the console - if we have a bad CRC, we don't
2149have any device yet where we could complain.]
c609719b
WD
2150
2151Note: once the monitor has been relocated, then it will complain if
2152the default environment is used; a new CRC is computed as soon as you
85ec0bcc 2153use the "saveenv" command to store a valid environment.
c609719b 2154
6d0f6bcf 2155- CONFIG_SYS_FAULT_MII_ADDR:
42d1f039 2156 MII address of the PHY to check for the Ethernet link state.
c609719b 2157
f5675aa5
RM
2158- CONFIG_NS16550_MIN_FUNCTIONS:
2159 Define this if you desire to only have use of the NS16550_init
2160 and NS16550_putc functions for the serial driver located at
2161 drivers/serial/ns16550.c. This option is useful for saving
2162 space for already greatly restricted images, including but not
2163 limited to NAND_SPL configurations.
2164
b2b92f53
SG
2165- CONFIG_DISPLAY_BOARDINFO
2166 Display information about the board that U-Boot is running on
2167 when U-Boot starts up. The board function checkboard() is called
2168 to do this.
2169
e2e3e2b1
SG
2170- CONFIG_DISPLAY_BOARDINFO_LATE
2171 Similar to the previous option, but display this information
2172 later, once stdio is running and output goes to the LCD, if
2173 present.
2174
c609719b 2175Low Level (hardware related) configuration options:
dc7c9a1a 2176---------------------------------------------------
c609719b 2177
6d0f6bcf 2178- CONFIG_SYS_CACHELINE_SIZE:
c609719b
WD
2179 Cache Line Size of the CPU.
2180
e46fedfe
TT
2181- CONFIG_SYS_CCSRBAR_DEFAULT:
2182 Default (power-on reset) physical address of CCSR on Freescale
2183 PowerPC SOCs.
2184
2185- CONFIG_SYS_CCSRBAR:
2186 Virtual address of CCSR. On a 32-bit build, this is typically
2187 the same value as CONFIG_SYS_CCSRBAR_DEFAULT.
2188
e46fedfe
TT
2189- CONFIG_SYS_CCSRBAR_PHYS:
2190 Physical address of CCSR. CCSR can be relocated to a new
2191 physical address, if desired. In this case, this macro should
c0f40859 2192 be set to that address. Otherwise, it should be set to the
e46fedfe
TT
2193 same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR
2194 is typically relocated on 36-bit builds. It is recommended
2195 that this macro be defined via the _HIGH and _LOW macros:
2196
2197 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH
2198 * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW)
2199
2200- CONFIG_SYS_CCSRBAR_PHYS_HIGH:
4cf2609b
WD
2201 Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS. This value is typically
2202 either 0 (32-bit build) or 0xF (36-bit build). This macro is
e46fedfe
TT
2203 used in assembly code, so it must not contain typecasts or
2204 integer size suffixes (e.g. "ULL").
2205
2206- CONFIG_SYS_CCSRBAR_PHYS_LOW:
2207 Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS. This macro is
2208 used in assembly code, so it must not contain typecasts or
2209 integer size suffixes (e.g. "ULL").
2210
2211- CONFIG_SYS_CCSR_DO_NOT_RELOCATE:
2212 If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be
2213 forced to a value that ensures that CCSR is not relocated.
2214
6d0f6bcf 2215- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
efe2a4d5 2216 DO NOT CHANGE unless you know exactly what you're
907208c4 2217 doing! (11-4) [MPC8xx systems only]
c609719b 2218
6d0f6bcf 2219- CONFIG_SYS_INIT_RAM_ADDR:
c609719b 2220
7152b1d0 2221 Start address of memory area that can be used for
c609719b
WD
2222 initial data and stack; please note that this must be
2223 writable memory that is working WITHOUT special
2224 initialization, i. e. you CANNOT use normal RAM which
2225 will become available only after programming the
2226 memory controller and running certain initialization
2227 sequences.
2228
2229 U-Boot uses the following memory types:
907208c4 2230 - MPC8xx: IMMR (internal memory of the CPU)
c609719b 2231
6d0f6bcf 2232- CONFIG_SYS_GBL_DATA_OFFSET:
c609719b
WD
2233
2234 Offset of the initial data structure in the memory
6d0f6bcf
JCPV
2235 area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
2236 CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
c609719b 2237 data is located at the end of the available space
553f0982 2238 (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
acd51f9d 2239 GENERATED_GBL_DATA_SIZE), and the initial stack is just
6d0f6bcf
JCPV
2240 below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
2241 CONFIG_SYS_GBL_DATA_OFFSET) downward.
c609719b
WD
2242
2243 Note:
2244 On the MPC824X (or other systems that use the data
2245 cache for initial memory) the address chosen for
6d0f6bcf 2246 CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must
c609719b
WD
2247 point to an otherwise UNUSED address space between
2248 the top of RAM and the start of the PCI space.
2249
6d0f6bcf 2250- CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
c609719b 2251
6d0f6bcf 2252- CONFIG_SYS_OR_TIMING_SDRAM:
c609719b
WD
2253 SDRAM timing
2254
6d0f6bcf 2255- CONFIG_SYS_MAMR_PTA:
c609719b
WD
2256 periodic timer for refresh
2257
a09b9b68
KG
2258- CONFIG_SYS_SRIO:
2259 Chip has SRIO or not
2260
2261- CONFIG_SRIO1:
2262 Board has SRIO 1 port available
2263
2264- CONFIG_SRIO2:
2265 Board has SRIO 2 port available
2266
c8b28152
LG
2267- CONFIG_SRIO_PCIE_BOOT_MASTER
2268 Board can support master function for Boot from SRIO and PCIE
2269
a09b9b68
KG
2270- CONFIG_SYS_SRIOn_MEM_VIRT:
2271 Virtual Address of SRIO port 'n' memory region
2272
62f9b654 2273- CONFIG_SYS_SRIOn_MEM_PHYxS:
a09b9b68
KG
2274 Physical Address of SRIO port 'n' memory region
2275
2276- CONFIG_SYS_SRIOn_MEM_SIZE:
2277 Size of SRIO port 'n' memory region
2278
66bd1846
FE
2279- CONFIG_SYS_NAND_BUSWIDTH_16BIT
2280 Defined to tell the NAND controller that the NAND chip is using
2281 a 16 bit bus.
2282 Not all NAND drivers use this symbol.
a430e916 2283 Example of drivers that use it:
a430fa06
MR
2284 - drivers/mtd/nand/raw/ndfc.c
2285 - drivers/mtd/nand/raw/mxc_nand.c
eced4626
AW
2286
2287- CONFIG_SYS_NDFC_EBC0_CFG
2288 Sets the EBC0_CFG register for the NDFC. If not defined
2289 a default value will be used.
2290
bb99ad6d 2291- CONFIG_SPD_EEPROM
218ca724
WD
2292 Get DDR timing information from an I2C EEPROM. Common
2293 with pluggable memory modules such as SODIMMs
2294
bb99ad6d
BW
2295 SPD_EEPROM_ADDRESS
2296 I2C address of the SPD EEPROM
2297
6d0f6bcf 2298- CONFIG_SYS_SPD_BUS_NUM
218ca724
WD
2299 If SPD EEPROM is on an I2C bus other than the first
2300 one, specify here. Note that the value must resolve
2301 to something your driver can deal with.
bb99ad6d 2302
1b3e3c4f
YS
2303- CONFIG_SYS_DDR_RAW_TIMING
2304 Get DDR timing information from other than SPD. Common with
2305 soldered DDR chips onboard without SPD. DDR raw timing
2306 parameters are extracted from datasheet and hard-coded into
2307 header files or board specific files.
2308
6f5e1dc5
YS
2309- CONFIG_FSL_DDR_INTERACTIVE
2310 Enable interactive DDR debugging. See doc/README.fsl-ddr.
2311
e32d59a2
YS
2312- CONFIG_FSL_DDR_SYNC_REFRESH
2313 Enable sync of refresh for multiple controllers.
2314
4516ff81
YS
2315- CONFIG_FSL_DDR_BIST
2316 Enable built-in memory test for Freescale DDR controllers.
2317
6d0f6bcf 2318- CONFIG_SYS_83XX_DDR_USES_CS0
218ca724
WD
2319 Only for 83xx systems. If specified, then DDR should
2320 be configured using CS0 and CS1 instead of CS2 and CS3.
2ad6b513 2321
c26e454d
WD
2322- CONFIG_RMII
2323 Enable RMII mode for all FECs.
2324 Note that this is a global option, we can't
2325 have one FEC in standard MII mode and another in RMII mode.
2326
5cf91d6b
WD
2327- CONFIG_CRC32_VERIFY
2328 Add a verify option to the crc32 command.
2329 The syntax is:
2330
2331 => crc32 -v <address> <count> <crc32>
2332
2333 Where address/count indicate a memory area
2334 and crc32 is the correct crc32 which the
2335 area should have.
2336
56523f12
WD
2337- CONFIG_LOOPW
2338 Add the "loopw" memory command. This only takes effect if
493f420e 2339 the memory commands are activated globally (CONFIG_CMD_MEMORY).
56523f12 2340
72732318 2341- CONFIG_CMD_MX_CYCLIC
7b466641
SR
2342 Add the "mdc" and "mwc" memory commands. These are cyclic
2343 "md/mw" commands.
2344 Examples:
2345
efe2a4d5 2346 => mdc.b 10 4 500
7b466641
SR
2347 This command will print 4 bytes (10,11,12,13) each 500 ms.
2348
efe2a4d5 2349 => mwc.l 100 12345678 10
7b466641
SR
2350 This command will write 12345678 to address 100 all 10 ms.
2351
efe2a4d5 2352 This only takes effect if the memory commands are activated
493f420e 2353 globally (CONFIG_CMD_MEMORY).
7b466641 2354
401bb30b 2355- CONFIG_SPL_BUILD
32f2ca2a
TH
2356 Set when the currently-running compilation is for an artifact
2357 that will end up in the SPL (as opposed to the TPL or U-Boot
2358 proper). Code that needs stage-specific behavior should check
2359 this.
400558b5 2360
3aa29de0 2361- CONFIG_TPL_BUILD
32f2ca2a
TH
2362 Set when the currently-running compilation is for an artifact
2363 that will end up in the TPL (as opposed to the SPL or U-Boot
2364 proper). Code that needs stage-specific behavior should check
2365 this.
3aa29de0 2366
5df572f0
YZ
2367- CONFIG_SYS_MPC85XX_NO_RESETVEC
2368 Only for 85xx systems. If this variable is specified, the section
2369 .resetvec is not kept and the section .bootpg is placed in the
2370 previous 4k of the .text section.
2371
4213fc29
SG
2372- CONFIG_ARCH_MAP_SYSMEM
2373 Generally U-Boot (and in particular the md command) uses
2374 effective address. It is therefore not necessary to regard
2375 U-Boot address as virtual addresses that need to be translated
2376 to physical addresses. However, sandbox requires this, since
2377 it maintains its own little RAM buffer which contains all
2378 addressable memory. This option causes some memory accesses
2379 to be mapped through map_sysmem() / unmap_sysmem().
2380
588a13f7
SG
2381- CONFIG_X86_RESET_VECTOR
2382 If defined, the x86 reset vector code is included. This is not
2383 needed when U-Boot is running from Coreboot.
b16f521a 2384
999d7d32
KM
2385- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
2386 Option to disable subpage write in NAND driver
2387 driver that uses this:
a430fa06 2388 drivers/mtd/nand/raw/davinci_nand.c
999d7d32 2389
f2717b47
TT
2390Freescale QE/FMAN Firmware Support:
2391-----------------------------------
2392
2393The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the
2394loading of "firmware", which is encoded in the QE firmware binary format.
2395This firmware often needs to be loaded during U-Boot booting, so macros
2396are used to identify the storage device (NOR flash, SPI, etc) and the address
2397within that device.
2398
dcf1d774
ZQ
2399- CONFIG_SYS_FMAN_FW_ADDR
2400 The address in the storage device where the FMAN microcode is located. The
cc1e98b5 2401 meaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro
dcf1d774
ZQ
2402 is also specified.
2403
2404- CONFIG_SYS_QE_FW_ADDR
2405 The address in the storage device where the QE microcode is located. The
cc1e98b5 2406 meaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro
f2717b47
TT
2407 is also specified.
2408
2409- CONFIG_SYS_QE_FMAN_FW_LENGTH
2410 The maximum possible size of the firmware. The firmware binary format
2411 has a field that specifies the actual size of the firmware, but it
2412 might not be possible to read any part of the firmware unless some
2413 local storage is allocated to hold the entire firmware first.
2414
2415- CONFIG_SYS_QE_FMAN_FW_IN_NOR
2416 Specifies that QE/FMAN firmware is located in NOR flash, mapped as
2417 normal addressable memory via the LBC. CONFIG_SYS_FMAN_FW_ADDR is the
2418 virtual address in NOR flash.
2419
2420- CONFIG_SYS_QE_FMAN_FW_IN_NAND
2421 Specifies that QE/FMAN firmware is located in NAND flash.
2422 CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.
2423
2424- CONFIG_SYS_QE_FMAN_FW_IN_MMC
2425 Specifies that QE/FMAN firmware is located on the primary SD/MMC
2426 device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
2427
292dc6c5
LG
2428- CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
2429 Specifies that QE/FMAN firmware is located in the remote (master)
2430 memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which
fc54c7fa
LG
2431 can be mapped from slave TLB->slave LAW->slave SRIO or PCIE outbound
2432 window->master inbound window->master LAW->the ucode address in
2433 master's memory space.
f2717b47 2434
b940ca64
GR
2435Freescale Layerscape Management Complex Firmware Support:
2436---------------------------------------------------------
2437The Freescale Layerscape Management Complex (MC) supports the loading of
2438"firmware".
2439This firmware often needs to be loaded during U-Boot booting, so macros
2440are used to identify the storage device (NOR flash, SPI, etc) and the address
2441within that device.
2442
2443- CONFIG_FSL_MC_ENET
2444 Enable the MC driver for Layerscape SoCs.
2445
5c055089
PK
2446Freescale Layerscape Debug Server Support:
2447-------------------------------------------
2448The Freescale Layerscape Debug Server Support supports the loading of
2449"Debug Server firmware" and triggering SP boot-rom.
2450This firmware often needs to be loaded during U-Boot booting.
2451
c0492141
YS
2452- CONFIG_SYS_MC_RSV_MEM_ALIGN
2453 Define alignment of reserved memory MC requires
5c055089 2454
f3f431a7
PK
2455Reproducible builds
2456-------------------
2457
2458In order to achieve reproducible builds, timestamps used in the U-Boot build
2459process have to be set to a fixed value.
2460
2461This is done using the SOURCE_DATE_EPOCH environment variable.
2462SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a configuration
2463option for U-Boot or an environment variable in U-Boot.
2464
2465SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in UTC.
2466
c609719b
WD
2467Building the Software:
2468======================
2469
218ca724
WD
2470Building U-Boot has been tested in several native build environments
2471and in many different cross environments. Of course we cannot support
2472all possibly existing versions of cross development tools in all
2473(potentially obsolete) versions. In case of tool chain problems we
047f6ec0 2474recommend to use the ELDK (see https://www.denx.de/wiki/DULG/ELDK)
218ca724 2475which is extensively used to build and test U-Boot.
c609719b 2476
218ca724
WD
2477If you are not using a native environment, it is assumed that you
2478have GNU cross compiling tools available in your path. In this case,
2479you must set the environment variable CROSS_COMPILE in your shell.
2480Note that no changes to the Makefile or any other source files are
2481necessary. For example using the ELDK on a 4xx CPU, please enter:
c609719b 2482
218ca724
WD
2483 $ CROSS_COMPILE=ppc_4xx-
2484 $ export CROSS_COMPILE
c609719b 2485
218ca724
WD
2486U-Boot is intended to be simple to build. After installing the
2487sources you must configure U-Boot for one specific board type. This
c609719b
WD
2488is done by typing:
2489
ab584d67 2490 make NAME_defconfig
c609719b 2491
ab584d67 2492where "NAME_defconfig" is the name of one of the existing configu-
ecb3a0a1 2493rations; see configs/*_defconfig for supported names.
db01a2ea 2494
ecb3a0a1 2495Note: for some boards special configuration names may exist; check if
2729af9d
WD
2496 additional information is available from the board vendor; for
2497 instance, the TQM823L systems are available without (standard)
2498 or with LCD support. You can select such additional "features"
11ccc33f 2499 when choosing the configuration, i. e.
2729af9d 2500
ab584d67 2501 make TQM823L_defconfig
2729af9d
WD
2502 - will configure for a plain TQM823L, i. e. no LCD support
2503
ab584d67 2504 make TQM823L_LCD_defconfig
2729af9d
WD
2505 - will configure for a TQM823L with U-Boot console on LCD
2506
2507 etc.
2508
2509
2510Finally, type "make all", and you should get some working U-Boot
2511images ready for download to / installation on your system:
2512
2513- "u-boot.bin" is a raw binary image
2514- "u-boot" is an image in ELF binary format
2515- "u-boot.srec" is in Motorola S-Record format
2516
baf31249
MB
2517By default the build is performed locally and the objects are saved
2518in the source directory. One of the two methods can be used to change
2519this behavior and build U-Boot to some external directory:
2520
25211. Add O= to the make command line invocations:
2522
2523 make O=/tmp/build distclean
ab584d67 2524 make O=/tmp/build NAME_defconfig
baf31249
MB
2525 make O=/tmp/build all
2526
adbba996 25272. Set environment variable KBUILD_OUTPUT to point to the desired location:
baf31249 2528
adbba996 2529 export KBUILD_OUTPUT=/tmp/build
baf31249 2530 make distclean
ab584d67 2531 make NAME_defconfig
baf31249
MB
2532 make all
2533
adbba996 2534Note that the command line "O=" setting overrides the KBUILD_OUTPUT environment
baf31249
MB
2535variable.
2536
215bb1c1
DS
2537User specific CPPFLAGS, AFLAGS and CFLAGS can be passed to the compiler by
2538setting the according environment variables KCPPFLAGS, KAFLAGS and KCFLAGS.
2539For example to treat all compiler warnings as errors:
2540
2541 make KCFLAGS=-Werror
2729af9d
WD
2542
2543Please be aware that the Makefiles assume you are using GNU make, so
2544for instance on NetBSD you might need to use "gmake" instead of
2545native "make".
2546
2547
2548If the system board that you have is not listed, then you will need
2549to port U-Boot to your hardware platform. To do this, follow these
2550steps:
2551
3c1496cd 25521. Create a new directory to hold your board specific code. Add any
2729af9d 2553 files you need. In your board directory, you will need at least
3c1496cd
PS
2554 the "Makefile" and a "<board>.c".
25552. Create a new configuration file "include/configs/<board>.h" for
2556 your board.
2729af9d
WD
25573. If you're porting U-Boot to a new CPU, then also create a new
2558 directory to hold your CPU specific code. Add any files you need.
ab584d67 25594. Run "make <board>_defconfig" with your new name.
2729af9d
WD
25605. Type "make", and you should get a working "u-boot.srec" file
2561 to be installed on your target system.
25626. Debug and solve any problems that might arise.
2563 [Of course, this last step is much harder than it sounds.]
2564
2565
2566Testing of U-Boot Modifications, Ports to New Hardware, etc.:
2567==============================================================
2568
218ca724
WD
2569If you have modified U-Boot sources (for instance added a new board
2570or support for new devices, a new CPU, etc.) you are expected to
2729af9d 2571provide feedback to the other developers. The feedback normally takes
32f2ca2a 2572the form of a "patch", i.e. a context diff against a certain (latest
218ca724 2573official or latest in the git repository) version of U-Boot sources.
2729af9d 2574
218ca724
WD
2575But before you submit such a patch, please verify that your modifi-
2576cation did not break existing code. At least make sure that *ALL* of
2729af9d 2577the supported boards compile WITHOUT ANY compiler warnings. To do so,
6de80f21
SG
2578just run the buildman script (tools/buildman/buildman), which will
2579configure and build U-Boot for ALL supported system. Be warned, this
2580will take a while. Please see the buildman README, or run 'buildman -H'
2581for documentation.
baf31249
MB
2582
2583
2729af9d
WD
2584See also "U-Boot Porting Guide" below.
2585
2586
2587Monitor Commands - Overview:
2588============================
2589
2590go - start application at address 'addr'
2591run - run commands in an environment variable
2592bootm - boot application image from memory
2593bootp - boot image via network using BootP/TFTP protocol
44f074c7 2594bootz - boot zImage from memory
2729af9d
WD
2595tftpboot- boot image via network using TFTP protocol
2596 and env variables "ipaddr" and "serverip"
2597 (and eventually "gatewayip")
1fb7cd49 2598tftpput - upload a file via network using TFTP protocol
2729af9d
WD
2599rarpboot- boot image via network using RARP/TFTP protocol
2600diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd'
2601loads - load S-Record file over serial line
2602loadb - load binary file over serial line (kermit mode)
2603md - memory display
2604mm - memory modify (auto-incrementing)
2605nm - memory modify (constant address)
2606mw - memory write (fill)
bdded201 2607ms - memory search
2729af9d
WD
2608cp - memory copy
2609cmp - memory compare
2610crc32 - checksum calculation
0f89c54b 2611i2c - I2C sub-system
2729af9d
WD
2612sspi - SPI utility commands
2613base - print or set address offset
2614printenv- print environment variables
9e9a530a 2615pwm - control pwm channels
2729af9d
WD
2616setenv - set environment variables
2617saveenv - save environment variables to persistent storage
2618protect - enable or disable FLASH write protection
2619erase - erase FLASH memory
2620flinfo - print FLASH memory information
10635afa 2621nand - NAND memory operations (see doc/README.nand)
2729af9d
WD
2622bdinfo - print Board Info structure
2623iminfo - print header information for application image
2624coninfo - print console devices and informations
2625ide - IDE sub-system
2626loop - infinite loop on address range
56523f12 2627loopw - infinite write loop on address range
2729af9d
WD
2628mtest - simple RAM test
2629icache - enable or disable instruction cache
2630dcache - enable or disable data cache
2631reset - Perform RESET of the CPU
2632echo - echo args to console
2633version - print monitor version
2634help - print online help
2635? - alias for 'help'
2636
2637
2638Monitor Commands - Detailed Description:
2639========================================
2640
2641TODO.
2642
2643For now: just type "help <command>".
2644
2645
2729af9d
WD
2646Note for Redundant Ethernet Interfaces:
2647=======================================
c609719b 2648
11ccc33f 2649Some boards come with redundant Ethernet interfaces; U-Boot supports
2729af9d
WD
2650such configurations and is capable of automatic selection of a
2651"working" interface when needed. MAC assignment works as follows:
c609719b 2652
2729af9d
WD
2653Network interfaces are numbered eth0, eth1, eth2, ... Corresponding
2654MAC addresses can be stored in the environment as "ethaddr" (=>eth0),
2655"eth1addr" (=>eth1), "eth2addr", ...
c609719b 2656
2729af9d
WD
2657If the network interface stores some valid MAC address (for instance
2658in SROM), this is used as default address if there is NO correspon-
2659ding setting in the environment; if the corresponding environment
2660variable is set, this overrides the settings in the card; that means:
c609719b 2661
2729af9d
WD
2662o If the SROM has a valid MAC address, and there is no address in the
2663 environment, the SROM's address is used.
c609719b 2664
2729af9d
WD
2665o If there is no valid address in the SROM, and a definition in the
2666 environment exists, then the value from the environment variable is
2667 used.
c609719b 2668
2729af9d
WD
2669o If both the SROM and the environment contain a MAC address, and
2670 both addresses are the same, this MAC address is used.
c609719b 2671
2729af9d
WD
2672o If both the SROM and the environment contain a MAC address, and the
2673 addresses differ, the value from the environment is used and a
2674 warning is printed.
c609719b 2675
2729af9d 2676o If neither SROM nor the environment contain a MAC address, an error
bef1014b
JH
2677 is raised. If CONFIG_NET_RANDOM_ETHADDR is defined, then in this case
2678 a random, locally-assigned MAC is used.
c609719b 2679
ecee9324 2680If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses
c0f40859 2681will be programmed into hardware as part of the initialization process. This
ecee9324
BW
2682may be skipped by setting the appropriate 'ethmacskip' environment variable.
2683The naming convention is as follows:
2684"ethmacskip" (=>eth0), "eth1macskip" (=>eth1) etc.
c609719b 2685
2729af9d
WD
2686Image Formats:
2687==============
c609719b 2688
3310c549
MB
2689U-Boot is capable of booting (and performing other auxiliary operations on)
2690images in two formats:
2691
2692New uImage format (FIT)
2693-----------------------
2694
2695Flexible and powerful format based on Flattened Image Tree -- FIT (similar
2696to Flattened Device Tree). It allows the use of images with multiple
2697components (several kernels, ramdisks, etc.), with contents protected by
2698SHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory.
2699
2700
2701Old uImage format
2702-----------------
2703
2704Old image format is based on binary files which can be basically anything,
2705preceded by a special header; see the definitions in include/image.h for
2706details; basically, the header defines the following image properties:
c609719b 2707
2729af9d
WD
2708* Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
2709 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
f5ed9e39 2710 LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
0797e736 2711 Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, INTEGRITY).
daab59ac 2712* Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
afc1ce82 2713 IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
daab59ac 2714 Currently supported: ARM, Intel x86, MIPS, NDS32, Nios II, PowerPC).
2729af9d
WD
2715* Compression Type (uncompressed, gzip, bzip2)
2716* Load Address
2717* Entry Point
2718* Image Name
2719* Image Timestamp
c609719b 2720
2729af9d
WD
2721The header is marked by a special Magic Number, and both the header
2722and the data portions of the image are secured against corruption by
2723CRC32 checksums.
c609719b
WD
2724
2725
2729af9d
WD
2726Linux Support:
2727==============
c609719b 2728
2729af9d
WD
2729Although U-Boot should support any OS or standalone application
2730easily, the main focus has always been on Linux during the design of
2731U-Boot.
c609719b 2732
2729af9d
WD
2733U-Boot includes many features that so far have been part of some
2734special "boot loader" code within the Linux kernel. Also, any
2735"initrd" images to be used are no longer part of one big Linux image;
2736instead, kernel and "initrd" are separate images. This implementation
2737serves several purposes:
c609719b 2738
2729af9d
WD
2739- the same features can be used for other OS or standalone
2740 applications (for instance: using compressed images to reduce the
2741 Flash memory footprint)
c609719b 2742
2729af9d
WD
2743- it becomes much easier to port new Linux kernel versions because
2744 lots of low-level, hardware dependent stuff are done by U-Boot
c609719b 2745
2729af9d
WD
2746- the same Linux kernel image can now be used with different "initrd"
2747 images; of course this also means that different kernel images can
2748 be run with the same "initrd". This makes testing easier (you don't
2749 have to build a new "zImage.initrd" Linux image when you just
2750 change a file in your "initrd"). Also, a field-upgrade of the
2751 software is easier now.
c609719b 2752
c609719b 2753
2729af9d
WD
2754Linux HOWTO:
2755============
c609719b 2756
2729af9d
WD
2757Porting Linux to U-Boot based systems:
2758---------------------------------------
c609719b 2759
2729af9d
WD
2760U-Boot cannot save you from doing all the necessary modifications to
2761configure the Linux device drivers for use with your target hardware
2762(no, we don't intend to provide a full virtual machine interface to
2763Linux :-).
c609719b 2764
a47a12be 2765But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot).
24ee89b9 2766
2729af9d
WD
2767Just make sure your machine specific header file (for instance
2768include/asm-ppc/tqm8xx.h) includes the same definition of the Board
1dc30693
MH
2769Information structure as we define in include/asm-<arch>/u-boot.h,
2770and make sure that your definition of IMAP_ADDR uses the same value
6d0f6bcf 2771as your U-Boot configuration in CONFIG_SYS_IMMR.
24ee89b9 2772
2eb31b13
SG
2773Note that U-Boot now has a driver model, a unified model for drivers.
2774If you are adding a new driver, plumb it into driver model. If there
2775is no uclass available, you are encouraged to create one. See
2776doc/driver-model.
2777
c609719b 2778
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WD
2779Configuring the Linux kernel:
2780-----------------------------
c609719b 2781
2729af9d
WD
2782No specific requirements for U-Boot. Make sure you have some root
2783device (initial ramdisk, NFS) for your target system.
2784
2785
2786Building a Linux Image:
2787-----------------------
c609719b 2788
2729af9d
WD
2789With U-Boot, "normal" build targets like "zImage" or "bzImage" are
2790not used. If you use recent kernel source, a new build target
2791"uImage" will exist which automatically builds an image usable by
2792U-Boot. Most older kernels also have support for a "pImage" target,
2793which was introduced for our predecessor project PPCBoot and uses a
2794100% compatible format.
2795
2796Example:
2797
ab584d67 2798 make TQM850L_defconfig
2729af9d
WD
2799 make oldconfig
2800 make dep
2801 make uImage
2802
2803The "uImage" build target uses a special tool (in 'tools/mkimage') to
2804encapsulate a compressed Linux kernel image with header information,
2805CRC32 checksum etc. for use with U-Boot. This is what we are doing:
2806
2807* build a standard "vmlinux" kernel image (in ELF binary format):
2808
2809* convert the kernel into a raw binary image:
2810
2811 ${CROSS_COMPILE}-objcopy -O binary \
2812 -R .note -R .comment \
2813 -S vmlinux linux.bin
2814
2815* compress the binary image:
2816
2817 gzip -9 linux.bin
2818
2819* package compressed binary image for U-Boot:
2820
2821 mkimage -A ppc -O linux -T kernel -C gzip \
2822 -a 0 -e 0 -n "Linux Kernel Image" \
2823 -d linux.bin.gz uImage
c609719b 2824
c609719b 2825
2729af9d
WD
2826The "mkimage" tool can also be used to create ramdisk images for use
2827with U-Boot, either separated from the Linux kernel image, or
2828combined into one file. "mkimage" encapsulates the images with a 64
2829byte header containing information about target architecture,
2830operating system, image type, compression method, entry points, time
2831stamp, CRC32 checksums, etc.
2832
2833"mkimage" can be called in two ways: to verify existing images and
2834print the header information, or to build new images.
2835
2836In the first form (with "-l" option) mkimage lists the information
2837contained in the header of an existing U-Boot image; this includes
2838checksum verification:
c609719b 2839
2729af9d
WD
2840 tools/mkimage -l image
2841 -l ==> list image header information
2842
2843The second form (with "-d" option) is used to build a U-Boot image
2844from a "data file" which is used as image payload:
2845
2846 tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \
2847 -n name -d data_file image
2848 -A ==> set architecture to 'arch'
2849 -O ==> set operating system to 'os'
2850 -T ==> set image type to 'type'
2851 -C ==> set compression type 'comp'
2852 -a ==> set load address to 'addr' (hex)
2853 -e ==> set entry point to 'ep' (hex)
2854 -n ==> set image name to 'name'
2855 -d ==> use image data from 'datafile'
2856
69459791
WD
2857Right now, all Linux kernels for PowerPC systems use the same load
2858address (0x00000000), but the entry point address depends on the
2859kernel version:
2729af9d
WD
2860
2861- 2.2.x kernels have the entry point at 0x0000000C,
2862- 2.3.x and later kernels have the entry point at 0x00000000.
2863
2864So a typical call to build a U-Boot image would read:
2865
2866 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
2867 > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
a47a12be 2868 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \
2729af9d
WD
2869 > examples/uImage.TQM850L
2870 Image Name: 2.4.4 kernel for TQM850L
2871 Created: Wed Jul 19 02:34:59 2000
2872 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2873 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
2874 Load Address: 0x00000000
2875 Entry Point: 0x00000000
2876
2877To verify the contents of the image (or check for corruption):
2878
2879 -> tools/mkimage -l examples/uImage.TQM850L
2880 Image Name: 2.4.4 kernel for TQM850L
2881 Created: Wed Jul 19 02:34:59 2000
2882 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2883 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
2884 Load Address: 0x00000000
2885 Entry Point: 0x00000000
2886
2887NOTE: for embedded systems where boot time is critical you can trade
2888speed for memory and install an UNCOMPRESSED image instead: this
2889needs more space in Flash, but boots much faster since it does not
2890need to be uncompressed:
2891
a47a12be 2892 -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz
2729af9d
WD
2893 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
2894 > -A ppc -O linux -T kernel -C none -a 0 -e 0 \
a47a12be 2895 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \
2729af9d
WD
2896 > examples/uImage.TQM850L-uncompressed
2897 Image Name: 2.4.4 kernel for TQM850L
2898 Created: Wed Jul 19 02:34:59 2000
2899 Image Type: PowerPC Linux Kernel Image (uncompressed)
2900 Data Size: 792160 Bytes = 773.59 kB = 0.76 MB
2901 Load Address: 0x00000000
2902 Entry Point: 0x00000000
2903
2904
2905Similar you can build U-Boot images from a 'ramdisk.image.gz' file
2906when your kernel is intended to use an initial ramdisk:
2907
2908 -> tools/mkimage -n 'Simple Ramdisk Image' \
2909 > -A ppc -O linux -T ramdisk -C gzip \
2910 > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd
2911 Image Name: Simple Ramdisk Image
2912 Created: Wed Jan 12 14:01:50 2000
2913 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
2914 Data Size: 566530 Bytes = 553.25 kB = 0.54 MB
2915 Load Address: 0x00000000
2916 Entry Point: 0x00000000
2917
e157a111
TH
2918The "dumpimage" tool can be used to disassemble or list the contents of images
2919built by mkimage. See dumpimage's help output (-h) for details.
2729af9d
WD
2920
2921Installing a Linux Image:
2922-------------------------
2923
2924To downloading a U-Boot image over the serial (console) interface,
2925you must convert the image to S-Record format:
2926
2927 objcopy -I binary -O srec examples/image examples/image.srec
2928
2929The 'objcopy' does not understand the information in the U-Boot
2930image header, so the resulting S-Record file will be relative to
2931address 0x00000000. To load it to a given address, you need to
2932specify the target address as 'offset' parameter with the 'loads'
2933command.
2934
2935Example: install the image to address 0x40100000 (which on the
2936TQM8xxL is in the first Flash bank):
2937
2938 => erase 40100000 401FFFFF
2939
2940 .......... done
2941 Erased 8 sectors
2942
2943 => loads 40100000
2944 ## Ready for S-Record download ...
2945 ~>examples/image.srec
2946 1 2 3 4 5 6 7 8 9 10 11 12 13 ...
2947 ...
2948 15989 15990 15991 15992
2949 [file transfer complete]
2950 [connected]
2951 ## Start Addr = 0x00000000
2952
2953
2954You can check the success of the download using the 'iminfo' command;
218ca724 2955this includes a checksum verification so you can be sure no data
2729af9d
WD
2956corruption happened:
2957
2958 => imi 40100000
2959
2960 ## Checking Image at 40100000 ...
2961 Image Name: 2.2.13 for initrd on TQM850L
2962 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2963 Data Size: 335725 Bytes = 327 kB = 0 MB
2964 Load Address: 00000000
2965 Entry Point: 0000000c
2966 Verifying Checksum ... OK
2967
2968
2969Boot Linux:
2970-----------
2971
2972The "bootm" command is used to boot an application that is stored in
2973memory (RAM or Flash). In case of a Linux kernel image, the contents
2974of the "bootargs" environment variable is passed to the kernel as
2975parameters. You can check and modify this variable using the
2976"printenv" and "setenv" commands:
2977
2978
2979 => printenv bootargs
2980 bootargs=root=/dev/ram
2981
2982 => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
2983
2984 => printenv bootargs
2985 bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
2986
2987 => bootm 40020000
2988 ## Booting Linux kernel at 40020000 ...
2989 Image Name: 2.2.13 for NFS on TQM850L
2990 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2991 Data Size: 381681 Bytes = 372 kB = 0 MB
2992 Load Address: 00000000
2993 Entry Point: 0000000c
2994 Verifying Checksum ... OK
2995 Uncompressing Kernel Image ... OK
2996 Linux version 2.2.13 ([email protected]) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000
2997 Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
2998 time_init: decrementer frequency = 187500000/60
2999 Calibrating delay loop... 49.77 BogoMIPS
3000 Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
3001 ...
3002
11ccc33f 3003If you want to boot a Linux kernel with initial RAM disk, you pass
2729af9d
WD
3004the memory addresses of both the kernel and the initrd image (PPBCOOT
3005format!) to the "bootm" command:
3006
3007 => imi 40100000 40200000
3008
3009 ## Checking Image at 40100000 ...
3010 Image Name: 2.2.13 for initrd on TQM850L
3011 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3012 Data Size: 335725 Bytes = 327 kB = 0 MB
3013 Load Address: 00000000
3014 Entry Point: 0000000c
3015 Verifying Checksum ... OK
3016
3017 ## Checking Image at 40200000 ...
3018 Image Name: Simple Ramdisk Image
3019 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
3020 Data Size: 566530 Bytes = 553 kB = 0 MB
3021 Load Address: 00000000
3022 Entry Point: 00000000
3023 Verifying Checksum ... OK
3024
3025 => bootm 40100000 40200000
3026 ## Booting Linux kernel at 40100000 ...
3027 Image Name: 2.2.13 for initrd on TQM850L
3028 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3029 Data Size: 335725 Bytes = 327 kB = 0 MB
3030 Load Address: 00000000
3031 Entry Point: 0000000c
3032 Verifying Checksum ... OK
3033 Uncompressing Kernel Image ... OK
3034 ## Loading RAMDisk Image at 40200000 ...
3035 Image Name: Simple Ramdisk Image
3036 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
3037 Data Size: 566530 Bytes = 553 kB = 0 MB
3038 Load Address: 00000000
3039 Entry Point: 00000000
3040 Verifying Checksum ... OK
3041 Loading Ramdisk ... OK
3042 Linux version 2.2.13 ([email protected]) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000
3043 Boot arguments: root=/dev/ram
3044 time_init: decrementer frequency = 187500000/60
3045 Calibrating delay loop... 49.77 BogoMIPS
3046 ...
3047 RAMDISK: Compressed image found at block 0
3048 VFS: Mounted root (ext2 filesystem).
3049
3050 bash#
3051
0267768e
MM
3052Boot Linux and pass a flat device tree:
3053-----------
3054
3055First, U-Boot must be compiled with the appropriate defines. See the section
3056titled "Linux Kernel Interface" above for a more in depth explanation. The
3057following is an example of how to start a kernel and pass an updated
3058flat device tree:
3059
3060=> print oftaddr
3061oftaddr=0x300000
3062=> print oft
3063oft=oftrees/mpc8540ads.dtb
3064=> tftp $oftaddr $oft
3065Speed: 1000, full duplex
3066Using TSEC0 device
3067TFTP from server 192.168.1.1; our IP address is 192.168.1.101
3068Filename 'oftrees/mpc8540ads.dtb'.
3069Load address: 0x300000
3070Loading: #
3071done
3072Bytes transferred = 4106 (100a hex)
3073=> tftp $loadaddr $bootfile
3074Speed: 1000, full duplex
3075Using TSEC0 device
3076TFTP from server 192.168.1.1; our IP address is 192.168.1.2
3077Filename 'uImage'.
3078Load address: 0x200000
3079Loading:############
3080done
3081Bytes transferred = 1029407 (fb51f hex)
3082=> print loadaddr
3083loadaddr=200000
3084=> print oftaddr
3085oftaddr=0x300000
3086=> bootm $loadaddr - $oftaddr
3087## Booting image at 00200000 ...
a9398e01
WD
3088 Image Name: Linux-2.6.17-dirty
3089 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3090 Data Size: 1029343 Bytes = 1005.2 kB
0267768e 3091 Load Address: 00000000
a9398e01 3092 Entry Point: 00000000
0267768e
MM
3093 Verifying Checksum ... OK
3094 Uncompressing Kernel Image ... OK
3095Booting using flat device tree at 0x300000
3096Using MPC85xx ADS machine description
3097Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb
3098[snip]
3099
3100
2729af9d
WD
3101More About U-Boot Image Types:
3102------------------------------
3103
3104U-Boot supports the following image types:
3105
3106 "Standalone Programs" are directly runnable in the environment
3107 provided by U-Boot; it is expected that (if they behave
3108 well) you can continue to work in U-Boot after return from
3109 the Standalone Program.
3110 "OS Kernel Images" are usually images of some Embedded OS which
3111 will take over control completely. Usually these programs
3112 will install their own set of exception handlers, device
3113 drivers, set up the MMU, etc. - this means, that you cannot
3114 expect to re-enter U-Boot except by resetting the CPU.
3115 "RAMDisk Images" are more or less just data blocks, and their
3116 parameters (address, size) are passed to an OS kernel that is
3117 being started.
3118 "Multi-File Images" contain several images, typically an OS
3119 (Linux) kernel image and one or more data images like
3120 RAMDisks. This construct is useful for instance when you want
3121 to boot over the network using BOOTP etc., where the boot
3122 server provides just a single image file, but you want to get
3123 for instance an OS kernel and a RAMDisk image.
3124
3125 "Multi-File Images" start with a list of image sizes, each
3126 image size (in bytes) specified by an "uint32_t" in network
3127 byte order. This list is terminated by an "(uint32_t)0".
3128 Immediately after the terminating 0 follow the images, one by
3129 one, all aligned on "uint32_t" boundaries (size rounded up to
3130 a multiple of 4 bytes).
3131
3132 "Firmware Images" are binary images containing firmware (like
3133 U-Boot or FPGA images) which usually will be programmed to
3134 flash memory.
3135
3136 "Script files" are command sequences that will be executed by
3137 U-Boot's command interpreter; this feature is especially
3138 useful when you configure U-Boot to use a real shell (hush)
3139 as command interpreter.
3140
44f074c7
MV
3141Booting the Linux zImage:
3142-------------------------
3143
3144On some platforms, it's possible to boot Linux zImage. This is done
3145using the "bootz" command. The syntax of "bootz" command is the same
3146as the syntax of "bootm" command.
3147
8ac28563 3148Note, defining the CONFIG_SUPPORT_RAW_INITRD allows user to supply
017e1f3f
MV
3149kernel with raw initrd images. The syntax is slightly different, the
3150address of the initrd must be augmented by it's size, in the following
3151format: "<initrd addres>:<initrd size>".
3152
2729af9d
WD
3153
3154Standalone HOWTO:
3155=================
3156
3157One of the features of U-Boot is that you can dynamically load and
3158run "standalone" applications, which can use some resources of
3159U-Boot like console I/O functions or interrupt services.
3160
3161Two simple examples are included with the sources:
3162
3163"Hello World" Demo:
3164-------------------
3165
3166'examples/hello_world.c' contains a small "Hello World" Demo
3167application; it is automatically compiled when you build U-Boot.
3168It's configured to run at address 0x00040004, so you can play with it
3169like that:
3170
3171 => loads
3172 ## Ready for S-Record download ...
3173 ~>examples/hello_world.srec
3174 1 2 3 4 5 6 7 8 9 10 11 ...
3175 [file transfer complete]
3176 [connected]
3177 ## Start Addr = 0x00040004
3178
3179 => go 40004 Hello World! This is a test.
3180 ## Starting application at 0x00040004 ...
3181 Hello World
3182 argc = 7
3183 argv[0] = "40004"
3184 argv[1] = "Hello"
3185 argv[2] = "World!"
3186 argv[3] = "This"
3187 argv[4] = "is"
3188 argv[5] = "a"
3189 argv[6] = "test."
3190 argv[7] = "<NULL>"
3191 Hit any key to exit ...
3192
3193 ## Application terminated, rc = 0x0
3194
3195Another example, which demonstrates how to register a CPM interrupt
3196handler with the U-Boot code, can be found in 'examples/timer.c'.
3197Here, a CPM timer is set up to generate an interrupt every second.
3198The interrupt service routine is trivial, just printing a '.'
3199character, but this is just a demo program. The application can be
3200controlled by the following keys:
3201
3202 ? - print current values og the CPM Timer registers
3203 b - enable interrupts and start timer
3204 e - stop timer and disable interrupts
3205 q - quit application
3206
3207 => loads
3208 ## Ready for S-Record download ...
3209 ~>examples/timer.srec
3210 1 2 3 4 5 6 7 8 9 10 11 ...
3211 [file transfer complete]
3212 [connected]
3213 ## Start Addr = 0x00040004
3214
3215 => go 40004
3216 ## Starting application at 0x00040004 ...
3217 TIMERS=0xfff00980
3218 Using timer 1
3219 tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0
3220
3221Hit 'b':
3222 [q, b, e, ?] Set interval 1000000 us
3223 Enabling timer
3224Hit '?':
3225 [q, b, e, ?] ........
3226 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
3227Hit '?':
3228 [q, b, e, ?] .
3229 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
3230Hit '?':
3231 [q, b, e, ?] .
3232 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
3233Hit '?':
3234 [q, b, e, ?] .
3235 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0
3236Hit 'e':
3237 [q, b, e, ?] ...Stopping timer
3238Hit 'q':
3239 [q, b, e, ?] ## Application terminated, rc = 0x0
3240
3241
3242Minicom warning:
3243================
3244
3245Over time, many people have reported problems when trying to use the
3246"minicom" terminal emulation program for serial download. I (wd)
3247consider minicom to be broken, and recommend not to use it. Under
3248Unix, I recommend to use C-Kermit for general purpose use (and
3249especially for kermit binary protocol download ("loadb" command), and
e53515a2 3250use "cu" for S-Record download ("loads" command). See
047f6ec0 3251https://www.denx.de/wiki/view/DULG/SystemSetup#Section_4.3.
e53515a2
KP
3252for help with kermit.
3253
2729af9d
WD
3254
3255Nevertheless, if you absolutely want to use it try adding this
3256configuration to your "File transfer protocols" section:
3257
3258 Name Program Name U/D FullScr IO-Red. Multi
3259 X kermit /usr/bin/kermit -i -l %l -s Y U Y N N
3260 Y kermit /usr/bin/kermit -i -l %l -r N D Y N N
3261
3262
3263NetBSD Notes:
3264=============
3265
3266Starting at version 0.9.2, U-Boot supports NetBSD both as host
3267(build U-Boot) and target system (boots NetBSD/mpc8xx).
3268
3269Building requires a cross environment; it is known to work on
3270NetBSD/i386 with the cross-powerpc-netbsd-1.3 package (you will also
3271need gmake since the Makefiles are not compatible with BSD make).
3272Note that the cross-powerpc package does not install include files;
3273attempting to build U-Boot will fail because <machine/ansi.h> is
3274missing. This file has to be installed and patched manually:
3275
3276 # cd /usr/pkg/cross/powerpc-netbsd/include
3277 # mkdir powerpc
3278 # ln -s powerpc machine
3279 # cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h
3280 # ${EDIT} powerpc/ansi.h ## must remove __va_list, _BSD_VA_LIST
3281
3282Native builds *don't* work due to incompatibilities between native
3283and U-Boot include files.
3284
3285Booting assumes that (the first part of) the image booted is a
3286stage-2 loader which in turn loads and then invokes the kernel
3287proper. Loader sources will eventually appear in the NetBSD source
3288tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the
2a8af187 3289meantime, see ftp://ftp.denx.de/pub/u-boot/ppcboot_stage2.tar.gz
2729af9d
WD
3290
3291
3292Implementation Internals:
3293=========================
3294
3295The following is not intended to be a complete description of every
3296implementation detail. However, it should help to understand the
3297inner workings of U-Boot and make it easier to port it to custom
3298hardware.
3299
3300
3301Initial Stack, Global Data:
3302---------------------------
3303
3304The implementation of U-Boot is complicated by the fact that U-Boot
3305starts running out of ROM (flash memory), usually without access to
3306system RAM (because the memory controller is not initialized yet).
3307This means that we don't have writable Data or BSS segments, and BSS
3308is not initialized as zero. To be able to get a C environment working
3309at all, we have to allocate at least a minimal stack. Implementation
3310options for this are defined and restricted by the CPU used: Some CPU
3311models provide on-chip memory (like the IMMR area on MPC8xx and
3312MPC826x processors), on others (parts of) the data cache can be
3313locked as (mis-) used as memory, etc.
3314
218ca724 3315 Chris Hallinan posted a good summary of these issues to the
0668236b 3316 U-Boot mailing list:
2729af9d
WD
3317
3318 Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
3319 From: "Chris Hallinan" <[email protected]>
3320 Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET)
3321 ...
3322
3323 Correct me if I'm wrong, folks, but the way I understand it
3324 is this: Using DCACHE as initial RAM for Stack, etc, does not
3325 require any physical RAM backing up the cache. The cleverness
3326 is that the cache is being used as a temporary supply of
3327 necessary storage before the SDRAM controller is setup. It's
11ccc33f 3328 beyond the scope of this list to explain the details, but you
2729af9d
WD
3329 can see how this works by studying the cache architecture and
3330 operation in the architecture and processor-specific manuals.
3331
3332 OCM is On Chip Memory, which I believe the 405GP has 4K. It
3333 is another option for the system designer to use as an
11ccc33f 3334 initial stack/RAM area prior to SDRAM being available. Either
2729af9d
WD
3335 option should work for you. Using CS 4 should be fine if your
3336 board designers haven't used it for something that would
3337 cause you grief during the initial boot! It is frequently not
3338 used.
3339
6d0f6bcf 3340 CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere
2729af9d
WD
3341 with your processor/board/system design. The default value
3342 you will find in any recent u-boot distribution in
8a316c9b 3343 walnut.h should work for you. I'd set it to a value larger
2729af9d
WD
3344 than your SDRAM module. If you have a 64MB SDRAM module, set
3345 it above 400_0000. Just make sure your board has no resources
3346 that are supposed to respond to that address! That code in
3347 start.S has been around a while and should work as is when
3348 you get the config right.
3349
3350 -Chris Hallinan
3351 DS4.COM, Inc.
3352
3353It is essential to remember this, since it has some impact on the C
3354code for the initialization procedures:
3355
3356* Initialized global data (data segment) is read-only. Do not attempt
3357 to write it.
3358
b445bbb4 3359* Do not use any uninitialized global data (or implicitly initialized
2729af9d
WD
3360 as zero data - BSS segment) at all - this is undefined, initiali-
3361 zation is performed later (when relocating to RAM).
3362
3363* Stack space is very limited. Avoid big data buffers or things like
3364 that.
3365
3366Having only the stack as writable memory limits means we cannot use
b445bbb4 3367normal global data to share information between the code. But it
2729af9d
WD
3368turned out that the implementation of U-Boot can be greatly
3369simplified by making a global data structure (gd_t) available to all
3370functions. We could pass a pointer to this data as argument to _all_
3371functions, but this would bloat the code. Instead we use a feature of
3372the GCC compiler (Global Register Variables) to share the data: we
3373place a pointer (gd) to the global data into a register which we
3374reserve for this purpose.
3375
3376When choosing a register for such a purpose we are restricted by the
3377relevant (E)ABI specifications for the current architecture, and by
3378GCC's implementation.
3379
3380For PowerPC, the following registers have specific use:
3381 R1: stack pointer
e7670f6c 3382 R2: reserved for system use
2729af9d
WD
3383 R3-R4: parameter passing and return values
3384 R5-R10: parameter passing
3385 R13: small data area pointer
3386 R30: GOT pointer
3387 R31: frame pointer
3388
e6bee808
JT
3389 (U-Boot also uses R12 as internal GOT pointer. r12
3390 is a volatile register so r12 needs to be reset when
3391 going back and forth between asm and C)
2729af9d 3392
e7670f6c 3393 ==> U-Boot will use R2 to hold a pointer to the global data
2729af9d
WD
3394
3395 Note: on PPC, we could use a static initializer (since the
3396 address of the global data structure is known at compile time),
3397 but it turned out that reserving a register results in somewhat
3398 smaller code - although the code savings are not that big (on
3399 average for all boards 752 bytes for the whole U-Boot image,
3400 624 text + 127 data).
3401
3402On ARM, the following registers are used:
3403
3404 R0: function argument word/integer result
3405 R1-R3: function argument word
12eba1b4
JH
3406 R9: platform specific
3407 R10: stack limit (used only if stack checking is enabled)
2729af9d
WD
3408 R11: argument (frame) pointer
3409 R12: temporary workspace
3410 R13: stack pointer
3411 R14: link register
3412 R15: program counter
3413
12eba1b4
JH
3414 ==> U-Boot will use R9 to hold a pointer to the global data
3415
3416 Note: on ARM, only R_ARM_RELATIVE relocations are supported.
2729af9d 3417
0df01fd3 3418On Nios II, the ABI is documented here:
047f6ec0 3419 https://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf
0df01fd3
TC
3420
3421 ==> U-Boot will use gp to hold a pointer to the global data
3422
3423 Note: on Nios II, we give "-G0" option to gcc and don't use gp
3424 to access small data sections, so gp is free.
3425
afc1ce82
ML
3426On NDS32, the following registers are used:
3427
3428 R0-R1: argument/return
3429 R2-R5: argument
3430 R15: temporary register for assembler
3431 R16: trampoline register
3432 R28: frame pointer (FP)
3433 R29: global pointer (GP)
3434 R30: link register (LP)
3435 R31: stack pointer (SP)
3436 PC: program counter (PC)
3437
3438 ==> U-Boot will use R10 to hold a pointer to the global data
3439
d87080b7
WD
3440NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
3441or current versions of GCC may "optimize" the code too much.
2729af9d 3442
3fafced7
RC
3443On RISC-V, the following registers are used:
3444
3445 x0: hard-wired zero (zero)
3446 x1: return address (ra)
3447 x2: stack pointer (sp)
3448 x3: global pointer (gp)
3449 x4: thread pointer (tp)
3450 x5: link register (t0)
3451 x8: frame pointer (fp)
3452 x10-x11: arguments/return values (a0-1)
3453 x12-x17: arguments (a2-7)
3454 x28-31: temporaries (t3-6)
3455 pc: program counter (pc)
3456
3457 ==> U-Boot will use gp to hold a pointer to the global data
3458
2729af9d
WD
3459Memory Management:
3460------------------
3461
3462U-Boot runs in system state and uses physical addresses, i.e. the
3463MMU is not used either for address mapping nor for memory protection.
3464
3465The available memory is mapped to fixed addresses using the memory
3466controller. In this process, a contiguous block is formed for each
3467memory type (Flash, SDRAM, SRAM), even when it consists of several
3468physical memory banks.
3469
3470U-Boot is installed in the first 128 kB of the first Flash bank (on
3471TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
3472booting and sizing and initializing DRAM, the code relocates itself
3473to the upper end of DRAM. Immediately below the U-Boot code some
6d0f6bcf 3474memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN
2729af9d
WD
3475configuration setting]. Below that, a structure with global Board
3476Info data is placed, followed by the stack (growing downward).
3477
3478Additionally, some exception handler code is copied to the low 8 kB
3479of DRAM (0x00000000 ... 0x00001FFF).
3480
3481So a typical memory configuration with 16 MB of DRAM could look like
3482this:
3483
3484 0x0000 0000 Exception Vector code
3485 :
3486 0x0000 1FFF
3487 0x0000 2000 Free for Application Use
3488 :
3489 :
3490
3491 :
3492 :
3493 0x00FB FF20 Monitor Stack (Growing downward)
3494 0x00FB FFAC Board Info Data and permanent copy of global data
3495 0x00FC 0000 Malloc Arena
3496 :
3497 0x00FD FFFF
3498 0x00FE 0000 RAM Copy of Monitor Code
3499 ... eventually: LCD or video framebuffer
3500 ... eventually: pRAM (Protected RAM - unchanged by reset)
3501 0x00FF FFFF [End of RAM]
3502
3503
3504System Initialization:
3505----------------------
c609719b 3506
2729af9d 3507In the reset configuration, U-Boot starts at the reset entry point
11ccc33f 3508(on most PowerPC systems at address 0x00000100). Because of the reset
b445bbb4 3509configuration for CS0# this is a mirror of the on board Flash memory.
2729af9d
WD
3510To be able to re-map memory U-Boot then jumps to its link address.
3511To be able to implement the initialization code in C, a (small!)
3512initial stack is set up in the internal Dual Ported RAM (in case CPUs
2eb48ff7
HS
3513which provide such a feature like), or in a locked part of the data
3514cache. After that, U-Boot initializes the CPU core, the caches and
3515the SIU.
2729af9d
WD
3516
3517Next, all (potentially) available memory banks are mapped using a
3518preliminary mapping. For example, we put them on 512 MB boundaries
3519(multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash
3520on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is
3521programmed for SDRAM access. Using the temporary configuration, a
3522simple memory test is run that determines the size of the SDRAM
3523banks.
3524
3525When there is more than one SDRAM bank, and the banks are of
3526different size, the largest is mapped first. For equal size, the first
3527bank (CS2#) is mapped first. The first mapping is always for address
35280x00000000, with any additional banks following immediately to create
3529contiguous memory starting from 0.
3530
3531Then, the monitor installs itself at the upper end of the SDRAM area
3532and allocates memory for use by malloc() and for the global Board
3533Info data; also, the exception vector code is copied to the low RAM
3534pages, and the final stack is set up.
3535
3536Only after this relocation will you have a "normal" C environment;
3537until that you are restricted in several ways, mostly because you are
3538running from ROM, and because the code will have to be relocated to a
3539new address in RAM.
3540
3541
3542U-Boot Porting Guide:
3543----------------------
c609719b 3544
2729af9d
WD
3545[Based on messages by Jerry Van Baren in the U-Boot-Users mailing
3546list, October 2002]
c609719b
WD
3547
3548
6c3fef28 3549int main(int argc, char *argv[])
2729af9d
WD
3550{
3551 sighandler_t no_more_time;
c609719b 3552
6c3fef28
JVB
3553 signal(SIGALRM, no_more_time);
3554 alarm(PROJECT_DEADLINE - toSec (3 * WEEK));
c609719b 3555
2729af9d 3556 if (available_money > available_manpower) {
6c3fef28 3557 Pay consultant to port U-Boot;
c609719b
WD
3558 return 0;
3559 }
3560
2729af9d
WD
3561 Download latest U-Boot source;
3562
0668236b 3563 Subscribe to u-boot mailing list;
2729af9d 3564
6c3fef28
JVB
3565 if (clueless)
3566 email("Hi, I am new to U-Boot, how do I get started?");
2729af9d
WD
3567
3568 while (learning) {
3569 Read the README file in the top level directory;
047f6ec0 3570 Read https://www.denx.de/wiki/bin/view/DULG/Manual;
24bcaec7 3571 Read applicable doc/README.*;
2729af9d 3572 Read the source, Luke;
6c3fef28 3573 /* find . -name "*.[chS]" | xargs grep -i <keyword> */
2729af9d
WD
3574 }
3575
6c3fef28
JVB
3576 if (available_money > toLocalCurrency ($2500))
3577 Buy a BDI3000;
3578 else
2729af9d 3579 Add a lot of aggravation and time;
2729af9d 3580
6c3fef28
JVB
3581 if (a similar board exists) { /* hopefully... */
3582 cp -a board/<similar> board/<myboard>
3583 cp include/configs/<similar>.h include/configs/<myboard>.h
3584 } else {
3585 Create your own board support subdirectory;
3586 Create your own board include/configs/<myboard>.h file;
3587 }
3588 Edit new board/<myboard> files
3589 Edit new include/configs/<myboard>.h
3590
3591 while (!accepted) {
3592 while (!running) {
3593 do {
3594 Add / modify source code;
3595 } until (compiles);
3596 Debug;
3597 if (clueless)
3598 email("Hi, I am having problems...");
3599 }
3600 Send patch file to the U-Boot email list;
3601 if (reasonable critiques)
3602 Incorporate improvements from email list code review;
3603 else
3604 Defend code as written;
2729af9d 3605 }
2729af9d
WD
3606
3607 return 0;
3608}
3609
3610void no_more_time (int sig)
3611{
3612 hire_a_guru();
3613}
3614
c609719b 3615
2729af9d
WD
3616Coding Standards:
3617-----------------
c609719b 3618
2729af9d 3619All contributions to U-Boot should conform to the Linux kernel
659208da
BS
3620coding style; see the kernel coding style guide at
3621https://www.kernel.org/doc/html/latest/process/coding-style.html, and the
3622script "scripts/Lindent" in your Linux kernel source directory.
2c051651
DZ
3623
3624Source files originating from a different project (for example the
3625MTD subsystem) are generally exempt from these guidelines and are not
b445bbb4 3626reformatted to ease subsequent migration to newer versions of those
2c051651
DZ
3627sources.
3628
3629Please note that U-Boot is implemented in C (and to some small parts in
3630Assembler); no C++ is used, so please do not use C++ style comments (//)
3631in your code.
c609719b 3632
2729af9d
WD
3633Please also stick to the following formatting rules:
3634- remove any trailing white space
7ca9296e 3635- use TAB characters for indentation and vertical alignment, not spaces
2729af9d 3636- make sure NOT to use DOS '\r\n' line feeds
7ca9296e 3637- do not add more than 2 consecutive empty lines to source files
2729af9d 3638- do not add trailing empty lines to source files
180d3f74 3639
2729af9d
WD
3640Submissions which do not conform to the standards may be returned
3641with a request to reformat the changes.
c609719b
WD
3642
3643
2729af9d
WD
3644Submitting Patches:
3645-------------------
c609719b 3646
2729af9d
WD
3647Since the number of patches for U-Boot is growing, we need to
3648establish some rules. Submissions which do not conform to these rules
3649may be rejected, even when they contain important and valuable stuff.
c609719b 3650
047f6ec0 3651Please see https://www.denx.de/wiki/U-Boot/Patches for details.
218ca724 3652
0668236b 3653Patches shall be sent to the u-boot mailing list <[email protected]>;
1dade18e 3654see https://lists.denx.de/listinfo/u-boot
0668236b 3655
2729af9d
WD
3656When you send a patch, please include the following information with
3657it:
c609719b 3658
2729af9d
WD
3659* For bug fixes: a description of the bug and how your patch fixes
3660 this bug. Please try to include a way of demonstrating that the
3661 patch actually fixes something.
c609719b 3662
2729af9d
WD
3663* For new features: a description of the feature and your
3664 implementation.
c609719b 3665
7207b366
RD
3666* For major contributions, add a MAINTAINERS file with your
3667 information and associated file and directory references.
c609719b 3668
27af930e
AA
3669* When you add support for a new board, don't forget to add a
3670 maintainer e-mail address to the boards.cfg file, too.
c609719b 3671
2729af9d
WD
3672* If your patch adds new configuration options, don't forget to
3673 document these in the README file.
c609719b 3674
218ca724
WD
3675* The patch itself. If you are using git (which is *strongly*
3676 recommended) you can easily generate the patch using the
7ca9296e 3677 "git format-patch". If you then use "git send-email" to send it to
218ca724
WD
3678 the U-Boot mailing list, you will avoid most of the common problems
3679 with some other mail clients.
3680
3681 If you cannot use git, use "diff -purN OLD NEW". If your version of
3682 diff does not support these options, then get the latest version of
3683 GNU diff.
c609719b 3684
218ca724
WD
3685 The current directory when running this command shall be the parent
3686 directory of the U-Boot source tree (i. e. please make sure that
3687 your patch includes sufficient directory information for the
3688 affected files).
6dff5529 3689
218ca724
WD
3690 We prefer patches as plain text. MIME attachments are discouraged,
3691 and compressed attachments must not be used.
c609719b 3692
2729af9d
WD
3693* If one logical set of modifications affects or creates several
3694 files, all these changes shall be submitted in a SINGLE patch file.
52f52c14 3695
2729af9d
WD
3696* Changesets that contain different, unrelated modifications shall be
3697 submitted as SEPARATE patches, one patch per changeset.
8bde7f77 3698
52f52c14 3699
2729af9d 3700Notes:
c609719b 3701
6de80f21 3702* Before sending the patch, run the buildman script on your patched
2729af9d
WD
3703 source tree and make sure that no errors or warnings are reported
3704 for any of the boards.
c609719b 3705
2729af9d
WD
3706* Keep your modifications to the necessary minimum: A patch
3707 containing several unrelated changes or arbitrary reformats will be
3708 returned with a request to re-formatting / split it.
c609719b 3709
2729af9d
WD
3710* If you modify existing code, make sure that your new code does not
3711 add to the memory footprint of the code ;-) Small is beautiful!
3712 When adding new features, these should compile conditionally only
3713 (using #ifdef), and the resulting code with the new feature
3714 disabled must not need more memory than the old code without your
3715 modification.
90dc6704 3716
0668236b
WD
3717* Remember that there is a size limit of 100 kB per message on the
3718 u-boot mailing list. Bigger patches will be moderated. If they are
3719 reasonable and not too big, they will be acknowledged. But patches
3720 bigger than the size limit should be avoided.
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