[J-u-boot.git] / include / mpc86xx.h

/*
 * Copyright 2006 Freescale Semiconductor.
 * Jeffrey Brown
 * Srikanth Srinivasan ([email protected])
 */

#ifndef	__MPC86xx_H__
#define __MPC86xx_H__

#define EXC_OFF_SYS_RESET	0x0100	/* System reset	offset */

/*
 * l2cr values.  Look in config_<BOARD>.h for the actual setup
 */
#define l2cr		 1017

#define L2CR_L2E         0x80000000 /* bit 0 - enable */
#define L2CR_L2PE        0x40000000 /* bit 1 - data parity */
#define L2CR_L2I         0x00200000 /* bit 10 - global invalidate bit */
#define L2CR_L2CTL       0x00100000 /* bit 11 - l2 ram control */
#define L2CR_L2DO        0x00010000 /* bit 15 - data-only mode */
#define L2CR_REP         0x00001000 /* bit 19 - l2 replacement alg */
#define L2CR_HWF         0x00000800 /* bit 20 - hardware flush */
#define L2CR_L2IP        0x00000001 /* global invalidate in progress */

/*
 * BAT settings.  Look in config_<BOARD>.h for the actual setup
 */

#define BATU_BL_128K            0x00000000
#define BATU_BL_256K            0x00000004
#define BATU_BL_512K            0x0000000c
#define BATU_BL_1M              0x0000001c
#define BATU_BL_2M              0x0000003c
#define BATU_BL_4M              0x0000007c
#define BATU_BL_8M              0x000000fc
#define BATU_BL_16M             0x000001fc
#define BATU_BL_32M             0x000003fc
#define BATU_BL_64M             0x000007fc
#define BATU_BL_128M            0x00000ffc
#define BATU_BL_256M            0x00001ffc
#define BATU_BL_512M            0x00003ffc
#define BATU_BL_1G              0x00007ffc
#define BATU_BL_2G              0x0000fffc
#define BATU_BL_4G              0x0001fffc

#define BATU_VS                 0x00000002
#define BATU_VP                 0x00000001
#define BATU_INVALID            0x00000000

#define BATL_WRITETHROUGH       0x00000040
#define BATL_CACHEINHIBIT       0x00000020
#define BATL_MEMCOHERENCE	0x00000010
#define BATL_GUARDEDSTORAGE     0x00000008
#define BATL_NO_ACCESS		0x00000000

#define BATL_PP_MSK		0x00000003
#define BATL_PP_00		0x00000000 /* No access */
#define BATL_PP_01		0x00000001 /* Read-only */
#define BATL_PP_10		0x00000002 /* Read-write */
#define BATL_PP_11		0x00000003

#define BATL_PP_NO_ACCESS	BATL_PP_00
#define BATL_PP_RO		BATL_PP_01
#define BATL_PP_RW		BATL_PP_10

#define HID0_XBSEN              0x00000100
#define HID0_HIGH_BAT_EN        0x00800000
#define HID0_XAEN               0x00020000

#ifndef __ASSEMBLY__

typedef struct {
	unsigned long freqProcessor;
	unsigned long freqSystemBus;
} MPC86xx_SYS_INFO;

#define l1icache_enable	icache_enable

void l2cache_enable(void);
void l1dcache_enable(void);

static __inline__ unsigned long get_hid0 (void)
{
	unsigned long hid0;
	asm volatile("mfspr %0, 1008" : "=r" (hid0) :);
	return hid0;
}

static __inline__ unsigned long get_hid1 (void)
{
	unsigned long hid1;
	asm volatile("mfspr %0, 1009" : "=r" (hid1) :);
	return hid1;
}

static __inline__ void set_hid0 (unsigned long hid0)
{
	asm volatile("mtspr 1008, %0" : : "r" (hid0));
}

static __inline__ void set_hid1 (unsigned long hid1)
{
	asm volatile("mtspr 1009, %0" : : "r" (hid1));
}


static __inline__ unsigned long get_l2cr (void)
{
   unsigned long l2cr_val;
   asm volatile("mfspr %0, 1017" : "=r" (l2cr_val) :);
   return l2cr_val;
}

#endif  /* _ASMLANGUAGE */
#endif	/* __MPC86xx_H__ */
Commit	Line	Data
debb7354	1	/*
5c9efb36	2	* Copyright 2006 Freescale Semiconductor.
b93775c2	3	* Jeffrey Brown
debb7354 JL	4	* Srikanth Srinivasan ([email protected])
	5	*/
	6
	7	#ifndef __MPC86xx_H__
	8	#define __MPC86xx_H__
	9
	10	#define EXC_OFF_SYS_RESET 0x0100 /* System reset offset */
	11
5c9efb36	12	/*
debb7354 JL	13	* l2cr values. Look in config_<BOARD>.h for the actual setup
	14	*/
	15	#define l2cr 1017
	16
	17	#define L2CR_L2E 0x80000000 /* bit 0 - enable */
	18	#define L2CR_L2PE 0x40000000 /* bit 1 - data parity */
	19	#define L2CR_L2I 0x00200000 /* bit 10 - global invalidate bit */
	20	#define L2CR_L2CTL 0x00100000 /* bit 11 - l2 ram control */
	21	#define L2CR_L2DO 0x00010000 /* bit 15 - data-only mode */
	22	#define L2CR_REP 0x00001000 /* bit 19 - l2 replacement alg */
	23	#define L2CR_HWF 0x00000800 /* bit 20 - hardware flush */
	24	#define L2CR_L2IP 0x00000001 /* global invalidate in progress */
	25
5c9efb36	26	/*
debb7354 JL	27	* BAT settings. Look in config_<BOARD>.h for the actual setup
	28	*/
	29
	30	#define BATU_BL_128K 0x00000000
	31	#define BATU_BL_256K 0x00000004
	32	#define BATU_BL_512K 0x0000000c
	33	#define BATU_BL_1M 0x0000001c
	34	#define BATU_BL_2M 0x0000003c
	35	#define BATU_BL_4M 0x0000007c
	36	#define BATU_BL_8M 0x000000fc
	37	#define BATU_BL_16M 0x000001fc
	38	#define BATU_BL_32M 0x000003fc
	39	#define BATU_BL_64M 0x000007fc
	40	#define BATU_BL_128M 0x00000ffc
	41	#define BATU_BL_256M 0x00001ffc
	42	#define BATU_BL_512M 0x00003ffc
	43	#define BATU_BL_1G 0x00007ffc
	44	#define BATU_BL_2G 0x0000fffc
	45	#define BATU_BL_4G 0x0001fffc
	46
	47	#define BATU_VS 0x00000002
	48	#define BATU_VP 0x00000001
	49	#define BATU_INVALID 0x00000000
	50
	51	#define BATL_WRITETHROUGH 0x00000040
	52	#define BATL_CACHEINHIBIT 0x00000020
	53	#define BATL_MEMCOHERENCE 0x00000010
	54	#define BATL_GUARDEDSTORAGE 0x00000008
	55	#define BATL_NO_ACCESS 0x00000000
	56
	57	#define BATL_PP_MSK 0x00000003
	58	#define BATL_PP_00 0x00000000 /* No access */
	59	#define BATL_PP_01 0x00000001 /* Read-only */
	60	#define BATL_PP_10 0x00000002 /* Read-write */
	61	#define BATL_PP_11 0x00000003
	62
	63	#define BATL_PP_NO_ACCESS BATL_PP_00
	64	#define BATL_PP_RO BATL_PP_01
	65	#define BATL_PP_RW BATL_PP_10
	66
	67	#define HID0_XBSEN 0x00000100
	68	#define HID0_HIGH_BAT_EN 0x00800000
	69	#define HID0_XAEN 0x00020000
	70
	71	#ifndef __ASSEMBLY__
	72
b93775c2 JL	73	typedef struct {
	74	unsigned long freqProcessor;
	75	unsigned long freqSystemBus;
debb7354 JL	76	} MPC86xx_SYS_INFO;
	77
	78	#define l1icache_enable icache_enable
	79
	80	void l2cache_enable(void);
	81	void l1dcache_enable(void);
	82
	83	static __inline__ unsigned long get_hid0 (void)
	84	{
	85	unsigned long hid0;
	86	asm volatile("mfspr %0, 1008" : "=r" (hid0) :);
	87	return hid0;
	88	}
	89
	90	static __inline__ unsigned long get_hid1 (void)
	91	{
	92	unsigned long hid1;
	93	asm volatile("mfspr %0, 1009" : "=r" (hid1) :);
	94	return hid1;
	95	}
	96
	97	static __inline__ void set_hid0 (unsigned long hid0)
	98	{
	99	asm volatile("mtspr 1008, %0" : : "r" (hid0));
	100	}
	101
	102	static __inline__ void set_hid1 (unsigned long hid1)
	103	{
	104	asm volatile("mtspr 1009, %0" : : "r" (hid1));
	105	}
	106
	107
	108	static __inline__ unsigned long get_l2cr (void)
	109	{
	110	unsigned long l2cr_val;
	111	asm volatile("mfspr %0, 1017" : "=r" (l2cr_val) :);
	112	return l2cr_val;
	113	}
	114
	115	#endif /* _ASMLANGUAGE */
	116	#endif /* __MPC86xx_H__ */