[J-u-boot.git] / cmd / bdinfo.c

/*
 * (C) Copyright 2003
 * Wolfgang Denk, DENX Software Engineering, [email protected].
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 * Boot support
 */
#include <common.h>
#include <command.h>
#include <linux/compiler.h>

DECLARE_GLOBAL_DATA_PTR;

__maybe_unused
static void print_num(const char *name, ulong value)
{
	printf("%-12s= 0x%08lX\n", name, value);
}

__maybe_unused
static void print_eth(int idx)
{
	char name[10], *val;
	if (idx)
		sprintf(name, "eth%iaddr", idx);
	else
		strcpy(name, "ethaddr");
	val = getenv(name);
	if (!val)
		val = "(not set)";
	printf("%-12s= %s\n", name, val);
}

#ifndef CONFIG_DM_ETH
__maybe_unused
static void print_eths(void)
{
	struct eth_device *dev;
	int i = 0;

	do {
		dev = eth_get_dev_by_index(i);
		if (dev) {
			printf("eth%dname    = %s\n", i, dev->name);
			print_eth(i);
			i++;
		}
	} while (dev);

	printf("current eth = %s\n", eth_get_name());
	printf("ip_addr     = %s\n", getenv("ipaddr"));
}
#endif

__maybe_unused
static void print_lnum(const char *name, unsigned long long value)
{
	printf("%-12s= 0x%.8llX\n", name, value);
}

__maybe_unused
static void print_mhz(const char *name, unsigned long hz)
{
	char buf[32];

	printf("%-12s= %6s MHz\n", name, strmhz(buf, hz));
}


static inline void print_bi_boot_params(const bd_t *bd)
{
	print_num("boot_params",	(ulong)bd->bi_boot_params);
}

static inline void print_bi_mem(const bd_t *bd)
{
#if defined(CONFIG_SH)
	print_num("mem start      ",	(ulong)bd->bi_memstart);
	print_lnum("mem size       ",	(u64)bd->bi_memsize);
#elif defined(CONFIG_ARC)
	print_num("mem start",		(ulong)bd->bi_memstart);
	print_lnum("mem size",		(u64)bd->bi_memsize);
#elif defined(CONFIG_AVR32)
	print_num("memstart",		(ulong)bd->bi_dram[0].start);
	print_lnum("memsize",		(u64)bd->bi_dram[0].size);
#else
	print_num("memstart",		(ulong)bd->bi_memstart);
	print_lnum("memsize",		(u64)bd->bi_memsize);
#endif
}

static inline void print_bi_dram(const bd_t *bd)
{
#ifdef CONFIG_NR_DRAM_BANKS
	int i;

	for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
		if (bd->bi_dram[i].size) {
			print_num("DRAM bank",	i);
			print_num("-> start",	bd->bi_dram[i].start);
			print_num("-> size",	bd->bi_dram[i].size);
		}
	}
#endif
}

static inline void print_bi_flash(const bd_t *bd)
{
#if defined(CONFIG_MICROBLAZE) || defined(CONFIG_SH)
	print_num("flash start    ",	(ulong)bd->bi_flashstart);
	print_num("flash size     ",	(ulong)bd->bi_flashsize);
	print_num("flash offset   ",	(ulong)bd->bi_flashoffset);

#elif defined(CONFIG_NIOS2)
	print_num("flash start",	(ulong)bd->bi_flashstart);
	print_num("flash size",		(ulong)bd->bi_flashsize);
	print_num("flash offset",	(ulong)bd->bi_flashoffset);
#else
	print_num("flashstart",		(ulong)bd->bi_flashstart);
	print_num("flashsize",		(ulong)bd->bi_flashsize);
	print_num("flashoffset",	(ulong)bd->bi_flashoffset);
#endif
}

static inline void print_eth_ip_addr(void)
{
#if defined(CONFIG_CMD_NET)
	print_eth(0);
#if defined(CONFIG_HAS_ETH1)
	print_eth(1);
#endif
#if defined(CONFIG_HAS_ETH2)
	print_eth(2);
#endif
#if defined(CONFIG_HAS_ETH3)
	print_eth(3);
#endif
#if defined(CONFIG_HAS_ETH4)
	print_eth(4);
#endif
#if defined(CONFIG_HAS_ETH5)
	print_eth(5);
#endif
	printf("IP addr     = %s\n", getenv("ipaddr"));
#endif
}

static inline void print_baudrate(void)
{
#if defined(CONFIG_PPC)
	printf("baudrate    = %6u bps\n", gd->baudrate);
#else
	printf("baudrate    = %u bps\n", gd->baudrate);
#endif
}

static inline void __maybe_unused print_std_bdinfo(const bd_t *bd)
{
	print_bi_boot_params(bd);
	print_bi_mem(bd);
	print_bi_flash(bd);
	print_eth_ip_addr();
	print_baudrate();
}

#if defined(CONFIG_PPC)
void __weak board_detail(void)
{
	/* Please define boot_detail() for your platform */
}

int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	bd_t *bd = gd->bd;

#ifdef DEBUG
	print_num("bd address",		(ulong)bd);
#endif
	print_bi_mem(bd);
	print_bi_flash(bd);
	print_num("sramstart",		bd->bi_sramstart);
	print_num("sramsize",		bd->bi_sramsize);
#if	defined(CONFIG_E500)
	print_num("immr_base",		bd->bi_immr_base);
#endif
	print_num("bootflags",		bd->bi_bootflags);
#if	defined(CONFIG_405EP) || \
	defined(CONFIG_405GP) || \
	defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
	defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
	defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
	defined(CONFIG_XILINX_405)
	print_mhz("procfreq",		bd->bi_procfreq);
	print_mhz("plb_busfreq",	bd->bi_plb_busfreq);
#if	defined(CONFIG_405EP) || defined(CONFIG_405GP) || \
	defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
	defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
	defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405)
	print_mhz("pci_busfreq",	bd->bi_pci_busfreq);
#endif
#else	/* ! CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
#if defined(CONFIG_CPM2)
	print_mhz("vco",		bd->bi_vco);
	print_mhz("sccfreq",		bd->bi_sccfreq);
	print_mhz("brgfreq",		bd->bi_brgfreq);
#endif
	print_mhz("intfreq",		bd->bi_intfreq);
#if defined(CONFIG_CPM2)
	print_mhz("cpmfreq",		bd->bi_cpmfreq);
#endif
	print_mhz("busfreq",		bd->bi_busfreq);
#endif /* CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */

#ifdef CONFIG_ENABLE_36BIT_PHYS
#ifdef CONFIG_PHYS_64BIT
	puts("addressing  = 36-bit\n");
#else
	puts("addressing  = 32-bit\n");
#endif
#endif

	print_eth_ip_addr();
	print_baudrate();
	print_num("relocaddr", gd->relocaddr);
	board_detail();
	return 0;
}

#elif defined(CONFIG_NIOS2)

int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	bd_t *bd = gd->bd;

	print_bi_dram(bd);
	print_bi_flash(bd);

#if defined(CONFIG_SYS_SRAM_BASE)
	print_num ("sram start",	(ulong)bd->bi_sramstart);
	print_num ("sram size",		(ulong)bd->bi_sramsize);
#endif

	print_eth_ip_addr();
	print_baudrate();

	return 0;
}

#elif defined(CONFIG_MICROBLAZE)

int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	bd_t *bd = gd->bd;

	print_bi_dram(bd);
	print_bi_flash(bd);
#if defined(CONFIG_SYS_SRAM_BASE)
	print_num("sram start     ",	(ulong)bd->bi_sramstart);
	print_num("sram size      ",	(ulong)bd->bi_sramsize);
#endif
#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
	print_eths();
#endif
	print_baudrate();
	print_num("relocaddr", gd->relocaddr);
	print_num("reloc off", gd->reloc_off);
	print_num("fdt_blob", (ulong)gd->fdt_blob);
	print_num("new_fdt", (ulong)gd->new_fdt);
	print_num("fdt_size", (ulong)gd->fdt_size);

	return 0;
}

#elif defined(CONFIG_M68K)

int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	bd_t *bd = gd->bd;

	print_bi_mem(bd);
	print_bi_flash(bd);
#if defined(CONFIG_SYS_INIT_RAM_ADDR)
	print_num("sramstart",		(ulong)bd->bi_sramstart);
	print_num("sramsize",		(ulong)bd->bi_sramsize);
#endif
#if defined(CONFIG_SYS_MBAR)
	print_num("mbar",		bd->bi_mbar_base);
#endif
	print_mhz("cpufreq",		bd->bi_intfreq);
	print_mhz("busfreq",		bd->bi_busfreq);
#ifdef CONFIG_PCI
	print_mhz("pcifreq",		bd->bi_pcifreq);
#endif
#ifdef CONFIG_EXTRA_CLOCK
	print_mhz("flbfreq",		bd->bi_flbfreq);
	print_mhz("inpfreq",		bd->bi_inpfreq);
	print_mhz("vcofreq",		bd->bi_vcofreq);
#endif
	print_eth_ip_addr();
	print_baudrate();

	return 0;
}

#elif defined(CONFIG_MIPS)

int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	print_std_bdinfo(gd->bd);
	print_num("relocaddr", gd->relocaddr);
	print_num("reloc off", gd->reloc_off);

	return 0;
}

#elif defined(CONFIG_AVR32)

int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	print_std_bdinfo(gd->bd);
	return 0;
}

#elif defined(CONFIG_ARM)

static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc,
			char * const argv[])
{
	bd_t *bd = gd->bd;

	print_num("arch_number",	bd->bi_arch_number);
	print_bi_boot_params(bd);
	print_bi_dram(bd);

#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
	if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) {
		print_num("Secure ram",
			  gd->arch.secure_ram & MEM_RESERVE_SECURE_ADDR_MASK);
	}
#endif
#ifdef CONFIG_RESV_RAM
	if (gd->arch.resv_ram)
		print_num("Reserved ram", gd->arch.resv_ram);
#endif
#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
	print_eths();
#endif
	print_baudrate();
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
	print_num("TLB addr", gd->arch.tlb_addr);
#endif
	print_num("relocaddr", gd->relocaddr);
	print_num("reloc off", gd->reloc_off);
	print_num("irq_sp", gd->irq_sp);	/* irq stack pointer */
	print_num("sp start ", gd->start_addr_sp);
#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
	print_num("FB base  ", gd->fb_base);
#endif
	/*
	 * TODO: Currently only support for davinci SOC's is added.
	 * Remove this check once all the board implement this.
	 */
#ifdef CONFIG_CLOCKS
	printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq);
	printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq);
	printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq);
#endif
#ifdef CONFIG_BOARD_TYPES
	printf("Board Type  = %ld\n", gd->board_type);
#endif
#ifdef CONFIG_SYS_MALLOC_F
	printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr,
	       CONFIG_SYS_MALLOC_F_LEN);
#endif
	if (gd->fdt_blob)
		printf("fdt_blob = %p\n", gd->fdt_blob);

	return 0;
}

#elif defined(CONFIG_SH)

int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	bd_t *bd = gd->bd;

	print_bi_mem(bd);
	print_bi_flash(bd);
	print_eth_ip_addr();
	print_baudrate();
	return 0;
}

#elif defined(CONFIG_X86)

int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	bd_t *bd = gd->bd;

	print_bi_boot_params(bd);

	print_bi_dram(bd);

#if defined(CONFIG_CMD_NET)
	print_eth_ip_addr();
	print_mhz("ethspeed",	    bd->bi_ethspeed);
#endif
	print_baudrate();

	return 0;
}

#elif defined(CONFIG_SANDBOX)

int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	bd_t *bd = gd->bd;

	print_bi_boot_params(bd);
	print_bi_dram(bd);
	print_eth_ip_addr();

#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
	print_num("FB base  ", gd->fb_base);
#endif
	return 0;
}

#elif defined(CONFIG_NDS32)

int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	bd_t *bd = gd->bd;

	print_num("arch_number",	bd->bi_arch_number);
	print_bi_boot_params(bd);
	print_bi_dram(bd);
	print_eth_ip_addr();
	print_baudrate();

	return 0;
}

#elif defined(CONFIG_ARC)

int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	bd_t *bd = gd->bd;

	print_bi_mem(bd);
	print_eth_ip_addr();
	print_baudrate();

	return 0;
}

#elif defined(CONFIG_XTENSA)

int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	print_std_bdinfo(gd->bd);
	return 0;
}

#else
 #error "a case for this architecture does not exist!"
#endif

/* -------------------------------------------------------------------- */

U_BOOT_CMD(
	bdinfo,	1,	1,	do_bdinfo,
	"print Board Info structure",
	""
);
Commit	Line	Data
8bde7f77 WD	1	/*
	2	* (C) Copyright 2003
	3	* Wolfgang Denk, DENX Software Engineering, [email protected].
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
8bde7f77 WD	6	*/
	7
	8	/*
	9	* Boot support
	10	*/
	11	#include <common.h>
	12	#include <command.h>
d88af4da	13	#include <linux/compiler.h>
8bde7f77	14
d87080b7	15	DECLARE_GLOBAL_DATA_PTR;
8bde7f77	16
d88af4da MF	17	__maybe_unused
	18	static void print_num(const char *name, ulong value)
	19	{
	20	printf("%-12s= 0x%08lX\n", name, value);
	21	}
8bde7f77	22
5f3dfadc	23	__maybe_unused
d88af4da MF	24	static void print_eth(int idx)
	25	{
	26	char name[10], *val;
	27	if (idx)
	28	sprintf(name, "eth%iaddr", idx);
	29	else
	30	strcpy(name, "ethaddr");
	31	val = getenv(name);
	32	if (!val)
	33	val = "(not set)";
	34	printf("%-12s= %s\n", name, val);
	35	}
de2dff6f	36
05c3e68f	37	#ifndef CONFIG_DM_ETH
9fc6a06a MS	38	__maybe_unused
	39	static void print_eths(void)
	40	{
	41	struct eth_device *dev;
	42	int i = 0;
	43
	44	do {
	45	dev = eth_get_dev_by_index(i);
	46	if (dev) {
	47	printf("eth%dname = %s\n", i, dev->name);
	48	print_eth(i);
	49	i++;
	50	}
	51	} while (dev);
	52
	53	printf("current eth = %s\n", eth_get_name());
	54	printf("ip_addr = %s\n", getenv("ipaddr"));
	55	}
05c3e68f	56	#endif
9fc6a06a	57
d88af4da	58	__maybe_unused
47708457	59	static void print_lnum(const char *name, unsigned long long value)
d88af4da MF	60	{
	61	printf("%-12s= 0x%.8llX\n", name, value);
	62	}
	63
	64	__maybe_unused
	65	static void print_mhz(const char *name, unsigned long hz)
	66	{
	67	char buf[32];
	68
	69	printf("%-12s= %6s MHz\n", name, strmhz(buf, hz));
	70	}
8bde7f77	71
171e5396 MF	72
	73	static inline void print_bi_boot_params(const bd_t *bd)
	74	{
	75	print_num("boot_params", (ulong)bd->bi_boot_params);
	76	}
	77
12feb364 MF	78	static inline void print_bi_mem(const bd_t *bd)
	79	{
	80	#if defined(CONFIG_SH)
	81	print_num("mem start ", (ulong)bd->bi_memstart);
	82	print_lnum("mem size ", (u64)bd->bi_memsize);
	83	#elif defined(CONFIG_ARC)
	84	print_num("mem start", (ulong)bd->bi_memstart);
	85	print_lnum("mem size", (u64)bd->bi_memsize);
	86	#elif defined(CONFIG_AVR32)
	87	print_num("memstart", (ulong)bd->bi_dram[0].start);
	88	print_lnum("memsize", (u64)bd->bi_dram[0].size);
	89	#else
	90	print_num("memstart", (ulong)bd->bi_memstart);
	91	print_lnum("memsize", (u64)bd->bi_memsize);
	92	#endif
	93	}
	94
fd60e99f MF	95	static inline void print_bi_dram(const bd_t *bd)
	96	{
	97	#ifdef CONFIG_NR_DRAM_BANKS
	98	int i;
	99
	100	for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
ddd917b8 SG	101	if (bd->bi_dram[i].size) {
	102	print_num("DRAM bank", i);
	103	print_num("-> start", bd->bi_dram[i].start);
	104	print_num("-> size", bd->bi_dram[i].size);
	105	}
fd60e99f MF	106	}
	107	#endif
	108	}
	109
f80e5359 MF	110	static inline void print_bi_flash(const bd_t *bd)
	111	{
	112	#if defined(CONFIG_MICROBLAZE) \|\| defined(CONFIG_SH)
	113	print_num("flash start ", (ulong)bd->bi_flashstart);
	114	print_num("flash size ", (ulong)bd->bi_flashsize);
	115	print_num("flash offset ", (ulong)bd->bi_flashoffset);
	116
70cc0c34	117	#elif defined(CONFIG_NIOS2)
f80e5359 MF	118	print_num("flash start", (ulong)bd->bi_flashstart);
	119	print_num("flash size", (ulong)bd->bi_flashsize);
	120	print_num("flash offset", (ulong)bd->bi_flashoffset);
	121	#else
	122	print_num("flashstart", (ulong)bd->bi_flashstart);
	123	print_num("flashsize", (ulong)bd->bi_flashsize);
	124	print_num("flashoffset", (ulong)bd->bi_flashoffset);
	125	#endif
	126	}
	127
8752e260 MF	128	static inline void print_eth_ip_addr(void)
	129	{
	130	#if defined(CONFIG_CMD_NET)
	131	print_eth(0);
	132	#if defined(CONFIG_HAS_ETH1)
	133	print_eth(1);
	134	#endif
	135	#if defined(CONFIG_HAS_ETH2)
	136	print_eth(2);
	137	#endif
	138	#if defined(CONFIG_HAS_ETH3)
	139	print_eth(3);
	140	#endif
	141	#if defined(CONFIG_HAS_ETH4)
	142	print_eth(4);
	143	#endif
	144	#if defined(CONFIG_HAS_ETH5)
	145	print_eth(5);
	146	#endif
	147	printf("IP addr = %s\n", getenv("ipaddr"));
	148	#endif
	149	}
	150
4e3fa7d8 MF	151	static inline void print_baudrate(void)
	152	{
	153	#if defined(CONFIG_PPC)
	154	printf("baudrate = %6u bps\n", gd->baudrate);
4e3fa7d8 MF	155	#else
	156	printf("baudrate = %u bps\n", gd->baudrate);
	157	#endif
	158	}
	159
b37483c4	160	static inline void __maybe_unused print_std_bdinfo(const bd_t *bd)
e3795084 MF	161	{
	162	print_bi_boot_params(bd);
	163	print_bi_mem(bd);
	164	print_bi_flash(bd);
	165	print_eth_ip_addr();
	166	print_baudrate();
	167	}
	168
c99ea790	169	#if defined(CONFIG_PPC)
e7939464 YS	170	void __weak board_detail(void)
	171	{
	172	/* Please define boot_detail() for your platform */
	173	}
8bde7f77	174
5902e8f7	175	int do_bdinfo(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
8bde7f77	176	{
8bde7f77	177	bd_t *bd = gd->bd;
8bde7f77 WD	178
8bde7f77 WD	179	#ifdef DEBUG
5902e8f7 ML	180	print_num("bd address", (ulong)bd);
5902e8f7 ML	181	#endif
12feb364	182	print_bi_mem(bd);
f80e5359	183	print_bi_flash(bd);
5902e8f7 ML	184	print_num("sramstart", bd->bi_sramstart);
5902e8f7 ML	185	print_num("sramsize", bd->bi_sramsize);
50258977	186	#if defined(CONFIG_E500)
5902e8f7 ML	187	print_num("immr_base", bd->bi_immr_base);
	188	#endif
	189	print_num("bootflags", bd->bi_bootflags);
3fb85889	190	#if defined(CONFIG_405EP) \|\| \
5902e8f7 ML	191	defined(CONFIG_405GP) \|\| \
	192	defined(CONFIG_440EP) \|\| defined(CONFIG_440EPX) \|\| \
	193	defined(CONFIG_440GR) \|\| defined(CONFIG_440GRX) \|\| \
	194	defined(CONFIG_440SP) \|\| defined(CONFIG_440SPE) \|\| \
	195	defined(CONFIG_XILINX_405)
0c277ef9 TT	196	print_mhz("procfreq", bd->bi_procfreq);
0c277ef9 TT	197	print_mhz("plb_busfreq", bd->bi_plb_busfreq);
5902e8f7 ML	198	#if defined(CONFIG_405EP) \|\| defined(CONFIG_405GP) \|\| \
	199	defined(CONFIG_440EP) \|\| defined(CONFIG_440EPX) \|\| \
	200	defined(CONFIG_440GR) \|\| defined(CONFIG_440GRX) \|\| \
	201	defined(CONFIG_440SPE) \|\| defined(CONFIG_XILINX_405)
0c277ef9	202	print_mhz("pci_busfreq", bd->bi_pci_busfreq);
8bde7f77	203	#endif
3fb85889	204	#else /* ! CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
9c4c5ae3	205	#if defined(CONFIG_CPM2)
0c277ef9 TT	206	print_mhz("vco", bd->bi_vco);
	207	print_mhz("sccfreq", bd->bi_sccfreq);
	208	print_mhz("brgfreq", bd->bi_brgfreq);
8bde7f77	209	#endif
0c277ef9	210	print_mhz("intfreq", bd->bi_intfreq);
9c4c5ae3	211	#if defined(CONFIG_CPM2)
0c277ef9	212	print_mhz("cpmfreq", bd->bi_cpmfreq);
8bde7f77	213	#endif
0c277ef9	214	print_mhz("busfreq", bd->bi_busfreq);
3fb85889	215	#endif /* CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
03f5c550	216
34e210f5 TT	217	#ifdef CONFIG_ENABLE_36BIT_PHYS
	218	#ifdef CONFIG_PHYS_64BIT
	219	puts("addressing = 36-bit\n");
	220	#else
	221	puts("addressing = 32-bit\n");
	222	#endif
	223	#endif
	224
8752e260	225	print_eth_ip_addr();
4e3fa7d8	226	print_baudrate();
5902e8f7	227	print_num("relocaddr", gd->relocaddr);
e7939464	228	board_detail();
8bde7f77 WD	229	return 0;
	230	}
	231
c99ea790	232	#elif defined(CONFIG_NIOS2)
5c952cf0	233
5902e8f7	234	int do_bdinfo(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
5c952cf0	235	{
5c952cf0 WD	236	bd_t *bd = gd->bd;
5c952cf0 WD	237
fd60e99f	238	print_bi_dram(bd);
f80e5359	239	print_bi_flash(bd);
5c952cf0	240
6d0f6bcf	241	#if defined(CONFIG_SYS_SRAM_BASE)
5c952cf0 WD	242	print_num ("sram start", (ulong)bd->bi_sramstart);
	243	print_num ("sram size", (ulong)bd->bi_sramsize);
	244	#endif
	245
8752e260	246	print_eth_ip_addr();
4e3fa7d8	247	print_baudrate();
5c952cf0 WD	248
	249	return 0;
	250	}
c99ea790 RM	251
c99ea790 RM	252	#elif defined(CONFIG_MICROBLAZE)
cfc67116	253
5902e8f7	254	int do_bdinfo(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
cfc67116	255	{
cfc67116	256	bd_t *bd = gd->bd;
e945f6dc	257
fd60e99f	258	print_bi_dram(bd);
f80e5359	259	print_bi_flash(bd);
6d0f6bcf	260	#if defined(CONFIG_SYS_SRAM_BASE)
5902e8f7 ML	261	print_num("sram start ", (ulong)bd->bi_sramstart);
5902e8f7 ML	262	print_num("sram size ", (ulong)bd->bi_sramsize);
cfc67116	263	#endif
062f078c	264	#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
9fc6a06a	265	print_eths();
cfc67116	266	#endif
4e3fa7d8	267	print_baudrate();
e945f6dc MS	268	print_num("relocaddr", gd->relocaddr);
e945f6dc MS	269	print_num("reloc off", gd->reloc_off);
de86765b MS	270	print_num("fdt_blob", (ulong)gd->fdt_blob);
	271	print_num("new_fdt", (ulong)gd->new_fdt);
	272	print_num("fdt_size", (ulong)gd->fdt_size);
e945f6dc	273
cfc67116 MS	274	return 0;
cfc67116 MS	275	}
4a551709	276
c99ea790 RM	277	#elif defined(CONFIG_M68K)
c99ea790 RM	278
5902e8f7	279	int do_bdinfo(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
8e585f02	280	{
8e585f02	281	bd_t *bd = gd->bd;
8ae158cd	282
12feb364	283	print_bi_mem(bd);
f80e5359	284	print_bi_flash(bd);
6d0f6bcf	285	#if defined(CONFIG_SYS_INIT_RAM_ADDR)
5902e8f7 ML	286	print_num("sramstart", (ulong)bd->bi_sramstart);
5902e8f7 ML	287	print_num("sramsize", (ulong)bd->bi_sramsize);
8e585f02	288	#endif
6d0f6bcf	289	#if defined(CONFIG_SYS_MBAR)
5902e8f7	290	print_num("mbar", bd->bi_mbar_base);
8e585f02	291	#endif
0c277ef9 TT	292	print_mhz("cpufreq", bd->bi_intfreq);
0c277ef9 TT	293	print_mhz("busfreq", bd->bi_busfreq);
8ae158cd	294	#ifdef CONFIG_PCI
0c277ef9	295	print_mhz("pcifreq", bd->bi_pcifreq);
8ae158cd TL	296	#endif
8ae158cd TL	297	#ifdef CONFIG_EXTRA_CLOCK
0c277ef9 TT	298	print_mhz("flbfreq", bd->bi_flbfreq);
	299	print_mhz("inpfreq", bd->bi_inpfreq);
	300	print_mhz("vcofreq", bd->bi_vcofreq);
8ae158cd	301	#endif
8752e260	302	print_eth_ip_addr();
4e3fa7d8	303	print_baudrate();
8e585f02 TL	304
	305	return 0;
	306	}
	307
c99ea790	308	#elif defined(CONFIG_MIPS)
8bde7f77	309
5902e8f7	310	int do_bdinfo(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
8bde7f77	311	{
e3795084	312	print_std_bdinfo(gd->bd);
8cf7a418 TC	313	print_num("relocaddr", gd->relocaddr);
8cf7a418 TC	314	print_num("reloc off", gd->reloc_off);
8bde7f77 WD	315
	316	return 0;
	317	}
8bde7f77	318
c99ea790 RM	319	#elif defined(CONFIG_AVR32)
c99ea790 RM	320
5902e8f7	321	int do_bdinfo(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c99ea790	322	{
e3795084	323	print_std_bdinfo(gd->bd);
c99ea790 RM	324	return 0;
	325	}
	326
	327	#elif defined(CONFIG_ARM)
8bde7f77	328
0e350f81 JH	329	static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc,
0e350f81 JH	330	char * const argv[])
8bde7f77	331	{
8bde7f77 WD	332	bd_t *bd = gd->bd;
8bde7f77 WD	333
5902e8f7	334	print_num("arch_number", bd->bi_arch_number);
171e5396	335	print_bi_boot_params(bd);
fd60e99f	336	print_bi_dram(bd);
8bde7f77	337
e8149522	338	#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
e61a7534	339	if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) {
e8149522	340	print_num("Secure ram",
e61a7534	341	gd->arch.secure_ram & MEM_RESERVE_SECURE_ADDR_MASK);
e8149522 YS	342	}
e8149522 YS	343	#endif
f2ccf7f7 YS	344	#ifdef CONFIG_RESV_RAM
	345	if (gd->arch.resv_ram)
	346	print_num("Reserved ram", gd->arch.resv_ram);
	347	#endif
ff973800	348	#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
9fc6a06a	349	print_eths();
a41dbbd9	350	#endif
4e3fa7d8	351	print_baudrate();
e47f2db5	352	#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
34fd5d25	353	print_num("TLB addr", gd->arch.tlb_addr);
f1d2b313	354	#endif
5902e8f7 ML	355	print_num("relocaddr", gd->relocaddr);
	356	print_num("reloc off", gd->reloc_off);
	357	print_num("irq_sp", gd->irq_sp); /* irq stack pointer */
	358	print_num("sp start ", gd->start_addr_sp);
c8fcd0f2	359	#if defined(CONFIG_LCD) \|\| defined(CONFIG_VIDEO)
5902e8f7	360	print_num("FB base ", gd->fb_base);
c8fcd0f2	361	#endif
8f5d4687 HM	362	/*
	363	* TODO: Currently only support for davinci SOC's is added.
	364	* Remove this check once all the board implement this.
	365	*/
	366	#ifdef CONFIG_CLOCKS
	367	printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq);
	368	printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq);
	369	printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq);
7bb7d672 HS	370	#endif
	371	#ifdef CONFIG_BOARD_TYPES
	372	printf("Board Type = %ld\n", gd->board_type);
8f5d4687	373	#endif
7f7ddf2a SG	374	#ifdef CONFIG_SYS_MALLOC_F
	375	printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr,
	376	CONFIG_SYS_MALLOC_F_LEN);
	377	#endif
53539533 HS	378	if (gd->fdt_blob)
53539533 HS	379	printf("fdt_blob = %p\n", gd->fdt_blob);
7f7ddf2a	380
8bde7f77 WD	381	return 0;
	382	}
	383
ebd0d062 NI	384	#elif defined(CONFIG_SH)
ebd0d062 NI	385
5902e8f7	386	int do_bdinfo(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
ebd0d062 NI	387	{
ebd0d062 NI	388	bd_t *bd = gd->bd;
12feb364 MF	389
12feb364 MF	390	print_bi_mem(bd);
f80e5359	391	print_bi_flash(bd);
8752e260	392	print_eth_ip_addr();
4e3fa7d8	393	print_baudrate();
ebd0d062 NI	394	return 0;
	395	}
	396
a806ee6f GR	397	#elif defined(CONFIG_X86)
a806ee6f GR	398
5902e8f7	399	int do_bdinfo(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
a806ee6f	400	{
a806ee6f	401	bd_t *bd = gd->bd;
a806ee6f	402
171e5396	403	print_bi_boot_params(bd);
5902e8f7	404
fd60e99f	405	print_bi_dram(bd);
a806ee6f GR	406
a806ee6f GR	407	#if defined(CONFIG_CMD_NET)
8752e260	408	print_eth_ip_addr();
0c277ef9	409	print_mhz("ethspeed", bd->bi_ethspeed);
a806ee6f	410	#endif
4e3fa7d8	411	print_baudrate();
a806ee6f GR	412
	413	return 0;
	414	}
	415
6fcc3be4 SG	416	#elif defined(CONFIG_SANDBOX)
	417
	418	int do_bdinfo(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
	419	{
6fcc3be4 SG	420	bd_t *bd = gd->bd;
6fcc3be4 SG	421
171e5396	422	print_bi_boot_params(bd);
fd60e99f	423	print_bi_dram(bd);
8752e260	424	print_eth_ip_addr();
6fcc3be4	425
c8fcd0f2	426	#if defined(CONFIG_LCD) \|\| defined(CONFIG_VIDEO)
6fcc3be4	427	print_num("FB base ", gd->fb_base);
c8fcd0f2	428	#endif
6fcc3be4 SG	429	return 0;
	430	}
	431
64d61461 ML	432	#elif defined(CONFIG_NDS32)
	433
	434	int do_bdinfo(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
	435	{
64d61461 ML	436	bd_t *bd = gd->bd;
	437
	438	print_num("arch_number", bd->bi_arch_number);
171e5396	439	print_bi_boot_params(bd);
fd60e99f	440	print_bi_dram(bd);
8752e260	441	print_eth_ip_addr();
4e3fa7d8	442	print_baudrate();
64d61461 ML	443
	444	return 0;
	445	}
	446
946f6f24	447	#elif defined(CONFIG_ARC)
bc5d5428 AB	448
	449	int do_bdinfo(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
	450	{
	451	bd_t *bd = gd->bd;
	452
12feb364	453	print_bi_mem(bd);
8752e260	454	print_eth_ip_addr();
4e3fa7d8	455	print_baudrate();
bc5d5428 AB	456
	457	return 0;
	458	}
	459
de5e5cea CZ	460	#elif defined(CONFIG_XTENSA)
	461
	462	int do_bdinfo(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
	463	{
	464	print_std_bdinfo(gd->bd);
	465	return 0;
	466	}
	467
c99ea790 RM	468	#else
	469	#error "a case for this architecture does not exist!"
	470	#endif
8bde7f77	471
8bde7f77 WD	472	/* -------------------------------------------------------------------- */
8bde7f77 WD	473
0d498393 WD	474	U_BOOT_CMD(
0d498393 WD	475	bdinfo, 1, 1, do_bdinfo,
2fb2604d	476	"print Board Info structure",
a89c33db	477	""
8bde7f77	478	);