[J-u-boot.git] / include / configs / tb100.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2011-2014 Pierrick Hascoet, Abilis Systems
 */

#ifndef _CONFIG_TB100_H_
#define _CONFIG_TB100_H_

#include <linux/sizes.h>

/*
 * Memory configuration
 */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE

#define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000
#define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_SDRAM_SIZE		SZ_128M

#define CONFIG_SYS_INIT_SP_ADDR		\
	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)

#define CONFIG_SYS_MALLOC_LEN		SZ_128K
#define CONFIG_SYS_BOOTM_LEN		SZ_32M

/*
 * UART configuration
 */
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK		166666666

/*
 * Even though the board houses Realtek RTL8211E PHY
 * corresponding PHY driver (drivers/net/phy/realtek.c) behaves unexpectedly.
 * In particular "parse_status" reports link is down.
 *
 * Until Realtek PHY driver is fixed fall back to generic PHY driver
 * which implements all required functionality and behaves much more stable.
 *
 *
 */

/*
 * Ethernet configuration
 */
#define ETH0_BASE_ADDRESS		0xFE100000
#define ETH1_BASE_ADDRESS		0xFE110000

/*
 * Environment configuration
 */
#define CONFIG_BOOTFILE			"uImage"

/*
 * Console configuration
 */

#endif /* _CONFIG_TB100_H_ */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
7f6a6db6 AB	2	/*
7f6a6db6 AB	3	* Copyright (C) 2011-2014 Pierrick Hascoet, Abilis Systems
7f6a6db6 AB	4	*/
	5
	6	#ifndef _CONFIG_TB100_H_
	7	#define _CONFIG_TB100_H_
	8
	9	#include <linux/sizes.h>
	10
7f6a6db6 AB	11	/*
	12	* Memory configuration
	13	*/
7f6a6db6 AB	14	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
	15
	16	#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
	17	#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
	18	#define CONFIG_SYS_SDRAM_SIZE SZ_128M
	19
	20	#define CONFIG_SYS_INIT_SP_ADDR \
	21	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
	22
	23	#define CONFIG_SYS_MALLOC_LEN SZ_128K
	24	#define CONFIG_SYS_BOOTM_LEN SZ_32M
7f6a6db6	25
7f6a6db6 AB	26	/*
	27	* UART configuration
	28	*/
7f6a6db6	29	#define CONFIG_SYS_NS16550_SERIAL
7f6a6db6	30	#define CONFIG_SYS_NS16550_CLK 166666666
7f6a6db6	31
7f6a6db6 AB	32	/*
	33	* Even though the board houses Realtek RTL8211E PHY
	34	* corresponding PHY driver (drivers/net/phy/realtek.c) behaves unexpectedly.
	35	* In particular "parse_status" reports link is down.
	36	*
	37	* Until Realtek PHY driver is fixed fall back to generic PHY driver
	38	* which implements all required functionality and behaves much more stable.
	39	*
7f6a6db6 AB	40	*
	41	*/
	42
	43	/*
	44	* Ethernet configuration
	45	*/
7f6a6db6 AB	46	#define ETH0_BASE_ADDRESS 0xFE100000
	47	#define ETH1_BASE_ADDRESS 0xFE110000
	48
7f6a6db6 AB	49	/*
	50	* Environment configuration
	51	*/
7f6a6db6	52	#define CONFIG_BOOTFILE "uImage"
7f6a6db6 AB	53
	54	/*
	55	* Console configuration
	56	*/
7f6a6db6 AB	57
7f6a6db6 AB	58	#endif /* _CONFIG_TB100_H_ */