]> Git Repo - J-u-boot.git/blame - configs/socfpga_is1_defconfig
ARM: socfpga: Fix default mtdparts
[J-u-boot.git] / configs / socfpga_is1_defconfig
CommitLineData
35546f6f
PM
1CONFIG_ARM=y
2CONFIG_ARCH_SOCFPGA=y
35546f6f 3CONFIG_TARGET_SOCFPGA_IS1=y
344a0e43 4CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
665c35a7 5CONFIG_SPL_TEXT_BASE=0xFFFF0000
fa2c1467 6CONFIG_DISTRO_DEFAULTS=y
35546f6f 7CONFIG_FIT=y
5abc1a45
SP
8CONFIG_USE_BOOTARGS=y
9CONFIG_BOOTARGS="console=ttyS0,115200"
fa2c1467 10# CONFIG_USE_BOOTCOMMAND is not set
ef26d603 11CONFIG_SYS_CONSOLE_IS_IN_ENV=y
84f2a5d0 12CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
3505bc55 13CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
9dd1d0aa 14CONFIG_VERSION_VARIABLE=y
84351792 15# CONFIG_DISPLAY_BOARDINFO is not set
78eba69d 16CONFIG_DISPLAY_BOARDINFO_LATE=y
55500438 17CONFIG_SPL_SPI_LOAD=y
1ee774d2 18CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
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19CONFIG_CMD_ASKENV=y
20CONFIG_CMD_GREPENV=y
35546f6f 21# CONFIG_CMD_FLASH is not set
88663126
TR
22CONFIG_CMD_GPIO=y
23CONFIG_CMD_I2C=y
35546f6f 24CONFIG_CMD_SPI=y
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PM
25CONFIG_CMD_CACHE=y
26CONFIG_CMD_TIME=y
35546f6f 27CONFIG_CMD_EXT4_WRITE=y
43ede0bc 28CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
48f23dd6 29CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)"
8f2fe0c8 30CONFIG_CMD_UBI=y
37dc72f5
TR
31# CONFIG_ISO_PARTITION is not set
32# CONFIG_EFI_PARTITION is not set
8c5cad05 33CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"
5dc4dfd2 34CONFIG_ENV_IS_IN_SPI_FLASH=y
8d8ee47e 35CONFIG_SYS_RELOC_GD_ENV_ADDR=y
35546f6f 36CONFIG_SPL_DM_SEQ_ALIAS=y
d1ec9461 37CONFIG_BOOTCOUNT_LIMIT=y
aca5cd27 38CONFIG_DM_GPIO=y
35546f6f 39CONFIG_DWAPB_GPIO=y
2878942a 40CONFIG_DM_I2C=y
35546f6f 41CONFIG_SYS_I2C_DW=y
8728c97e 42# CONFIG_MMC is not set
9c5b0097 43CONFIG_MTD_DEVICE=y
35546f6f 44CONFIG_SPI_FLASH_STMICRO=y
832ce202 45CONFIG_SPI_FLASH_MTD=y
da3b9e7f
AG
46CONFIG_PHY_MICREL=y
47CONFIG_PHY_MICREL_KSZ90X1=y
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48CONFIG_DM_ETH=y
49CONFIG_ETH_DESIGNWARE=y
d7869b21 50CONFIG_MII=y
a8c2dcf0 51CONFIG_DM_RESET=y
f1b1f770 52CONFIG_SPI=y
35546f6f 53CONFIG_CADENCE_QSPI=y
e263607a 54# CONFIG_SPL_WDT is not set
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