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3b7f29f2 JT |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | |
3 | * (C) Copyright 2021 Rockchip Electronics Co., Ltd. | |
4 | */ | |
5 | ||
03de305e | 6 | #include <config.h> |
3b7f29f2 JT |
7 | #include <dm.h> |
8 | #include <ram.h> | |
9 | #include <syscon.h> | |
10 | #include <asm/arch-rockchip/clock.h> | |
11 | #include <asm/arch-rockchip/grf_rk3588.h> | |
12 | #include <asm/arch-rockchip/sdram.h> | |
13 | ||
14 | struct dram_info { | |
15 | struct ram_info info; | |
16 | struct rk3588_pmu1grf *pmugrf; | |
17 | }; | |
18 | ||
19 | static int rk3588_dmc_probe(struct udevice *dev) | |
20 | { | |
21 | struct dram_info *priv = dev_get_priv(dev); | |
22 | ||
23 | priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); | |
24 | priv->info.base = CFG_SYS_SDRAM_BASE; | |
25 | priv->info.size = | |
26 | rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]) + | |
27 | rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[4]); | |
28 | ||
29 | return 0; | |
30 | } | |
31 | ||
32 | static int rk3588_dmc_get_info(struct udevice *dev, struct ram_info *info) | |
33 | { | |
34 | struct dram_info *priv = dev_get_priv(dev); | |
35 | ||
36 | *info = priv->info; | |
37 | ||
38 | return 0; | |
39 | } | |
40 | ||
41 | static struct ram_ops rk3588_dmc_ops = { | |
42 | .get_info = rk3588_dmc_get_info, | |
43 | }; | |
44 | ||
45 | static const struct udevice_id rk3588_dmc_ids[] = { | |
46 | { .compatible = "rockchip,rk3588-dmc" }, | |
47 | { } | |
48 | }; | |
49 | ||
50 | U_BOOT_DRIVER(dmc_rk3588) = { | |
51 | .name = "rockchip_rk3588_dmc", | |
52 | .id = UCLASS_RAM, | |
53 | .of_match = rk3588_dmc_ids, | |
54 | .ops = &rk3588_dmc_ops, | |
55 | .probe = rk3588_dmc_probe, | |
56 | .priv_auto = sizeof(struct dram_info), | |
57 | }; |