[J-u-boot.git] / common / cmd_fpga.c

/*
 * (C) Copyright 2000, 2001
 * Rich Ireland, Enterasys Networks, [email protected].
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 *  FPGA support
 */
#include <common.h>
#include <command.h>
#include <fpga.h>
#include <malloc.h>

/* Local functions */
static int fpga_get_op(char *opstr);

/* Local defines */
#define FPGA_NONE   -1
#define FPGA_INFO   0
#define FPGA_LOAD   1
#define FPGA_LOADB  2
#define FPGA_DUMP   3
#define FPGA_LOADMK 4

/* ------------------------------------------------------------------------- */
/* command form:
 *   fpga <op> <device number> <data addr> <datasize>
 * where op is 'load', 'dump', or 'info'
 * If there is no device number field, the fpga environment variable is used.
 * If there is no data addr field, the fpgadata environment variable is used.
 * The info command requires no data address field.
 */
int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
	int op, dev = FPGA_INVALID_DEVICE;
	size_t data_size = 0;
	void *fpga_data = NULL;
	char *devstr = getenv("fpga");
	char *datastr = getenv("fpgadata");
	int rc = FPGA_FAIL;
	int wrong_parms = 0;
#if defined(CONFIG_FIT)
	const char *fit_uname = NULL;
	ulong fit_addr;
#endif

	if (devstr)
		dev = (int) simple_strtoul(devstr, NULL, 16);
	if (datastr)
		fpga_data = (void *)simple_strtoul(datastr, NULL, 16);

	switch (argc) {
	case 5:		/* fpga <op> <dev> <data> <datasize> */
		data_size = simple_strtoul(argv[4], NULL, 16);

	case 4:		/* fpga <op> <dev> <data> */
#if defined(CONFIG_FIT)
		if (fit_parse_subimage(argv[3], (ulong)fpga_data,
				       &fit_addr, &fit_uname)) {
			fpga_data = (void *)fit_addr;
			debug("*  fpga: subimage '%s' from FIT image ",
			      fit_uname);
			debug("at 0x%08lx\n", fit_addr);
		} else
#endif
		{
			fpga_data = (void *)simple_strtoul(argv[3], NULL, 16);
			debug("*  fpga: cmdline image address = 0x%08lx\n",
			      (ulong)fpga_data);
		}
		debug("%s: fpga_data = 0x%x\n", __func__, (uint)fpga_data);

	case 3:		/* fpga <op> <dev | data addr> */
		dev = (int)simple_strtoul(argv[2], NULL, 16);
		debug("%s: device = %d\n", __func__, dev);
		/* FIXME - this is a really weak test */
		if ((argc == 3) && (dev > fpga_count())) {
			/* must be buffer ptr */
			debug("%s: Assuming buffer pointer in arg 3\n",
			      __func__);

#if defined(CONFIG_FIT)
			if (fit_parse_subimage(argv[2], (ulong)fpga_data,
					       &fit_addr, &fit_uname)) {
				fpga_data = (void *)fit_addr;
				debug("*  fpga: subimage '%s' from FIT image ",
				      fit_uname);
				debug("at 0x%08lx\n", fit_addr);
			} else
#endif
			{
				fpga_data = (void *)dev;
				debug("*  fpga: cmdline image addr = 0x%08lx\n",
				      (ulong)fpga_data);
			}

			debug("%s: fpga_data = 0x%x\n",
			      __func__, (uint)fpga_data);
			dev = FPGA_INVALID_DEVICE;	/* reset device num */
		}

	case 2:		/* fpga <op> */
		op = (int)fpga_get_op(argv[1]);
		break;

	default:
		debug("%s: Too many or too few args (%d)\n", __func__, argc);
		op = FPGA_NONE;	/* force usage display */
		break;
	}

	if (dev == FPGA_INVALID_DEVICE) {
		puts("FPGA device not specified\n");
		op = FPGA_NONE;
	}

	switch (op) {
	case FPGA_NONE:
	case FPGA_INFO:
		break;
	case FPGA_LOAD:
	case FPGA_LOADB:
	case FPGA_DUMP:
		if (!fpga_data || !data_size)
			wrong_parms = 1;
		break;
	case FPGA_LOADMK:
		if (!fpga_data)
			wrong_parms = 1;
		break;
	}

	if (wrong_parms) {
		puts("Wrong parameters for FPGA request\n");
		op = FPGA_NONE;
	}

	switch (op) {
	case FPGA_NONE:
		return CMD_RET_USAGE;

	case FPGA_INFO:
		rc = fpga_info(dev);
		break;

	case FPGA_LOAD:
		rc = fpga_load(dev, fpga_data, data_size);
		break;

	case FPGA_LOADB:
		rc = fpga_loadbitstream(dev, fpga_data, data_size);
		break;

	case FPGA_LOADMK:
		switch (genimg_get_format(fpga_data)) {
		case IMAGE_FORMAT_LEGACY:
			{
				image_header_t *hdr =
						(image_header_t *)fpga_data;
				ulong data;
				uint8_t comp;

				comp = image_get_comp(hdr);
				if (comp == IH_COMP_GZIP) {
					ulong image_buf = image_get_data(hdr);
					data = image_get_load(hdr);
					ulong image_size = ~0UL;

					if (gunzip((void *)data, ~0UL,
						   (void *)image_buf,
						   &image_size) != 0) {
						puts("GUNZIP: error\n");
						return 1;
					}
					data_size = image_size;
				} else {
					data = (ulong)image_get_data(hdr);
					data_size = image_get_data_size(hdr);
				}
				rc = fpga_load(dev, (void *)data, data_size);
			}
			break;
#if defined(CONFIG_FIT)
		case IMAGE_FORMAT_FIT:
			{
				const void *fit_hdr = (const void *)fpga_data;
				int noffset;
				const void *fit_data;

				if (fit_uname == NULL) {
					puts("No FIT subimage unit name\n");
					return 1;
				}

				if (!fit_check_format(fit_hdr)) {
					puts("Bad FIT image format\n");
					return 1;
				}

				/* get fpga component image node offset */
				noffset = fit_image_get_node(fit_hdr,
							     fit_uname);
				if (noffset < 0) {
					printf("Can't find '%s' FIT subimage\n",
					       fit_uname);
					return 1;
				}

				/* verify integrity */
				if (!fit_image_verify(fit_hdr, noffset)) {
					puts ("Bad Data Hash\n");
					return 1;
				}

				/* get fpga subimage data address and length */
				if (fit_image_get_data(fit_hdr, noffset,
						       &fit_data, &data_size)) {
					puts("Fpga subimage data not found\n");
					return 1;
				}

				rc = fpga_load(dev, fit_data, data_size);
			}
			break;
#endif
		default:
			puts("** Unknown image type\n");
			rc = FPGA_FAIL;
			break;
		}
		break;

	case FPGA_DUMP:
		rc = fpga_dump(dev, fpga_data, data_size);
		break;

	default:
		printf("Unknown operation\n");
		return CMD_RET_USAGE;
	}
	return rc;
}

/*
 * Map op to supported operations.  We don't use a table since we
 * would just have to relocate it from flash anyway.
 */
static int fpga_get_op(char *opstr)
{
	int op = FPGA_NONE;

	if (!strcmp("info", opstr))
		op = FPGA_INFO;
	else if (!strcmp("loadb", opstr))
		op = FPGA_LOADB;
	else if (!strcmp("load", opstr))
		op = FPGA_LOAD;
	else if (!strcmp("loadmk", opstr))
		op = FPGA_LOADMK;
	else if (!strcmp("dump", opstr))
		op = FPGA_DUMP;

	if (op == FPGA_NONE)
		printf("Unknown fpga operation \"%s\"\n", opstr);

	return op;
}

U_BOOT_CMD(fpga, 6, 1, do_fpga,
	   "loadable FPGA image support",
	   "[operation type] [device number] [image address] [image size]\n"
	   "fpga operations:\n"
	   "  dump\t[dev]\t\t\tLoad device to memory buffer\n"
	   "  info\t[dev]\t\t\tlist known device information\n"
	   "  load\t[dev] [address] [size]\tLoad device from memory buffer\n"
	   "  loadb\t[dev] [address] [size]\t"
	   "Load device from bitstream buffer (Xilinx only)\n"
	   "  loadmk [dev] [address]\tLoad device generated with mkimage"
#if defined(CONFIG_FIT)
	   "\n"
	   "\tFor loadmk operating on FIT format uImage address must include\n"
	   "\tsubimage unit name in the form of addr:<subimg_uname>"
#endif
);
Commit	Line	Data
4a9cbbe8 WD	1	/*
	2	* (C) Copyright 2000, 2001
	3	* Rich Ireland, Enterasys Networks, [email protected].
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
4a9cbbe8 WD	6	*/
	7
	8	/*
	9	* FPGA support
	10	*/
	11	#include <common.h>
	12	#include <command.h>
8bde7f77	13	#include <fpga.h>
c3d2b4b4	14	#include <malloc.h>
4a9cbbe8	15
4a9cbbe8	16	/* Local functions */
fc598412	17	static int fpga_get_op(char *opstr);
4a9cbbe8 WD	18
	19	/* Local defines */
	20	#define FPGA_NONE -1
	21	#define FPGA_INFO 0
	22	#define FPGA_LOAD 1
30ce5ab0	23	#define FPGA_LOADB 2
4a9cbbe8	24	#define FPGA_DUMP 3
f0ff4692	25	#define FPGA_LOADMK 4
4a9cbbe8 WD	26
	27	/* ------------------------------------------------------------------------- */
	28	/* command form:
	29	* fpga <op> <device number> <data addr> <datasize>
	30	* where op is 'load', 'dump', or 'info'
	31	* If there is no device number field, the fpga environment variable is used.
	32	* If there is no data addr field, the fpgadata environment variable is used.
	33	* The info command requires no data address field.
	34	*/
fc598412	35	int do_fpga(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
4a9cbbe8	36	{
d4ca31c4 WD	37	int op, dev = FPGA_INVALID_DEVICE;
	38	size_t data_size = 0;
	39	void *fpga_data = NULL;
fc598412 MS	40	char *devstr = getenv("fpga");
fc598412 MS	41	char *datastr = getenv("fpgadata");
d4ca31c4	42	int rc = FPGA_FAIL;
a790b5b2	43	int wrong_parms = 0;
fc598412	44	#if defined(CONFIG_FIT)
c28c4d19 MB	45	const char *fit_uname = NULL;
	46	ulong fit_addr;
	47	#endif
d4ca31c4 WD	48
d4ca31c4 WD	49	if (devstr)
fc598412	50	dev = (int) simple_strtoul(devstr, NULL, 16);
d4ca31c4	51	if (datastr)
fc598412	52	fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
d4ca31c4 WD	53
	54	switch (argc) {
	55	case 5: /* fpga <op> <dev> <data> <datasize> */
fc598412	56	data_size = simple_strtoul(argv[4], NULL, 16);
c28c4d19	57
d4ca31c4	58	case 4: /* fpga <op> <dev> <data> */
c28c4d19	59	#if defined(CONFIG_FIT)
fc598412 MS	60	if (fit_parse_subimage(argv[3], (ulong)fpga_data,
fc598412 MS	61	&fit_addr, &fit_uname)) {
c28c4d19	62	fpga_data = (void *)fit_addr;
fc598412 MS	63	debug("* fpga: subimage '%s' from FIT image ",
	64	fit_uname);
	65	debug("at 0x%08lx\n", fit_addr);
c28c4d19 MB	66	} else
	67	#endif
	68	{
fc598412	69	fpga_data = (void *)simple_strtoul(argv[3], NULL, 16);
06297db0	70	debug("* fpga: cmdline image address = 0x%08lx\n",
fc598412	71	(ulong)fpga_data);
c28c4d19	72	}
fc598412	73	debug("%s: fpga_data = 0x%x\n", __func__, (uint)fpga_data);
c28c4d19	74
d4ca31c4	75	case 3: /* fpga <op> <dev \| data addr> */
fc598412	76	dev = (int)simple_strtoul(argv[2], NULL, 16);
06297db0	77	debug("%s: device = %d\n", __func__, dev);
d4ca31c4	78	/* FIXME - this is a really weak test */
fc598412 MS	79	if ((argc == 3) && (dev > fpga_count())) {
fc598412 MS	80	/* must be buffer ptr */
06297db0	81	debug("%s: Assuming buffer pointer in arg 3\n",
fc598412	82	__func__);
c28c4d19 MB	83
c28c4d19 MB	84	#if defined(CONFIG_FIT)
fc598412 MS	85	if (fit_parse_subimage(argv[2], (ulong)fpga_data,
fc598412 MS	86	&fit_addr, &fit_uname)) {
c28c4d19	87	fpga_data = (void *)fit_addr;
fc598412 MS	88	debug("* fpga: subimage '%s' from FIT image ",
	89	fit_uname);
	90	debug("at 0x%08lx\n", fit_addr);
c28c4d19 MB	91	} else
	92	#endif
	93	{
fc598412 MS	94	fpga_data = (void *)dev;
	95	debug("* fpga: cmdline image addr = 0x%08lx\n",
	96	(ulong)fpga_data);
c28c4d19 MB	97	}
c28c4d19 MB	98
06297db0	99	debug("%s: fpga_data = 0x%x\n",
fc598412	100	__func__, (uint)fpga_data);
d4ca31c4 WD	101	dev = FPGA_INVALID_DEVICE; /* reset device num */
d4ca31c4 WD	102	}
c28c4d19	103
d4ca31c4	104	case 2: /* fpga <op> */
fc598412	105	op = (int)fpga_get_op(argv[1]);
d4ca31c4	106	break;
c28c4d19	107
d4ca31c4	108	default:
fc598412	109	debug("%s: Too many or too few args (%d)\n", __func__, argc);
d4ca31c4 WD	110	op = FPGA_NONE; /* force usage display */
	111	break;
	112	}
	113
a790b5b2 SB	114	if (dev == FPGA_INVALID_DEVICE) {
	115	puts("FPGA device not specified\n");
	116	op = FPGA_NONE;
	117	}
	118
	119	switch (op) {
	120	case FPGA_NONE:
	121	case FPGA_INFO:
	122	break;
	123	case FPGA_LOAD:
	124	case FPGA_LOADB:
	125	case FPGA_DUMP:
	126	if (!fpga_data \|\| !data_size)
	127	wrong_parms = 1;
	128	break;
	129	case FPGA_LOADMK:
	130	if (!fpga_data)
	131	wrong_parms = 1;
	132	break;
	133	}
	134
	135	if (wrong_parms) {
	136	puts("Wrong parameters for FPGA request\n");
	137	op = FPGA_NONE;
	138	}
	139
d4ca31c4 WD	140	switch (op) {
d4ca31c4 WD	141	case FPGA_NONE:
4c12eeb8	142	return CMD_RET_USAGE;
d4ca31c4 WD	143
d4ca31c4 WD	144	case FPGA_INFO:
fc598412	145	rc = fpga_info(dev);
d4ca31c4 WD	146	break;
	147
	148	case FPGA_LOAD:
fc598412	149	rc = fpga_load(dev, fpga_data, data_size);
d4ca31c4 WD	150	break;
d4ca31c4 WD	151
30ce5ab0 WD	152	case FPGA_LOADB:
	153	rc = fpga_loadbitstream(dev, fpga_data, data_size);
	154	break;
	155
f0ff4692	156	case FPGA_LOADMK:
fc598412	157	switch (genimg_get_format(fpga_data)) {
d5934ad7 MB	158	case IMAGE_FORMAT_LEGACY:
d5934ad7 MB	159	{
fc598412 MS	160	image_header_t *hdr =
	161	(image_header_t *)fpga_data;
	162	ulong data;
32d7cdd3 MS	163	uint8_t comp;
	164
	165	comp = image_get_comp(hdr);
	166	if (comp == IH_COMP_GZIP) {
	167	ulong image_buf = image_get_data(hdr);
	168	data = image_get_load(hdr);
	169	ulong image_size = ~0UL;
	170
	171	if (gunzip((void *)data, ~0UL,
	172	(void *)image_buf,
	173	&image_size) != 0) {
	174	puts("GUNZIP: error\n");
	175	return 1;
	176	}
	177	data_size = image_size;
	178	} else {
	179	data = (ulong)image_get_data(hdr);
	180	data_size = image_get_data_size(hdr);
	181	}
fc598412	182	rc = fpga_load(dev, (void *)data, data_size);
f0ff4692	183	}
d5934ad7 MB	184	break;
	185	#if defined(CONFIG_FIT)
	186	case IMAGE_FORMAT_FIT:
c28c4d19 MB	187	{
	188	const void fit_hdr = (const void )fpga_data;
	189	int noffset;
e6a857da	190	const void *fit_data;
c28c4d19 MB	191
c28c4d19 MB	192	if (fit_uname == NULL) {
fc598412	193	puts("No FIT subimage unit name\n");
c28c4d19 MB	194	return 1;
	195	}
	196
fc598412 MS	197	if (!fit_check_format(fit_hdr)) {
fc598412 MS	198	puts("Bad FIT image format\n");
c28c4d19 MB	199	return 1;
	200	}
	201
	202	/* get fpga component image node offset */
fc598412 MS	203	noffset = fit_image_get_node(fit_hdr,
fc598412 MS	204	fit_uname);
c28c4d19	205	if (noffset < 0) {
fc598412 MS	206	printf("Can't find '%s' FIT subimage\n",
fc598412 MS	207	fit_uname);
c28c4d19 MB	208	return 1;
	209	}
	210
	211	/* verify integrity */
b8da8366	212	if (!fit_image_verify(fit_hdr, noffset)) {
c28c4d19 MB	213	puts ("Bad Data Hash\n");
	214	return 1;
	215	}
	216
	217	/* get fpga subimage data address and length */
fc598412 MS	218	if (fit_image_get_data(fit_hdr, noffset,
	219	&fit_data, &data_size)) {
	220	puts("Fpga subimage data not found\n");
c28c4d19 MB	221	return 1;
	222	}
	223
fc598412	224	rc = fpga_load(dev, fit_data, data_size);
c28c4d19	225	}
d5934ad7 MB	226	break;
	227	#endif
	228	default:
fc598412	229	puts("** Unknown image type\n");
d5934ad7 MB	230	rc = FPGA_FAIL;
d5934ad7 MB	231	break;
f0ff4692 SR	232	}
	233	break;
	234
d4ca31c4	235	case FPGA_DUMP:
fc598412	236	rc = fpga_dump(dev, fpga_data, data_size);
d4ca31c4 WD	237	break;
	238
	239	default:
fc598412	240	printf("Unknown operation\n");
4c12eeb8	241	return CMD_RET_USAGE;
d4ca31c4	242	}
fc598412	243	return rc;
4a9cbbe8 WD	244	}
4a9cbbe8 WD	245
4a9cbbe8 WD	246	/*
	247	* Map op to supported operations. We don't use a table since we
	248	* would just have to relocate it from flash anyway.
	249	*/
fc598412	250	static int fpga_get_op(char *opstr)
4a9cbbe8 WD	251	{
	252	int op = FPGA_NONE;
	253
fc598412	254	if (!strcmp("info", opstr))
4a9cbbe8	255	op = FPGA_INFO;
fc598412	256	else if (!strcmp("loadb", opstr))
30ce5ab0	257	op = FPGA_LOADB;
fc598412	258	else if (!strcmp("load", opstr))
4a9cbbe8	259	op = FPGA_LOAD;
fc598412	260	else if (!strcmp("loadmk", opstr))
f0ff4692	261	op = FPGA_LOADMK;
fc598412	262	else if (!strcmp("dump", opstr))
4a9cbbe8	263	op = FPGA_DUMP;
4a9cbbe8	264
fc598412 MS	265	if (op == FPGA_NONE)
	266	printf("Unknown fpga operation \"%s\"\n", opstr);
	267
4a9cbbe8 WD	268	return op;
	269	}
	270
fc598412 MS	271	U_BOOT_CMD(fpga, 6, 1, do_fpga,
	272	"loadable FPGA image support",
	273	"[operation type] [device number] [image address] [image size]\n"
	274	"fpga operations:\n"
	275	" dump\t[dev]\t\t\tLoad device to memory buffer\n"
	276	" info\t[dev]\t\t\tlist known device information\n"
	277	" load\t[dev] [address] [size]\tLoad device from memory buffer\n"
	278	" loadb\t[dev] [address] [size]\t"
	279	"Load device from bitstream buffer (Xilinx only)\n"
	280	" loadmk [dev] [address]\tLoad device generated with mkimage"
c28c4d19	281	#if defined(CONFIG_FIT)
fc598412 MS	282	"\n"
	283	"\tFor loadmk operating on FIT format uImage address must include\n"
	284	"\tsubimage unit name in the form of addr:<subimg_uname>"
c28c4d19 MB	285	#endif
c28c4d19 MB	286	);