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4ec3a7f0 WD |
1 | /* |
2 | * (C) Copyright 2004 | |
3 | * Vincent Dubey, Xa SA, [email protected] | |
4 | * | |
5 | * (C) Copyright 2002 | |
6 | * Kyle Harris, Nexus Technologies, Inc. [email protected] | |
7 | * | |
8 | * (C) Copyright 2002 | |
9 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
10 | * Marius Groeger <[email protected]> | |
11 | * | |
12 | * See file CREDITS for list of people who contributed to this | |
13 | * project. | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or | |
16 | * modify it under the terms of the GNU General Public License as | |
17 | * published by the Free Software Foundation; either version 2 of | |
18 | * the License, or (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, write to the Free Software | |
27 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
28 | * MA 02111-1307 USA | |
29 | */ | |
30 | ||
31 | #include <common.h> | |
7194ab80 | 32 | #include <netdev.h> |
4438a45f | 33 | #include <asm/arch/pxa.h> |
4ec3a7f0 | 34 | |
d87080b7 | 35 | DECLARE_GLOBAL_DATA_PTR; |
4ec3a7f0 WD |
36 | |
37 | /* | |
38 | * Miscelaneous platform dependent initialisations | |
39 | */ | |
40 | ||
41 | int board_init (void) | |
42 | { | |
1123d412 MV |
43 | /* We have RAM, disable cache */ |
44 | dcache_disable(); | |
45 | icache_disable(); | |
4ec3a7f0 WD |
46 | |
47 | /* arch number of xaeniax */ | |
48 | gd->bd->bi_arch_number = 585; | |
49 | ||
50 | /* adress of boot parameters */ | |
51 | gd->bd->bi_boot_params = 0xa0000100; | |
52 | ||
53 | return 0; | |
54 | } | |
55 | ||
56 | int board_late_init(void) | |
57 | { | |
58 | setenv("stdout", "serial"); | |
59 | setenv("stderr", "serial"); | |
60 | return 0; | |
61 | } | |
62 | ||
1123d412 MV |
63 | int dram_init(void) |
64 | { | |
65 | pxa_dram_init(); | |
66 | gd->ram_size = PHYS_SDRAM_1_SIZE; | |
67 | return 0; | |
68 | } | |
4ec3a7f0 | 69 | |
1123d412 | 70 | void dram_init_banksize(void) |
4ec3a7f0 | 71 | { |
4ec3a7f0 WD |
72 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
73 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; | |
4ec3a7f0 | 74 | } |
7194ab80 BW |
75 | |
76 | #ifdef CONFIG_CMD_NET | |
77 | int board_eth_init(bd_t *bis) | |
78 | { | |
79 | int rc = 0; | |
80 | #ifdef CONFIG_SMC91111 | |
81 | rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); | |
82 | #endif | |
83 | return rc; | |
84 | } | |
85 | #endif |