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70a2047f WD |
1 | /* |
2 | * (C) Copyright 2002 | |
3 | * Kyle Harris, Nexus Technologies, Inc. [email protected] | |
4 | * | |
5 | * (C) Copyright 2002 | |
6 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
7 | * Marius Groeger <[email protected]> | |
8 | * | |
9 | * (C) Copyright 2004 | |
10 | * BEC Systems <http://bec-systems.com> | |
11 | * Cliff Brake <[email protected]> | |
12 | * Support for Accelent/Vibren PXA255 IDP | |
13 | * | |
14 | * See file CREDITS for list of people who contributed to this | |
15 | * project. | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or | |
18 | * modify it under the terms of the GNU General Public License as | |
19 | * published by the Free Software Foundation; either version 2 of | |
20 | * the License, or (at your option) any later version. | |
21 | * | |
22 | * This program is distributed in the hope that it will be useful, | |
23 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
25 | * GNU General Public License for more details. | |
26 | * | |
27 | * You should have received a copy of the GNU General Public License | |
28 | * along with this program; if not, write to the Free Software | |
29 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
30 | * MA 02111-1307 USA | |
31 | */ | |
32 | ||
33 | #include <common.h> | |
7194ab80 | 34 | #include <netdev.h> |
70a2047f | 35 | #include <command.h> |
3ba8bf7c | 36 | #include <asm/io.h> |
4438a45f | 37 | #include <asm/arch/pxa.h> |
70a2047f | 38 | |
d87080b7 | 39 | DECLARE_GLOBAL_DATA_PTR; |
70a2047f WD |
40 | |
41 | /* | |
42 | * Miscelaneous platform dependent initialisations | |
43 | */ | |
44 | ||
45 | int board_init (void) | |
46 | { | |
65bd6a90 MV |
47 | /* We have RAM, disable cache */ |
48 | dcache_disable(); | |
49 | icache_disable(); | |
70a2047f WD |
50 | |
51 | /* arch number of Lubbock-Board */ | |
52 | gd->bd->bi_arch_number = MACH_TYPE_PXA_IDP; | |
53 | ||
54 | /* adress of boot parameters */ | |
55 | gd->bd->bi_boot_params = 0xa0000100; | |
56 | ||
57 | /* turn on serial ports */ | |
58 | *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C0002c) = 0x13; | |
59 | ||
60 | /* set PWM for LCD */ | |
61 | /* a value that works is 60Hz, 77% duty cycle */ | |
3ba8bf7c MV |
62 | writel(readl(CKEN) | CKEN0_PWM0, CKEN); |
63 | writel(0x3f, PWM_CTRL0); | |
64 | writel(0x3ff, PWM_PERVAL0); | |
65 | writel(792, PWM_PWDUTY0); | |
70a2047f WD |
66 | |
67 | /* clear reset to AC97 codec */ | |
3ba8bf7c MV |
68 | writel(readl(CKEN) | CKEN2_AC97, CKEN); |
69 | writel(GCR_COLD_RST, GCR); | |
70a2047f WD |
70 | |
71 | /* enable LCD backlight */ | |
72 | /* *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C00030) = 0x7; */ | |
73 | ||
74 | /* test display */ | |
75 | /* lcd_puts("This is a test\nTest #2\n"); */ | |
76 | ||
77 | return 0; | |
78 | } | |
79 | ||
80 | int board_late_init(void) | |
81 | { | |
82 | setenv("stdout", "serial"); | |
83 | setenv("stderr", "serial"); | |
84 | return 0; | |
85 | } | |
86 | ||
65bd6a90 MV |
87 | int dram_init(void) |
88 | { | |
89 | pxa_dram_init(); | |
90 | gd->ram_size = PHYS_SDRAM_1_SIZE; | |
91 | return 0; | |
92 | } | |
70a2047f | 93 | |
65bd6a90 | 94 | void dram_init_banksize(void) |
70a2047f | 95 | { |
70a2047f WD |
96 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
97 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; | |
70a2047f WD |
98 | } |
99 | ||
70a2047f WD |
100 | #ifdef DEBUG_BLINKC_ENABLE |
101 | ||
102 | void delay_c(void) | |
103 | { | |
104 | /* reset OSCR to 0 */ | |
3ba8bf7c MV |
105 | writel(0, OSCR); |
106 | while (readl(OSCR) > 0x10000) | |
70a2047f WD |
107 | ; |
108 | ||
3ba8bf7c | 109 | while (readl(OSCR) < 0xd4000) |
70a2047f WD |
110 | ; |
111 | } | |
112 | ||
113 | void blink_c(void) | |
114 | { | |
115 | int led_bit = (1<<10); | |
116 | ||
3ba8bf7c MV |
117 | writel(led_bit, GPDR0); |
118 | writel(led_bit, GPCR0); | |
70a2047f | 119 | delay_c(); |
3ba8bf7c | 120 | writel(led_bit, GPSR0); |
70a2047f | 121 | delay_c(); |
3ba8bf7c | 122 | writel(led_bit, GPCR0); |
70a2047f WD |
123 | } |
124 | ||
54841ab5 | 125 | int do_idpcmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
70a2047f WD |
126 | { |
127 | printf("IDPCMD started\n"); | |
128 | return 0; | |
129 | } | |
130 | ||
6d0f6bcf | 131 | U_BOOT_CMD(idpcmd, CONFIG_SYS_MAXARGS, 0, do_idpcmd, |
2fb2604d | 132 | "custom IDP command", |
a89c33db | 133 | "no args at this time" |
70a2047f WD |
134 | ); |
135 | ||
136 | #endif | |
7194ab80 BW |
137 | |
138 | #ifdef CONFIG_CMD_NET | |
139 | int board_eth_init(bd_t *bis) | |
140 | { | |
141 | int rc = 0; | |
142 | #ifdef CONFIG_SMC91111 | |
143 | rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); | |
144 | #endif | |
145 | return rc; | |
146 | } | |
147 | #endif |