[J-u-boot.git] / include / configs / omap3_igep00x0.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Common configuration settings for IGEP technology based boards
 *
 * (C) Copyright 2012
 * ISEE 2007 SL, <www.iseebcn.com>
 */

#ifndef __IGEP00X0_H
#define __IGEP00X0_H

#include <configs/ti_omap3_common.h>

/*
 * We are only ever GP parts and will utilize all of the "downloaded image"
 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
 */

/* TPS65950 */
#define PBIASLITEVMODE1			(1 << 8)

/* LED */
#define IGEP0020_GPIO_LED		27
#define IGEP0030_GPIO_LED		16

/* Board and revision detection GPIOs */
#define IGEP0030_USB_TRANSCEIVER_RESET		54
#define GPIO_IGEP00X0_BOARD_DETECTION		28
#define GPIO_IGEP00X0_REVISION_DETECTION	129

/* Environment */
#define ENV_DEVICE_SETTINGS \
	"stdin=serial\0" \
	"stdout=serial\0" \
	"stderr=serial\0"

#define MEM_LAYOUT_SETTINGS \
	DEFAULT_LINUX_BOOT_ENV \
	"scriptaddr=0x87E00000\0" \
	"pxefile_addr_r=0x87F00000\0"

#define BOOT_TARGET_DEVICES(func) \
	func(MMC, mmc, 0)

#include <config_distro_bootcmd.h>

#define ENV_FINDFDT \
	"findfdt="\
		"if test ${board_name} = igep0020; then " \
			"if test ${board_rev} = F; then " \
				"setenv fdtfile omap3-igep0020-rev-f.dtb; " \
			"else " \
				"setenv fdtfile omap3-igep0020.dtb; fi; fi; " \
		"if test ${board_name} = igep0030; then " \
			"if test ${board_rev} = G; then " \
				"setenv fdtfile omap3-igep0030-rev-g.dtb; " \
			"else " \
				"setenv fdtfile omap3-igep0030.dtb; fi; fi; " \
		"if test ${fdtfile} = ''; then " \
			"echo WARNING: Could not determine device tree to use; fi; \0"

#define CONFIG_EXTRA_ENV_SETTINGS \
	ENV_FINDFDT \
	ENV_DEVICE_SETTINGS \
	MEM_LAYOUT_SETTINGS \
	BOOTENV

/* OneNAND config */
#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
#define CONFIG_SYS_ONENAND_BLOCK_SIZE	(128*1024)

/* NAND config */
#define CONFIG_SYS_NAND_ECCPOS		{ 2,  3,  4,  5,  6,  7,  8,  9, \
					 10, 11, 12, 13, 14, 15, 16, 17, \
					 18, 19, 20, 21, 22, 23, 24, 25, \
					 26, 27, 28, 29, 30, 31, 32, 33, \
					 34, 35, 36, 37, 38, 39, 40, 41, \
					 42, 43, 44, 45, 46, 47, 48, 49, \
					 50, 51, 52, 53, 54, 55, 56, 57, }
#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	14

#endif /* __IGEP00X0_H */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
8a3f6bb6	2	/*
dc7a9e64 EBS	3	* Common configuration settings for IGEP technology based boards
	4	*
	5	* (C) Copyright 2012
8a3f6bb6	6	* ISEE 2007 SL, <www.iseebcn.com>
8a3f6bb6 EBS	7	*/
8a3f6bb6 EBS	8
dc7a9e64 EBS	9	#ifndef __IGEP00X0_H
	10	#define __IGEP00X0_H
	11
e37e954e	12	#include <configs/ti_omap3_common.h>
8a3f6bb6	13
fa2f81b0 TR	14	/*
	15	* We are only ever GP parts and will utilize all of the "downloaded image"
	16	* area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
	17	*/
e7fbcbc2	18
195dc231 PP	19	/* TPS65950 */
	20	#define PBIASLITEVMODE1 (1 << 8)
	21
	22	/* LED */
	23	#define IGEP0020_GPIO_LED 27
	24	#define IGEP0030_GPIO_LED 16
	25
	26	/* Board and revision detection GPIOs */
	27	#define IGEP0030_USB_TRANSCEIVER_RESET 54
	28	#define GPIO_IGEP00X0_BOARD_DETECTION 28
	29	#define GPIO_IGEP00X0_REVISION_DETECTION 129
9d4f5421	30
40372244 EBS	31	/* Environment */
	32	#define ENV_DEVICE_SETTINGS \
	33	"stdin=serial\0" \
	34	"stdout=serial\0" \
	35	"stderr=serial\0"
	36
	37	#define MEM_LAYOUT_SETTINGS \
	38	DEFAULT_LINUX_BOOT_ENV \
	39	"scriptaddr=0x87E00000\0" \
	40	"pxefile_addr_r=0x87F00000\0"
	41
	42	#define BOOT_TARGET_DEVICES(func) \
	43	func(MMC, mmc, 0)
	44
	45	#include <config_distro_bootcmd.h>
	46
195dc231 PP	47	#define ENV_FINDFDT \
	48	"findfdt="\
	49	"if test ${board_name} = igep0020; then " \
	50	"if test ${board_rev} = F; then " \
	51	"setenv fdtfile omap3-igep0020-rev-f.dtb; " \
	52	"else " \
	53	"setenv fdtfile omap3-igep0020.dtb; fi; fi; " \
	54	"if test ${board_name} = igep0030; then " \
	55	"if test ${board_rev} = G; then " \
	56	"setenv fdtfile omap3-igep0030-rev-g.dtb; " \
	57	"else " \
	58	"setenv fdtfile omap3-igep0030.dtb; fi; fi; " \
	59	"if test ${fdtfile} = ''; then " \
	60	"echo WARNING: Could not determine device tree to use; fi; \0"
	61
8a3f6bb6	62	#define CONFIG_EXTRA_ENV_SETTINGS \
195dc231	63	ENV_FINDFDT \
40372244 EBS	64	ENV_DEVICE_SETTINGS \
	65	MEM_LAYOUT_SETTINGS \
	66	BOOTENV
	67
4b9dc7c2	68	/* OneNAND config */
4b9dc7c2 LM	69	#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
4b9dc7c2 LM	70	#define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024)
d271a611	71
4b9dc7c2	72	/* NAND config */
81fd858c LM	73	#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
	74	10, 11, 12, 13, 14, 15, 16, 17, \
	75	18, 19, 20, 21, 22, 23, 24, 25, \
	76	26, 27, 28, 29, 30, 31, 32, 33, \
	77	34, 35, 36, 37, 38, 39, 40, 41, \
	78	42, 43, 44, 45, 46, 47, 48, 49, \
	79	50, 51, 52, 53, 54, 55, 56, 57, }
d271a611	80	#define CONFIG_SYS_NAND_ECCSIZE 512
81fd858c	81	#define CONFIG_SYS_NAND_ECCBYTES 14
81fd858c	82
dc7a9e64	83	#endif /* __IGEP00X0_H */