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1/* SPDX-License-Identifier: GPL-2.0+ */
2
3/*
4 * Menlosystems M53Menlo configuration
5 * Copyright (C) 2012-2017 Marek Vasut <[email protected]>
6 * Copyright (C) 2014-2017 Olaf Mandel <[email protected]>
7 */
8
9#ifndef __M53MENLO_CONFIG_H__
10#define __M53MENLO_CONFIG_H__
11
12#include <asm/arch/imx-regs.h>
13
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14/*
15 * Memory configurations
16 */
17#define PHYS_SDRAM_1 CSD0_BASE_ADDR
18#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
19#define PHYS_SDRAM_2 CSD1_BASE_ADDR
20#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
21#define PHYS_SDRAM_SIZE (gd->ram_size)
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22
23#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
24#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
25#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
26
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27/*
28 * U-Boot general configurations
29 */
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30
31/*
32 * Serial Driver
33 */
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34#define CONFIG_MXC_UART_BASE UART1_BASE
35
36/*
37 * MMC Driver
38 */
39#ifdef CONFIG_CMD_MMC
40#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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41#endif
42
43/*
44 * NAND
45 */
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46#ifdef CONFIG_CMD_NAND
47#define CONFIG_SYS_MAX_NAND_DEVICE 1
48#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
49#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
50#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
51#define CONFIG_SYS_NAND_LARGEPAGE
52#define CONFIG_MXC_NAND_HWECC
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53#endif
54
55/*
56 * Ethernet on SOC (FEC)
57 */
58#ifdef CONFIG_CMD_NET
39cb4f3c 59#define CONFIG_FEC_MXC_PHYADDR 0x0
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60#endif
61
39cb4f3c 62#define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
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63
64/*
65 * RTC
66 */
67#ifdef CONFIG_CMD_DATE
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68#define CONFIG_SYS_I2C_RTC_ADDR 0x68
69#define CONFIG_SYS_M41T11_BASE_YEAR 2000
70#endif
71
72/*
73 * USB
74 */
75#ifdef CONFIG_CMD_USB
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76#define CONFIG_MXC_USB_PORT 1
77#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
78#define CONFIG_MXC_USB_FLAGS 0
79#endif
80
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81/*
82 * LCD
83 */
39cb4f3c 84#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
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85
86/* LVDS display */
87#define CONFIG_SYS_LDB_CLOCK 33260000
88#define CONFIG_IMX_VIDEO_SKIP
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89
90/* IIM Fuses */
91#define CONFIG_FSL_IIM
92
bf413781 93/* Watchdog */
bf413781 94
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95/*
96 * NAND SPL
97 */
39cb4f3c 98
39cb4f3c 99#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
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100
101/*
102 * Extra Environments
103 */
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104#define CONFIG_HOSTNAME "m53menlo"
105
106#define CONFIG_EXTRA_ENV_SETTINGS \
107 "consdev=ttymxc0\0" \
108 "baudrate=115200\0" \
109 "bootscript=boot.scr\0" \
110 "mmcdev=0\0" \
111 "mmcpart=1\0" \
112 "rootpath=/srv/\0" \
113 "kernel_addr_r=0x72000000\0" \
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114 "netdev=eth0\0" \
115 "splashsource=mmc_fs\0" \
de5def1c 116 "splashfile=boot/usplash.bmp.gz\0" \
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117 "splashimage=0x88000000\0" \
118 "splashpos=m,m\0" \
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119 "altbootcmd=" \
120 "if test ${mmcpart} -eq 1 ; then " \
121 "setenv mmcpart 2 ; " \
122 "else " \
123 "setenv mmcpart 1 ; " \
124 "fi ; " \
125 "boot\0" \
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126 "stdout=serial,vidconsole\0" \
127 "stderr=serial,vidconsole\0" \
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128 "addcons=" \
129 "setenv bootargs ${bootargs} " \
130 "console=${consdev},${baudrate}\0" \
131 "addip=" \
132 "setenv bootargs ${bootargs} " \
133 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
134 ":${hostname}:${netdev}:off\0" \
88b5002b 135 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
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136 "addmisc=" \
137 "setenv bootargs ${bootargs} ${miscargs}\0" \
138 "addargs=run addcons addmisc addmtd\0" \
139 "mmcload=" \
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140 "mmc rescan || reset ; load mmc ${mmcdev}:${mmcpart} " \
141 "${kernel_addr_r} ${bootfile} || reset\0" \
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142 "miscargs=nohlt panic=1\0" \
143 "mmcargs=setenv bootargs root=/dev/mmcblk0p${mmcpart} rw " \
144 "rootwait\0" \
145 "mmc_mmc=" \
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146 "run mmcload mmcargs addargs || reset ; " \
147 "bootm ${kernel_addr_r} ; reset\0" \
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148 "netload=tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
149 "net_nfs=" \
150 "run netload nfsargs addip addargs ; " \
151 "bootm ${kernel_addr_r}\0" \
152 "nfsargs=" \
153 "setenv bootargs root=/dev/nfs rw " \
154 "nfsroot=${serverip}:${rootpath}${hostname},v3,tcp\0" \
155 "try_bootscript=" \
156 "mmc rescan;" \
157 "if test -e mmc 0:1 ${bootscript} ; then " \
158 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
159 "then ; " \
160 "echo Running bootscript... ; " \
161 "source ${kernel_addr_r} ; " \
162 "fi ; " \
163 "fi\0"
164
165#endif /* __M53MENLO_CONFIG_H__ */
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