[J-u-boot.git] / include / configs / gr_xc3s_1500.h

/* Configuration header file for Gaisler GR-XC3S-1500
 * spartan board.
 *
 * (C) Copyright 2003-2005
 * Wolfgang Denk, DENX Software Engineering, [email protected].
 *
 * (C) Copyright 2007
 * Daniel Hellstrom, Gaisler Research, [email protected].
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H__
#define __CONFIG_H__

/*
 * High Level Configuration Options
 * (easy to change)
 */

#define CONFIG_GRXC3S1500	1	/* ... on GR-XC3S-1500 board */

/* CPU / AMBA BUS configuration */
#define CONFIG_SYS_CLK_FREQ	40000000	/* 40MHz */

/* Number of SPARC register windows */
#define CONFIG_SYS_SPARC_NWINDOWS 8

/*
 * Serial console configuration
 */
#define CONFIG_BAUDRATE		38400	/* ... at 38400 bps */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }

/* Partitions */
#define CONFIG_DOS_PARTITION
#define CONFIG_MAC_PARTITION
#define CONFIG_ISO_PARTITION

/*
 * Supported commands
 */
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_PING
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_IRQ

/*
 * Autobooting
 */
#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */

#define CONFIG_PREBOOT	"echo;"	\
	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	"echo"

#undef	CONFIG_BOOTARGS

#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth0\0"							\
	"nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw "	\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0"			\
	"addip=setenv bootargs ${bootargs} "				\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"flash_nfs=run nfsargs addip;"					\
		"bootm ${kernel_addr}\0"				\
	"flash_self=run ramargs addip;"					\
		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0"	\
	"scratch=40200000\0"					\
	"getkernel=tftpboot $(scratch) $(bootfile)\0" \
	"bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:grxc3s1500_daniel:eth0\0" \
	""

#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_GATEWAYIP 192.168.0.1
#define CONFIG_SERVERIP 192.168.0.20
#define CONFIG_IPADDR 192.168.0.206
#define CONFIG_ROOTPATH "/export/rootfs"
#define CONFIG_HOSTNAME  grxc3s1500
#define CONFIG_BOOTFILE "/uImage"

#define CONFIG_BOOTCOMMAND	"run flash_self"

/* Memory MAP
 *
 *  Flash:
 *  |--------------------------------|
 *  | 0x00000000 Text & Data & BSS   | *
 *  |            for Monitor         | *
 *  | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
 *  | UNUSED / Growth                | * 256kb
 *  |--------------------------------|
 *  | 0x00050000 Base custom area    | *
 *  |            kernel / FS         | *
 *  |                                | * Rest of Flash
 *  |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
 *  | END-0x00008000 Environment     | * 32kb
 *  |--------------------------------|
 *
 *
 *
 *  Main Memory:
 *  |--------------------------------|
 *  | UNUSED / scratch area          |
 *  |                                |
 *  |                                |
 *  |                                |
 *  |                                |
 *  |--------------------------------|
 *  | Monitor .Text / .DATA / .BSS   | * 256kb
 *  | Relocated!                     | *
 *  |--------------------------------|
 *  | Monitor Malloc                 | * 128kb (contains relocated environment)
 *  |--------------------------------|
 *  | Monitor/kernel STACK           | * 64kb
 *  |--------------------------------|
 *  | Page Table for MMU systems     | * 2k
 *  |--------------------------------|
 *  | PROM Code accessed from Linux  | * 6kb-128b
 *  |--------------------------------|
 *  | Global data (avail from kernel)| * 128b
 *  |--------------------------------|
 *
 */

/*
 * Flash configuration (8,16 or 32 MB)
 * TEXT base always at 0xFFF00000
 * ENV_ADDR always at  0xFFF40000
 * FLASH_BASE at 0xFC000000 for 64 MB
 *               0xFE000000 for 32 MB
 *               0xFF000000 for 16 MB
 *               0xFF800000 for  8 MB
 */
/*#define CONFIG_SYS_NO_FLASH		1*/
#define CONFIG_SYS_FLASH_BASE		0x00000000
#define CONFIG_SYS_FLASH_SIZE		0x00800000

#define PHYS_FLASH_SECT_SIZE	0x00020000	/* 128 KB sectors */
#define CONFIG_SYS_MAX_FLASH_SECT	64	/* max num of sects on one chip */
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of memory banks      */

#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)  */
#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)  */
#define CONFIG_SYS_FLASH_LOCK_TOUT	5	/* Timeout for Flash Set Lock Bit (in ms) */
#define CONFIG_SYS_FLASH_UNLOCK_TOUT	10000	/* Timeout for Flash Clear Lock Bits (in ms) */
#define CONFIG_SYS_FLASH_PROTECTION	/* "Real" (hardware) sectors protection */

/*** CFI CONFIG ***/
#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_8BIT
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
/* Bypass cache when reading regs from flash memory */
#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
/* Buffered writes (32byte/go) instead of single accesses */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE

/*
 * Environment settings
 */
/*#define CONFIG_ENV_IS_NOWHERE 1*/
#define CONFIG_ENV_IS_IN_FLASH	1
/* CONFIG_ENV_ADDR need to be at sector boundary */
#define CONFIG_ENV_SIZE		0x8000
#define CONFIG_ENV_SECT_SIZE	0x20000
#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_OVERWRITE	1

/*
 * Memory map
 */
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define CONFIG_SYS_SDRAM_SIZE		0x4000000
#define CONFIG_SYS_SDRAM_END		(CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)

/* no SRAM available */
#undef CONFIG_SYS_SRAM_BASE
#undef CONFIG_SYS_SRAM_SIZE

/* Always Run U-Boot from SDRAM */
#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END

#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)

#define CONFIG_SYS_PROM_SIZE		(8192-GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)

#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_PROM_OFFSET-32)
#define CONFIG_SYS_STACK_SIZE		(0x10000-32)

#define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#   define CONFIG_SYS_RAMBOOT		1
#endif

#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor   */
#define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()  */
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */

#define CONFIG_SYS_MALLOC_END		(CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
#define CONFIG_SYS_MALLOC_BASE		(CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)

/* relocated monitor area */
#define CONFIG_SYS_RELOC_MONITOR_MAX_END   CONFIG_SYS_MALLOC_BASE
#define CONFIG_SYS_RELOC_MONITOR_BASE     (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)

/* make un relocated address from relocated address */
#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))

/*
 * Ethernet configuration
 */
#define CONFIG_GRETH	1

#define CONFIG_PHY_ADDR	 0x00

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP		/* undef to save memory     */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
#else
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS		16	/* max number of command args   */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size    */

#define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM  */

#define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

/*
 * Various low-level settings
 */

/*-----------------------------------------------------------------------
 * USB stuff
 *-----------------------------------------------------------------------
 */
#define CONFIG_USB_CLOCK	0x0001BBBB
#define CONFIG_USB_CONFIG	0x00005000

/***** Gaisler GRLIB IP-Cores Config ********/

#define CONFIG_SYS_GRLIB_SDRAM    0

/* See, GRLIB Docs (grip.pdf) on how to set up
 * These the memory controller registers.
 */
#define CONFIG_SYS_GRLIB_MEMCFG1   (0x000000ff | (1<<11))
#define CONFIG_SYS_GRLIB_MEMCFG2   0x82206000
#define CONFIG_SYS_GRLIB_MEMCFG3   0x00136000

#define CONFIG_SYS_GRLIB_FT_MEMCFG1   (0x000000ff | (1<<11))
#define CONFIG_SYS_GRLIB_FT_MEMCFG2   0x82206000
#define CONFIG_SYS_GRLIB_FT_MEMCFG3   0x00136000

/* no DDR controller */
#define CONFIG_SYS_GRLIB_DDR_CFG   0x00000000

/* no DDR2 Controller */
#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000

/* Identification string */
#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-XC3S-1500"

/* default kernel command line */
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"

#endif				/* __CONFIG_H */
Commit	Line	Data
71d7e4c0 DH	1	/* Configuration header file for Gaisler GR-XC3S-1500
	2	* spartan board.
	3	*
	4	* (C) Copyright 2003-2005
	5	* Wolfgang Denk, DENX Software Engineering, [email protected].
	6	*
	7	* (C) Copyright 2007
	8	* Daniel Hellstrom, Gaisler Research, [email protected].
	9	*
3765b3e7	10	* SPDX-License-Identifier: GPL-2.0+
71d7e4c0 DH	11	*/
	12
	13	#ifndef __CONFIG_H__
	14	#define __CONFIG_H__
	15
	16	/*
	17	* High Level Configuration Options
	18	* (easy to change)
	19	*/
	20
71d7e4c0 DH	21	#define CONFIG_GRXC3S1500 1 /* ... on GR-XC3S-1500 board */
	22
	23	/* CPU / AMBA BUS configuration */
53677ef1	24	#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
71d7e4c0 DH	25
71d7e4c0 DH	26	/* Number of SPARC register windows */
6d0f6bcf	27	#define CONFIG_SYS_SPARC_NWINDOWS 8
71d7e4c0 DH	28
	29	/*
	30	* Serial console configuration
	31	*/
	32	#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
6d0f6bcf	33	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
71d7e4c0 DH	34
	35	/* Partitions */
	36	#define CONFIG_DOS_PARTITION
	37	#define CONFIG_MAC_PARTITION
	38	#define CONFIG_ISO_PARTITION
	39
	40	/*
	41	* Supported commands
	42	*/
71d7e4c0	43	#define CONFIG_CMD_REGINFO
71d7e4c0 DH	44	#define CONFIG_CMD_PING
	45	#define CONFIG_CMD_DIAG
	46	#define CONFIG_CMD_IRQ
	47
	48	/*
	49	* Autobooting
	50	*/
	51	#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
	52
	53	#define CONFIG_PREBOOT "echo;" \
	54	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	55	"echo"
	56
	57	#undef CONFIG_BOOTARGS
	58
	59	#define CONFIG_EXTRA_ENV_SETTINGS \
	60	"netdev=eth0\0" \
	61	"nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
	62	"nfsroot=${serverip}:${rootpath}\0" \
	63	"ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
	64	"addip=setenv bootargs ${bootargs} " \
	65	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	66	":${hostname}:${netdev}:off panic=1\0" \
	67	"flash_nfs=run nfsargs addip;" \
	68	"bootm ${kernel_addr}\0" \
	69	"flash_self=run ramargs addip;" \
	70	"bootm ${kernel_addr} ${ramdisk_addr}\0" \
	71	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
	72	"scratch=40200000\0" \
3a2b9f28	73	"getkernel=tftpboot $(scratch) $(bootfile)\0" \
71d7e4c0 DH	74	"bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:grxc3s1500_daniel:eth0\0" \
	75	""
	76
	77	#define CONFIG_NETMASK 255.255.255.0
	78	#define CONFIG_GATEWAYIP 192.168.0.1
	79	#define CONFIG_SERVERIP 192.168.0.20
	80	#define CONFIG_IPADDR 192.168.0.206
8b3637c6	81	#define CONFIG_ROOTPATH "/export/rootfs"
71d7e4c0	82	#define CONFIG_HOSTNAME grxc3s1500
b3f44c21	83	#define CONFIG_BOOTFILE "/uImage"
71d7e4c0 DH	84
	85	#define CONFIG_BOOTCOMMAND "run flash_self"
	86
	87	/* Memory MAP
	88	*
	89	* Flash:
	90	* \|--------------------------------\|
	91	* \| 0x00000000 Text & Data & BSS \| *
	92	* \| for Monitor \| *
	93	* \| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\| *
	94	* \| UNUSED / Growth \| * 256kb
	95	* \|--------------------------------\|
	96	* \| 0x00050000 Base custom area \| *
	97	* \| kernel / FS \| *
	98	* \| \| * Rest of Flash
	99	* \|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\|
	100	* \| END-0x00008000 Environment \| * 32kb
	101	* \|--------------------------------\|
	102	*
	103	*
	104	*
	105	* Main Memory:
	106	* \|--------------------------------\|
	107	* \| UNUSED / scratch area \|
	108	* \| \|
	109	* \| \|
	110	* \| \|
	111	* \| \|
	112	* \|--------------------------------\|
	113	* \| Monitor .Text / .DATA / .BSS \| * 256kb
	114	* \| Relocated! \| *
	115	* \|--------------------------------\|
	116	* \| Monitor Malloc \| * 128kb (contains relocated environment)
	117	* \|--------------------------------\|
	118	* \| Monitor/kernel STACK \| * 64kb
	119	* \|--------------------------------\|
	120	* \| Page Table for MMU systems \| * 2k
	121	* \|--------------------------------\|
	122	* \| PROM Code accessed from Linux \| * 6kb-128b
	123	* \|--------------------------------\|
	124	* \| Global data (avail from kernel)\| * 128b
	125	* \|--------------------------------\|
	126	*
	127	*/
	128
	129	/*
	130	* Flash configuration (8,16 or 32 MB)
	131	* TEXT base always at 0xFFF00000
	132	* ENV_ADDR always at 0xFFF40000
	133	* FLASH_BASE at 0xFC000000 for 64 MB
	134	* 0xFE000000 for 32 MB
	135	* 0xFF000000 for 16 MB
	136	* 0xFF800000 for 8 MB
	137	*/
6d0f6bcf JCPV	138	/#define CONFIG_SYS_NO_FLASH 1/
	139	#define CONFIG_SYS_FLASH_BASE 0x00000000
	140	#define CONFIG_SYS_FLASH_SIZE 0x00800000
71d7e4c0 DH	141
71d7e4c0 DH	142	#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
6d0f6bcf JCPV	143	#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
6d0f6bcf JCPV	144	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
71d7e4c0	145
6d0f6bcf JCPV	146	#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
	147	#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
	148	#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
	149	#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
	150	#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
71d7e4c0 DH	151
71d7e4c0 DH	152	/* CFI CONFIG */
6d0f6bcf	153	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
00b1883a	154	#define CONFIG_FLASH_CFI_DRIVER
6d0f6bcf	155	#define CONFIG_SYS_FLASH_CFI
71d7e4c0	156	/* Bypass cache when reading regs from flash memory */
6d0f6bcf	157	#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
71d7e4c0	158	/* Buffered writes (32byte/go) instead of single accesses */
6d0f6bcf	159	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
71d7e4c0 DH	160
	161	/*
	162	* Environment settings
	163	*/
93f6d725	164	/#define CONFIG_ENV_IS_NOWHERE 1/
5a1aceb0	165	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	166	/* CONFIG_ENV_ADDR need to be at sector boundary */
	167	#define CONFIG_ENV_SIZE 0x8000
	168	#define CONFIG_ENV_SECT_SIZE 0x20000
6d0f6bcf	169	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
71d7e4c0 DH	170	#define CONFIG_ENV_OVERWRITE 1
	171
	172	/*
	173	* Memory map
	174	*/
6d0f6bcf JCPV	175	#define CONFIG_SYS_SDRAM_BASE 0x40000000
	176	#define CONFIG_SYS_SDRAM_SIZE 0x4000000
	177	#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
71d7e4c0 DH	178
71d7e4c0 DH	179	/* no SRAM available */
6d0f6bcf JCPV	180	#undef CONFIG_SYS_SRAM_BASE
6d0f6bcf JCPV	181	#undef CONFIG_SYS_SRAM_SIZE
71d7e4c0 DH	182
71d7e4c0 DH	183	/* Always Run U-Boot from SDRAM */
6d0f6bcf JCPV	184	#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
	185	#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
	186	#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
71d7e4c0	187
25ddd1fb	188	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
71d7e4c0	189
25ddd1fb	190	#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
6d0f6bcf	191	#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
71d7e4c0	192
6d0f6bcf JCPV	193	#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
6d0f6bcf JCPV	194	#define CONFIG_SYS_STACK_SIZE (0x10000-32)
71d7e4c0	195
14d0a02a	196	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
6d0f6bcf JCPV	197	#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
6d0f6bcf JCPV	198	# define CONFIG_SYS_RAMBOOT 1
71d7e4c0 DH	199	#endif
71d7e4c0 DH	200
6d0f6bcf JCPV	201	#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
	202	#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
	203	#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
71d7e4c0	204
6d0f6bcf JCPV	205	#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
6d0f6bcf JCPV	206	#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
71d7e4c0 DH	207
71d7e4c0 DH	208	/* relocated monitor area */
6d0f6bcf JCPV	209	#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
6d0f6bcf JCPV	210	#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
71d7e4c0 DH	211
71d7e4c0 DH	212	/* make un relocated address from relocated address */
14d0a02a	213	#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
71d7e4c0 DH	214
	215	/*
	216	* Ethernet configuration
	217	*/
	218	#define CONFIG_GRETH 1
71d7e4c0	219
71d7e4c0 DH	220	#define CONFIG_PHY_ADDR 0x00
	221
	222	/*
	223	* Miscellaneous configurable options
	224	*/
6d0f6bcf	225	#define CONFIG_SYS_LONGHELP /* undef to save memory */
71d7e4c0	226	#if defined(CONFIG_CMD_KGDB)
6d0f6bcf	227	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
71d7e4c0	228	#else
6d0f6bcf	229	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
71d7e4c0	230	#endif
6d0f6bcf JCPV	231	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	232	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	233	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
71d7e4c0	234
6d0f6bcf JCPV	235	#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
6d0f6bcf JCPV	236	#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
71d7e4c0	237
6d0f6bcf	238	#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
71d7e4c0	239
71d7e4c0 DH	240	/*
	241	* Various low-level settings
	242	*/
	243
	244	/*-----------------------------------------------------------------------
	245	* USB stuff
	246	*-----------------------------------------------------------------------
	247	*/
	248	#define CONFIG_USB_CLOCK 0x0001BBBB
	249	#define CONFIG_USB_CONFIG 0x00005000
	250
	251	/*** Gaisler GRLIB IP-Cores Config ******/
	252
6d0f6bcf	253	#define CONFIG_SYS_GRLIB_SDRAM 0
71d7e4c0 DH	254
	255	/* See, GRLIB Docs (grip.pdf) on how to set up
	256	* These the memory controller registers.
	257	*/
6d0f6bcf JCPV	258	#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff \| (1<<11))
	259	#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
	260	#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
71d7e4c0	261
6d0f6bcf JCPV	262	#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x000000ff \| (1<<11))
	263	#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
	264	#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00136000
71d7e4c0 DH	265
71d7e4c0 DH	266	/* no DDR controller */
6d0f6bcf	267	#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
71d7e4c0 DH	268
71d7e4c0 DH	269	/* no DDR2 Controller */
6d0f6bcf JCPV	270	#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
6d0f6bcf JCPV	271	#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
71d7e4c0	272
71d7e4c0 DH	273	/* Identification string */
	274	#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-XC3S-1500"
	275
	276	/* default kernel command line */
	277	#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
	278
	279	#endif /* __CONFIG_H */