projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| cf946c6d LW |
2 | /* |
| 3 | * (C) Copyright 2011 | |
| 4 | * Marvell Semiconductor <www.marvell.com> | |
| 5 | * Written-by: Lei Wen <[email protected]> | |
| cf946c6d LW |
6 | */ |
| 7 | ||
| 8 | /* | |
| 9 | * This file should be included in board config header file. | |
| 10 | * | |
| 11 | * It supports common definitions for Kirkwood platform | |
| 12 | */ | |
| 13 | ||
| 14 | #ifndef _KW_CONFIG_H | |
| 15 | #define _KW_CONFIG_H | |
| 16 | ||
| 17 | #if defined (CONFIG_KW88F6281) | |
| 18 | #include <asm/arch/kw88f6281.h> | |
| 19 | #elif defined (CONFIG_KW88F6192) | |
| 20 | #include <asm/arch/kw88f6192.h> | |
| 21 | #else | |
| 22 | #error "SOC Name not defined" | |
| 23 | #endif /* CONFIG_KW88F6281 */ | |
| 24 | ||
| 3dc23f78 | 25 | #include <asm/arch/soc.h> |
| cf946c6d | 26 | |
| dd82242b | 27 | #define CONFIG_I2C_MVTWSI_BASE0 KW_TWSI_BASE |
| cf946c6d LW |
28 | #define MV_UART_CONSOLE_BASE KW_UART0_BASE |
| 29 | #define MV_SATA_BASE KW_SATA_BASE | |
| 30 | #define MV_SATA_PORT0_OFFSET KW_SATA_PORT0_OFFSET | |
| 31 | #define MV_SATA_PORT1_OFFSET KW_SATA_PORT1_OFFSET | |
| 32 | ||
| 33 | /* | |
| 34 | * NAND configuration | |
| 35 | */ | |
| 36 | #ifdef CONFIG_CMD_NAND | |
| 37 | #define CONFIG_NAND_KIRKWOOD | |
| 4e590945 | 38 | #define CFG_SYS_NAND_BASE 0xD8000000 /* MV_DEFADR_NANDF */ |
| cf946c6d LW |
39 | #define NAND_ALLOW_ERASE_ALL 1 |
| 40 | #endif | |
| 41 | ||
| cf946c6d LW |
42 | /* |
| 43 | * IDE Support on SATA ports | |
| 44 | */ | |
| fc843a02 | 45 | #ifdef CONFIG_IDE |
| cf946c6d | 46 | #define __io |
| cf946c6d | 47 | /* Data, registers and alternate blocks are at the same offset */ |
| cf946c6d | 48 | /* Each 8-bit ATA register is aligned to a 4-bytes address */ |
| fc843a02 | 49 | /* CONFIG_IDE requires some #defines for ATA registers */ |
| cf946c6d | 50 | /* ATA registers base is at SATA controller base */ |
| fc843a02 | 51 | #endif /* CONFIG_IDE */ |
| cf946c6d | 52 | |
| 2fbc18fe | 53 | /* Use common timer */ |
| 78c9b85d | 54 | #ifndef CONFIG_TIMER |
| 2fbc18fe SR |
55 | #define CONFIG_SYS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14) |
| 56 | #define CONFIG_SYS_TIMER_RATE CONFIG_SYS_TCLK | |
| 78c9b85d | 57 | #endif |
| 2fbc18fe | 58 | |
| cf946c6d | 59 | #endif /* _KW_CONFIG_H */ |