projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 27e166b8 WD |
1 | ====================================================================== |
| 2 | Changes since U-Boot 1.1.4: | |
| 3 | ====================================================================== | |
| 4 | ||
| 5fbb2cd3 WD |
5 | * Fix Lite5200B support: initialize SDelay register |
| 6 | See Freescale's AN3221 "MPC5200B SDRAM Initialization and | |
| 7 | Configuration", 3.3.1 SDelay--MBAR + 0x0190 | |
| 8 | ||
| 2662b40c SR |
9 | * Changes/fixes for drivers/cfi_flash.c: |
| 10 | ||
| 11 | - Add Intel legacy lock/unlock support to common CFI driver | |
| 12 | ||
| 13 | On some Intel flash's (e.g. Intel J3) legacy unlocking is | |
| 14 | supported, meaning that unlocking of one sector will unlock | |
| 15 | all sectors of this bank. Using this feature, unlocking | |
| 16 | of all sectors upon startup (via env var "unlock=yes") will | |
| 17 | get much faster. | |
| 18 | ||
| 19 | - Fixed problem with multiple reads of envronment variable | |
| 20 | "unlock" as pointed out by Reinhard Arlt & Anders Larsen. | |
| 21 | ||
| 22 | - Removed unwanted linefeeds from "protect" command when | |
| 23 | CFG_FLASH_PROTECTION is enabled. | |
| 24 | ||
| 25 | - Changed p3p400 board to use CFG_FLASH_PROTECTION | |
| 26 | ||
| 27 | Patch by Stefan Roese, 01 Apr 2006 | |
| 28 | ||
| 29 | * Changes/fixes for drivers/cfi_flash.c: | |
| 30 | - Correctly handle the cases where CFG_HZ != 1000 (several | |
| 31 | XScale-based boards) | |
| 32 | - Fix the timeout calculation of buffered writes (off by a | |
| 33 | factor of 1000) | |
| 34 | Patch by Anders Larsen, 31 Mar 2006 | |
| 35 | ||
| 35118539 SR |
36 | * Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440) |
| 37 | ||
| 38 | 405 SDRAM: - The SDRAM parameters can now be defined in the board | |
| 39 | config file and the 405 SDRAM controller values will | |
| 40 | be calculated upon bootup (see PPChameleonEVB). | |
| 41 | When those settings are not defined in the board | |
| 42 | config file, the register setup will be as it is now, | |
| 43 | so this implementation should not break any current | |
| 44 | design using this code. | |
| 45 | ||
| 46 | Thanks to Andrea Marson from DAVE for this patch. | |
| 47 | ||
| 48 | 440 DDR: - Added function sdram_tr1_set to auto calculate the | |
| 49 | TR1 value for the DDR. | |
| 50 | - Added ECC support (see p3p440). | |
| 51 | ||
| 52 | Patch by Stefan Roese, 17 Mar 2006 | |
| 53 | ||
| db28ddb4 WD |
54 | * Fix CONFIG_SKIP_LOWLEVEL_INIT dependency in cpu/arm920t/start.S |
| 55 | Patch by Peter Menzebach, 13 Oct 2005 [DNX#2006040142000473] | |
| 56 | ||
| 534ff676 WD |
57 | * Add support for ymodem protocol download |
| 58 | Patch by Stefano Babic, 29 Mar 2006 | |
| 59 | ||
| 60 | * Memory Map Update for Delta board: U-Boot is at 0x80000000-0x84000000 | |
| 61 |