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Commit | Line | Data |
---|---|---|
2d257d92 VR |
1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_K3=y | |
3 | CONFIG_SYS_MALLOC_F_LEN=0x8000 | |
4 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | |
5 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
6 | CONFIG_NR_DRAM_BANKS=2 | |
7 | CONFIG_SOC_K3_AM625=y | |
8 | CONFIG_K3_ATF_LOAD_ADDR=0x9e780000 | |
9 | CONFIG_TARGET_AM625_A53_EVM=y | |
fcb5117d | 10 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
5c64598b | 11 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80b80000 |
c960c0fd | 12 | CONFIG_SF_DEFAULT_SPEED=25000000 |
21d39eb5 | 13 | CONFIG_SPL_DM_SPI=y |
2d257d92 VR |
14 | CONFIG_DEFAULT_DEVICE_TREE="k3-am625-sk" |
15 | CONFIG_SPL_TEXT_BASE=0x80080000 | |
c960c0fd | 16 | CONFIG_OF_LIBFDT_OVERLAY=y |
fcb5117d | 17 | CONFIG_DM_RESET=y |
2d257d92 VR |
18 | CONFIG_SPL_MMC=y |
19 | CONFIG_SPL_SERIAL=y | |
20 | CONFIG_SPL_STACK_R_ADDR=0x82000000 | |
5c64598b NJ |
21 | CONFIG_SPL_SIZE_LIMIT=0x40000 |
22 | CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800 | |
2d257d92 VR |
23 | CONFIG_SPL_FS_FAT=y |
24 | CONFIG_SPL_LIBDISK_SUPPORT=y | |
21d39eb5 | 25 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
04150400 | 26 | CONFIG_SPL_SPI=y |
17771b32 | 27 | # CONFIG_PSCI_RESET is not set |
2d257d92 VR |
28 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
29 | CONFIG_SPL_LOAD_FIT=y | |
30 | CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 | |
355c0afc NM |
31 | CONFIG_BOOTSTD_FULL=y |
32 | CONFIG_BOOTSTD_DEFAULTS=y | |
42fb448a | 33 | CONFIG_SYS_BOOTM_LEN=0x800000 |
355c0afc | 34 | CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" |
1e587054 | 35 | CONFIG_SPL_MAX_SIZE=0x58000 |
2d257d92 | 36 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
5c64598b | 37 | CONFIG_SPL_BSS_START_ADDR=0x80c80000 |
2d257d92 | 38 | CONFIG_SPL_BSS_MAX_SIZE=0x80000 |
5c64598b | 39 | CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y |
2d257d92 VR |
40 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
41 | CONFIG_SPL_STACK_R=y | |
42 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y | |
43 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 | |
44 | CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" | |
45 | CONFIG_SPL_DM_MAILBOX=y | |
04150400 | 46 | CONFIG_SPL_DM_SPI_FLASH=y |
2d257d92 | 47 | CONFIG_SPL_POWER_DOMAIN=y |
04150400 DG |
48 | # CONFIG_SPL_SPI_FLASH_TINY is not set |
49 | CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y | |
04150400 DG |
50 | CONFIG_SPL_SPI_LOAD=y |
51 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 | |
2d257d92 VR |
52 | CONFIG_SPL_YMODEM_SUPPORT=y |
53 | CONFIG_CMD_MMC=y | |
54 | CONFIG_OF_CONTROL=y | |
55 | CONFIG_SPL_OF_CONTROL=y | |
56 | CONFIG_MULTI_DTB_FIT=y | |
57 | CONFIG_SPL_MULTI_DTB_FIT=y | |
58 | CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y | |
59 | CONFIG_NET_RANDOM_ETHADDR=y | |
2d257d92 VR |
60 | CONFIG_SPL_DM=y |
61 | CONFIG_SPL_DM_SEQ_ALIAS=y | |
62 | CONFIG_REGMAP=y | |
63 | CONFIG_SPL_REGMAP=y | |
64 | CONFIG_SPL_OF_TRANSLATE=y | |
65 | CONFIG_CLK=y | |
66 | CONFIG_SPL_CLK=y | |
67 | CONFIG_CLK_TI_SCI=y | |
92a15f69 SS |
68 | CONFIG_DMA_CHANNELS=y |
69 | CONFIG_TI_K3_NAVSS_UDMA=y | |
2d257d92 VR |
70 | CONFIG_TI_SCI_PROTOCOL=y |
71 | CONFIG_DM_MAILBOX=y | |
72 | CONFIG_K3_SEC_PROXY=y | |
e9113472 | 73 | CONFIG_SUPPORT_EMMC_BOOT=y |
2d257d92 VR |
74 | CONFIG_MMC_SDHCI=y |
75 | CONFIG_MMC_SDHCI_ADMA=y | |
76 | CONFIG_SPL_MMC_SDHCI_ADMA=y | |
77 | CONFIG_MMC_SDHCI_AM654=y | |
db04ff42 | 78 | CONFIG_MTD=y |
04150400 | 79 | CONFIG_DM_SPI_FLASH=y |
04150400 DG |
80 | CONFIG_SPI_FLASH_SFDP_SUPPORT=y |
81 | CONFIG_SPI_FLASH_SOFT_RESET=y | |
82 | CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y | |
83 | CONFIG_SPI_FLASH_SPANSION=y | |
a8ddc37e | 84 | CONFIG_SPI_FLASH_S28HX_T=y |
92a15f69 SS |
85 | CONFIG_PHY_TI_DP83867=y |
86 | CONFIG_PHY_FIXED=y | |
87 | CONFIG_TI_AM65_CPSW_NUSS=y | |
88 | CONFIG_PHY=y | |
2d257d92 VR |
89 | CONFIG_PINCTRL=y |
90 | CONFIG_SPL_PINCTRL=y | |
91 | CONFIG_PINCTRL_SINGLE=y | |
92 | CONFIG_POWER_DOMAIN=y | |
93 | CONFIG_TI_SCI_POWER_DOMAIN=y | |
94 | CONFIG_K3_SYSTEM_CONTROLLER=y | |
95 | CONFIG_REMOTEPROC_TI_K3_ARM64=y | |
2d257d92 VR |
96 | CONFIG_RESET_TI_SCI=y |
97 | CONFIG_DM_SERIAL=y | |
98 | CONFIG_SOC_DEVICE=y | |
99 | CONFIG_SOC_DEVICE_TI_K3=y | |
100 | CONFIG_SOC_TI=y | |
04150400 DG |
101 | CONFIG_SPI=y |
102 | CONFIG_DM_SPI=y | |
103 | CONFIG_CADENCE_QSPI=y | |
2d257d92 VR |
104 | CONFIG_SYSRESET=y |
105 | CONFIG_SPL_SYSRESET=y | |
106 | CONFIG_SYSRESET_TI_SCI=y | |
107 | CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 |