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Commit | Line | Data |
---|---|---|
76880b08 | 1 | CONFIG_MIPS=y |
a2ac2b96 | 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
9802154a | 3 | CONFIG_SYS_MALLOC_LEN=0x100000 |
76880b08 WG |
4 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
5 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
6 | CONFIG_NR_DRAM_BANKS=1 | |
7 | CONFIG_ENV_SIZE=0x1000 | |
8 | CONFIG_ENV_OFFSET=0x30000 | |
9 | CONFIG_ENV_SECT_SIZE=0x10000 | |
2bba7807 | 10 | CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-mt7530-rfb" |
2a736066 | 11 | CONFIG_SPL_SERIAL=y |
76880b08 WG |
12 | CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 |
13 | CONFIG_SPL=y | |
14 | CONFIG_DEBUG_UART_BASE=0xb0000c00 | |
15 | CONFIG_DEBUG_UART_CLOCK=40000000 | |
d46e86d2 | 16 | CONFIG_SYS_LOAD_ADDR=0x80010000 |
76880b08 WG |
17 | CONFIG_ARCH_MTMIPS=y |
18 | CONFIG_BOARD_MT7620_MT7530_RFB=y | |
a29491ad | 19 | CONFIG_SYS_MIPS_TIMER_FREQ=290000000 |
a2ac2b96 TR |
20 | CONFIG_MIPS_CACHE_SETUP=y |
21 | CONFIG_MIPS_CACHE_DISABLE=y | |
76880b08 WG |
22 | CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y |
23 | CONFIG_MIPS_BOOT_FDT=y | |
24 | CONFIG_DEBUG_UART=y | |
25 | CONFIG_FIT=y | |
42fb448a | 26 | CONFIG_SYS_BOOTM_LEN=0x1000000 |
76880b08 | 27 | # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set |
167f699b | 28 | CONFIG_SYS_MALLOC_BOOTPARAMS=y |
ca8a329a | 29 | CONFIG_SPL_MAX_SIZE=0x10000 |
6600b355 | 30 | CONFIG_SPL_BSS_START_ADDR=0x80010000 |
9b5f9aeb | 31 | CONFIG_SPL_BSS_MAX_SIZE=0x10000 |
76880b08 WG |
32 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
33 | CONFIG_SPL_NOR_SUPPORT=y | |
34 | # CONFIG_CMD_ELF is not set | |
35 | # CONFIG_CMD_XIMG is not set | |
36 | # CONFIG_CMD_CRC32 is not set | |
37 | # CONFIG_CMD_DM is not set | |
38 | CONFIG_CMD_GPIO=y | |
39 | # CONFIG_CMD_LOADS is not set | |
40 | CONFIG_CMD_SPI=y | |
76880b08 WG |
41 | CONFIG_CMD_MII=y |
42 | # CONFIG_CMD_MDIO is not set | |
76880b08 WG |
43 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupts resets reset-names" |
44 | CONFIG_ENV_IS_IN_SPI_FLASH=y | |
45 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | |
46 | CONFIG_NET_RANDOM_ETHADDR=y | |
47 | CONFIG_SPL_DM=y | |
48 | # CONFIG_SIMPLE_BUS is not set | |
49 | # CONFIG_SPL_SIMPLE_BUS is not set | |
50 | CONFIG_GPIO_HOG=y | |
51 | # CONFIG_INPUT is not set | |
52 | CONFIG_SPI_FLASH_SFDP_SUPPORT=y | |
53 | CONFIG_SPI_FLASH_EON=y | |
54 | CONFIG_SPI_FLASH_GIGADEVICE=y | |
55 | CONFIG_SPI_FLASH_ISSI=y | |
56 | CONFIG_SPI_FLASH_MACRONIX=y | |
57 | CONFIG_SPI_FLASH_SPANSION=y | |
58 | CONFIG_SPI_FLASH_STMICRO=y | |
59 | CONFIG_SPI_FLASH_WINBOND=y | |
60 | CONFIG_SPI_FLASH_XMC=y | |
61 | CONFIG_MT7620_ETH=y | |
62 | CONFIG_SPECIFY_CONSOLE_INDEX=y | |
63 | CONFIG_DEBUG_UART_SHIFT=2 | |
64 | CONFIG_SPI=y | |
65 | CONFIG_MT7620_SPI=y | |
66 | CONFIG_LZMA=y | |
67 | CONFIG_SPL_LZMA=y |