projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 0d331c03 | 1 | CONFIG_ARM=y |
| 344a0e43 | 2 | CONFIG_ARCH_IMX8=y |
| 98463903 | 3 | CONFIG_TEXT_BASE=0x80020000 |
| 9802154a TR |
4 | CONFIG_SYS_MALLOC_LEN=0x2400000 |
| 5 | CONFIG_SYS_MALLOC_F_LEN=0x8000 | |
| 83061dbd | 6 | CONFIG_SPL_GPIO=y |
| 0d331c03 PF |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
| 554e5514 | 9 | CONFIG_NR_DRAM_BANKS=3 |
| fcb5117d TR |
10 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 11 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 | |
| 052170c6 TR |
12 | CONFIG_ENV_SIZE=0x1000 |
| 13 | CONFIG_ENV_OFFSET=0x400000 | |
| 14 | CONFIG_DM_GPIO=y | |
| 2bba7807 | 15 | CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-mek" |
| c5a6e9f8 | 16 | CONFIG_SPL_TEXT_BASE=0x100000 |
| 0d331c03 | 17 | CONFIG_TARGET_IMX8QM_MEK=y |
| 103c5f18 | 18 | CONFIG_SPL_MMC=y |
| 2a736066 | 19 | CONFIG_SPL_SERIAL=y |
| 9ca00684 | 20 | CONFIG_SPL_DRIVERS_MISC=y |
| fcb5117d | 21 | CONFIG_SPL_STACK=0x13e000 |
| 18e791c4 TR |
22 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 23 | CONFIG_SPL_BSS_START_ADDR=0x128000 | |
| 24 | CONFIG_SPL_BSS_MAX_SIZE=0x1000 | |
| 49c8ef0e | 25 | CONFIG_SYS_LOAD_ADDR=0x80280000 |
| d8927020 | 26 | CONFIG_SPL=y |
| d46e86d2 | 27 | CONFIG_REMAKE_ELF=y |
| d8927020 | 28 | # CONFIG_EFI_LOADER is not set |
| 4aa73882 OG |
29 | CONFIG_FIT=y |
| 30 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | |
| ec6f06bd | 31 | CONFIG_BOOTDELAY=3 |
| f76750d1 | 32 | CONFIG_OF_BOARD_SETUP=y |
| 6e92cae3 | 33 | CONFIG_OF_SYSTEM_SETUP=y |
| 970bf860 TR |
34 | CONFIG_USE_BOOTCOMMAND=y |
| 35 | CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if test ${sec_boot} = yes; then if run loadcntr; then run mmcboot; else run netboot; fi; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" | |
| 42fb448a TR |
36 | CONFIG_SYS_CBSIZE=256 |
| 37 | CONFIG_SYS_PBSIZE=276 | |
| 0d331c03 | 38 | CONFIG_LOG=y |
| eabbf801 | 39 | CONFIG_BOARD_EARLY_INIT_F=y |
| ca8a329a | 40 | CONFIG_SPL_MAX_SIZE=0x1f000 |
| 0d331c03 | 41 | CONFIG_SPL_BOARD_INIT=y |
| ab12179b SA |
42 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
| 43 | # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set | |
| 4bb6f612 TR |
44 | CONFIG_SPL_LOAD_IMX_CONTAINER=y |
| 45 | CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qm_mek/uboot-container.cfg" | |
| f31f8b04 | 46 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
| f113d7d3 | 47 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| 82e26e0d SG |
48 | CONFIG_SPL_SYS_MALLOC=y |
| 49 | CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y | |
| 50 | CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x120000 | |
| 51 | CONFIG_SPL_SYS_MALLOC_SIZE=0x3000 | |
| 2a00d73d | 52 | CONFIG_SPL_SYS_MMCSD_RAW_MODE=y |
| f76750d1 | 53 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 |
| 0d331c03 | 54 | CONFIG_SPL_POWER_DOMAIN=y |
| 078111b9 | 55 | CONFIG_SPL_WATCHDOG=y |
| f31f8b04 | 56 | CONFIG_HUSH_PARSER=y |
| 0d331c03 | 57 | CONFIG_CMD_CPU=y |
| 4b0bcfa7 | 58 | # CONFIG_BOOTM_NETBSD is not set |
| e985eb14 | 59 | # CONFIG_CMD_EXPORTENV is not set |
| 0d331c03 | 60 | # CONFIG_CMD_IMPORTENV is not set |
| e985eb14 | 61 | # CONFIG_CMD_CRC32 is not set |
| 0d331c03 PF |
62 | CONFIG_CMD_CLK=y |
| 63 | CONFIG_CMD_DM=y | |
| 64 | CONFIG_CMD_GPIO=y | |
| 65 | CONFIG_CMD_I2C=y | |
| 66 | CONFIG_CMD_MMC=y | |
| 67 | CONFIG_CMD_DHCP=y | |
| 68 | CONFIG_CMD_MII=y | |
| 69 | CONFIG_CMD_PING=y | |
| 70 | CONFIG_CMD_CACHE=y | |
| 71 | CONFIG_CMD_FAT=y | |
| 72 | CONFIG_SPL_OF_CONTROL=y | |
| e91907a1 | 73 | CONFIG_ENV_OVERWRITE=y |
| 0d331c03 | 74 | CONFIG_ENV_IS_IN_MMC=y |
| 8d8ee47e | 75 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 7d080773 | 76 | CONFIG_SYS_MMC_ENV_DEV=1 |
| f84b48a1 | 77 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
| 0d331c03 PF |
78 | CONFIG_SPL_DM=y |
| 79 | CONFIG_SPL_CLK=y | |
| 80 | CONFIG_CLK_IMX8=y | |
| 81 | CONFIG_CPU=y | |
| 0d331c03 PF |
82 | CONFIG_MXC_GPIO=y |
| 83 | CONFIG_DM_PCA953X=y | |
| 84 | CONFIG_DM_I2C=y | |
| 85 | CONFIG_SYS_I2C_IMX_LPI2C=y | |
| 86 | CONFIG_I2C_MUX=y | |
| 87 | CONFIG_I2C_MUX_PCA954x=y | |
| bca1bce9 | 88 | CONFIG_SUPPORT_EMMC_BOOT=y |
| 3f70bef1 | 89 | CONFIG_FSL_USDHC=y |
| 0d331c03 PF |
90 | CONFIG_PHYLIB=y |
| 91 | CONFIG_PHY_ADDR_ENABLE=y | |
| 92 | CONFIG_PHY_ATHEROS=y | |
| 0d331c03 PF |
93 | CONFIG_PHY_GIGE=y |
| 94 | CONFIG_FEC_MXC_SHARE_MDIO=y | |
| 95 | CONFIG_FEC_MXC_MDIO_BASE=0x5B040000 | |
| 96 | CONFIG_FEC_MXC=y | |
| 97 | CONFIG_MII=y | |
| 98 | CONFIG_PINCTRL=y | |
| 99 | CONFIG_SPL_PINCTRL=y | |
| 100 | CONFIG_PINCTRL_IMX8=y | |
| 101 | CONFIG_POWER_DOMAIN=y | |
| 102 | CONFIG_IMX8_POWER_DOMAIN=y | |
| 103 | CONFIG_DM_REGULATOR=y | |
| 104 | CONFIG_SPL_DM_REGULATOR=y | |
| 105 | CONFIG_DM_REGULATOR_FIXED=y | |
| 106 | CONFIG_DM_REGULATOR_GPIO=y | |
| 107 | CONFIG_SPL_DM_REGULATOR_GPIO=y | |
| 108 | CONFIG_DM_SERIAL=y | |
| 109 | CONFIG_FSL_LPUART=y | |
| 110 | CONFIG_SPL_TINY_MEMSET=y |