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3d3befa7 WD |
1 | /* |
2 | * (C) Copyright 2003 | |
3 | * Texas Instruments. | |
4 | * Kshitij Gupta <[email protected]> | |
5 | * Configuation settings for the TI OMAP Innovator board. | |
6 | * | |
7 | * (C) Copyright 2004 | |
8 | * ARM Ltd. | |
9 | * Philippe Robin, <[email protected]> | |
10 | * Configuration for Compact Integrator board. | |
11 | * | |
3765b3e7 | 12 | * SPDX-License-Identifier: GPL-2.0+ |
3d3befa7 WD |
13 | */ |
14 | ||
15 | #ifndef __CONFIG_H | |
16 | #define __CONFIG_H | |
17 | ||
e62b008f | 18 | #include "integrator-common.h" |
7c0e483d | 19 | |
e62b008f LW |
20 | /* Integrator CP-specific configuration */ |
21 | #define CONFIG_ARCH_CINTEGRATOR | |
6d0f6bcf | 22 | #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer 1 is clocked at 1Mhz */ |
3d3befa7 WD |
23 | |
24 | /* | |
25 | * Hardware drivers | |
26 | */ | |
7194ab80 | 27 | #define CONFIG_SMC91111 |
3d3befa7 WD |
28 | #define CONFIG_SMC_USE_32_BIT |
29 | #define CONFIG_SMC91111_BASE 0xC8000000 | |
30 | #undef CONFIG_SMC91111_EXT_PHY | |
31 | ||
e62b008f | 32 | /* PL011 configuration */ |
48d0192f | 33 | #define CONFIG_PL011_SERIAL |
6705d81e | 34 | #define CONFIG_PL011_CLOCK 14745600 |
6d0f6bcf | 35 | #define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, (void *)CONFIG_SYS_SERIAL1 } |
3d3befa7 | 36 | #define CONFIG_CONS_INDEX 0 |
5a95f6fb | 37 | #define CONFIG_BAUDRATE 38400 |
6d0f6bcf JCPV |
38 | #define CONFIG_SYS_SERIAL0 0x16000000 |
39 | #define CONFIG_SYS_SERIAL1 0x17000000 | |
3d3befa7 | 40 | |
5a95f6fb | 41 | /* |
1d2c6bc4 JL |
42 | * Command line configuration. |
43 | */ | |
7c0e483d | 44 | #include <config_cmd_default.h> |
3d3befa7 | 45 | |
3d3befa7 | 46 | #define CONFIG_BOOTDELAY 2 |
7c0e483d LW |
47 | #define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" |
48 | #define CONFIG_BOOTCOMMAND "tftpboot ; bootm" | |
49 | #define CONFIG_SERVERIP 192.168.1.100 | |
50 | #define CONFIG_IPADDR 192.168.1.104 | |
51 | #define CONFIG_BOOTFILE "uImage" | |
74f4304e | 52 | |
3d3befa7 WD |
53 | /* |
54 | * Miscellaneous configurable options | |
55 | */ | |
6d0f6bcf | 56 | #define CONFIG_SYS_PROMPT "Integrator-CP # " /* Monitor Command Prompt */ |
3d3befa7 | 57 | |
e62b008f | 58 | /* |
3d3befa7 | 59 | * FLASH and environment organization |
9b880bd4 WD |
60 | * Top varies according to amount fitted |
61 | * Reserve top 4 blocks of flash | |
62 | * - ARM Boot Monitor | |
63 | * - Unused | |
64 | * - SIB block | |
65 | * - U-Boot environment | |
66 | * | |
67 | * Base is always 0x24000000 | |
3d3befa7 | 68 | */ |
6d0f6bcf | 69 | #define CONFIG_SYS_FLASH_BASE 0x24000000 |
46937b27 JCPV |
70 | #define CONFIG_SYS_FLASH_CFI 1 |
71 | #define CONFIG_FLASH_CFI_DRIVER 1 | |
6d0f6bcf JCPV |
72 | #define CONFIG_SYS_MAX_FLASH_SECT 64 |
73 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ | |
46937b27 | 74 | #define PHYS_FLASH_SIZE 0x01000000 /* 16MB */ |
6d0f6bcf JCPV |
75 | #define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
76 | #define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ | |
3d3befa7 | 77 | |
6d0f6bcf | 78 | #define CONFIG_SYS_MONITOR_LEN 0x00100000 |
5a1aceb0 | 79 | #define CONFIG_ENV_IS_IN_FLASH 1 |
9b880bd4 WD |
80 | |
81 | /* | |
82 | * Move up the U-Boot & monitor area if more flash is fitted. | |
83 | * If this U-Boot is to be run on Integrators with varying flash sizes, | |
7817cb20 | 84 | * drivers/mtd/cfi_flash.c::flash_init() can read the Integrator CP_FLASHPROG |
6d0f6bcf JCPV |
85 | * register and dynamically assign CONFIG_ENV_ADDR & CONFIG_SYS_MONITOR_BASE |
86 | * - CONFIG_SYS_MONITOR_BASE is set to indicate that the environment is not | |
9b880bd4 WD |
87 | * embedded in the boot monitor(s) area |
88 | */ | |
89 | #if ( PHYS_FLASH_SIZE == 0x04000000 ) | |
90 | ||
0e8d1586 | 91 | #define CONFIG_ENV_ADDR 0x27F00000 |
6d0f6bcf | 92 | #define CONFIG_SYS_MONITOR_BASE 0x27F40000 |
9b880bd4 WD |
93 | |
94 | #elif (PHYS_FLASH_SIZE == 0x02000000 ) | |
95 | ||
0e8d1586 | 96 | #define CONFIG_ENV_ADDR 0x25F00000 |
6d0f6bcf | 97 | #define CONFIG_SYS_MONITOR_BASE 0x25F40000 |
9b880bd4 WD |
98 | |
99 | #else | |
100 | ||
0e8d1586 | 101 | #define CONFIG_ENV_ADDR 0x24F00000 |
6d0f6bcf | 102 | #define CONFIG_SYS_MONITOR_BASE 0x27F40000 |
9b880bd4 WD |
103 | |
104 | #endif | |
105 | ||
0e8d1586 JCPV |
106 | #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */ |
107 | #define CONFIG_ENV_SIZE 8192 /* 8KB */ | |
9b880bd4 | 108 | |
5a95f6fb | 109 | #endif /* __CONFIG_H */ |