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44b5c40b NF |
1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | |
3 | * Configuration file for the SAMA5D27 WLSOM1 EK Board. | |
4 | * | |
5 | * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries | |
6 | * | |
7 | * Author: Nicolas Ferre <[email protected]> | |
8 | */ | |
9 | ||
10 | #ifndef __CONFIG_H | |
11 | #define __CONFIG_H | |
12 | ||
13 | #include "at91-sama5_common.h" | |
14 | ||
15 | #undef CONFIG_SYS_AT91_MAIN_CLOCK | |
16 | #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ | |
17 | ||
18 | /* SDRAM */ | |
19 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 | |
20 | #define CONFIG_SYS_SDRAM_SIZE 0x10000000 | |
21 | ||
c721c22a EH |
22 | #ifdef CONFIG_SPL_BUILD |
23 | #define CONFIG_SYS_INIT_SP_ADDR 0x218000 | |
24 | #else | |
44b5c40b NF |
25 | #define CONFIG_SYS_INIT_SP_ADDR \ |
26 | (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) | |
c721c22a | 27 | #endif |
44b5c40b | 28 | |
c721c22a | 29 | /* SPL */ |
c721c22a EH |
30 | #define CONFIG_SPL_MAX_SIZE 0x10000 |
31 | #define CONFIG_SPL_BSS_START_ADDR 0x20000000 | |
32 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 | |
33 | #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 | |
34 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 | |
35 | ||
36 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) | |
44b5c40b NF |
37 | |
38 | #ifdef CONFIG_SD_BOOT | |
c721c22a | 39 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
44b5c40b NF |
40 | #endif |
41 | ||
42 | #endif |