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Commit | Line | Data |
---|---|---|
cade865a NA |
1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_MESON=y | |
278b90ce | 3 | CONFIG_SYS_TEXT_BASE=0x01000000 |
cade865a | 4 | CONFIG_MESON_GXL=y |
d168bcb6 | 5 | CONFIG_NR_DRAM_BANKS=1 |
358b6a20 TR |
6 | CONFIG_DEBUG_UART_BASE=0xc81004c0 |
7 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
cade865a | 8 | CONFIG_IDENT_STRING=" p212" |
cade865a | 9 | CONFIG_DEBUG_UART=y |
7af2e364 | 10 | CONFIG_OF_BOARD_SETUP=y |
7ae27294 | 11 | CONFIG_CONSOLE_MUX=y |
8ccf98b1 | 12 | CONFIG_MISC_INIT_R=y |
cade865a | 13 | # CONFIG_DISPLAY_CPUINFO is not set |
cade865a NA |
14 | # CONFIG_CMD_BDI is not set |
15 | # CONFIG_CMD_IMI is not set | |
cade865a | 16 | CONFIG_CMD_GPIO=y |
7af2e364 TR |
17 | # CONFIG_CMD_LOADS is not set |
18 | CONFIG_CMD_MMC=y | |
e3f7c4f8 | 19 | CONFIG_CMD_USB=y |
cade865a | 20 | # CONFIG_CMD_SETEXPR is not set |
e3f7c4f8 | 21 | CONFIG_CMD_REGULATOR=y |
cade865a | 22 | CONFIG_OF_CONTROL=y |
8c5cad05 | 23 | CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-p212" |
7af2e364 | 24 | CONFIG_NET_RANDOM_ETHADDR=y |
cade865a NA |
25 | CONFIG_DM_GPIO=y |
26 | CONFIG_DM_MMC=y | |
27 | CONFIG_MMC_MESON_GX=y | |
16879cd2 | 28 | CONFIG_PHY_ADDR_ENABLE=y |
b30c4190 | 29 | CONFIG_PHY_ADDR=8 |
7af2e364 | 30 | CONFIG_PHY_MESON_GXL=y |
ae0d82fc NA |
31 | CONFIG_DM_ETH=y |
32 | CONFIG_ETH_DESIGNWARE=y | |
3eae864a TR |
33 | CONFIG_PHY=y |
34 | CONFIG_MESON_GXL_USB_PHY=y | |
cade865a NA |
35 | CONFIG_PINCTRL=y |
36 | CONFIG_PINCTRL_MESON_GXL=y | |
3eae864a TR |
37 | CONFIG_DM_REGULATOR=y |
38 | CONFIG_DM_REGULATOR_FIXED=y | |
39 | CONFIG_DM_RESET=y | |
cade865a | 40 | CONFIG_DEBUG_UART_MESON=y |
cade865a NA |
41 | CONFIG_DEBUG_UART_ANNOUNCE=y |
42 | CONFIG_DEBUG_UART_SKIP_INIT=y | |
43 | CONFIG_MESON_SERIAL=y | |
e3f7c4f8 NA |
44 | CONFIG_USB=y |
45 | CONFIG_DM_USB=y | |
46 | CONFIG_USB_XHCI_HCD=y | |
47 | CONFIG_USB_XHCI_DWC3=y | |
48 | CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y | |
49 | CONFIG_USB_DWC3=y | |
3eae864a | 50 | CONFIG_OF_LIBFDT_OVERLAY=y |