[J-u-boot.git] / include / configs / grasshopper.h

/*
 * Copyright (C) 2011
 * Corscience GmbH & Co.KG, Andreas Bießmann <[email protected]>
 *
 * Configuration settings for the grasshopper (ICnova AP7000) board
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#ifndef __GRASSHOPPER_CONFIG_H
#define __GRASSHOPPER_CONFIG_H

#include <asm/arch/hardware.h>

#define CONFIG_AT32AP
#define CONFIG_AT32AP7000

/*
 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
 * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
 * PLL frequency.
 * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
 */
#define CONFIG_PLL
#define CONFIG_SYS_POWER_MANAGER
#define CONFIG_SYS_OSC0_HZ		20000000
#define CONFIG_SYS_PLL0_DIV		1
#define CONFIG_SYS_PLL0_MUL		7
#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES	16
/*
 * Set the CPU running at:
 * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
 */
#define CONFIG_SYS_CLKDIV_CPU		0
/*
 * Set the HSB running at:
 * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
 */
#define CONFIG_SYS_CLKDIV_HSB		1
/*
 * Set the PBA running at:
 * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
 */
#define CONFIG_SYS_CLKDIV_PBA		2
/*
 * Set the PBB running at:
 * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
 */
#define CONFIG_SYS_CLKDIV_PBB		1

/* Reserve VM regions for SDRAM and NOR flash */
#define CONFIG_SYS_NR_VM_REGIONS	2

/*
 * The PLLOPT register controls the PLL like this:
 *   icp = PLLOPT<2>
 *   ivco = PLLOPT<1:0>
 *
 * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
 */
#define CONFIG_SYS_PLL0_OPT		0x04

#define CONFIG_USART_BASE		ATMEL_BASE_USART1
#define CONFIG_USART_ID			1

/* User serviceable stuff */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

#define CONFIG_STACKSIZE		(2048)

#define CONFIG_BAUDRATE			115200

/*
 * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
 * data on the serial line may interrupt the boot sequence.
 */
#define CONFIG_BOOTDELAY		1
#define CONFIG_AUTOBOOT
#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT		"Press SPACE to abort autoboot in %d" \
					" seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR	"d"
#define CONFIG_AUTOBOOT_STOP_STR	" "

/*
 * After booting the board for the first time, new ethernet addresses
 * should be generated and assigned to the environment variables
 * "ethaddr". This is normally done during production.
 */
#define CONFIG_OVERWRITE_ETHADDR_ONCE

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

/* remove unneeded commands */
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR

/* add useful commands */
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO

#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING

#define CONFIG_ATMEL_USART
#define CONFIG_MACB
#define CONFIG_PORTMUX_PIO
#define CONFIG_SYS_NR_PIOS		5
#define CONFIG_SYS_HSDRAMC

#define CONFIG_SYS_DCACHE_LINESZ	32
#define CONFIG_SYS_ICACHE_LINESZ	32

#define CONFIG_NR_DRAM_BANKS		1

#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER

#define CONFIG_SYS_FLASH_BASE		0x00000000
#define CONFIG_SYS_FLASH_SIZE		0x800000
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_MAX_FLASH_SECT	135

#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_TEXT_BASE		0x00000000

#define CONFIG_SYS_INTRAM_BASE		INTERNAL_SRAM_BASE
#define CONFIG_SYS_INTRAM_SIZE		INTERNAL_SRAM_SIZE
#define CONFIG_SYS_SDRAM_BASE		EBI_SDRAM_BASE

#define CONFIG_ENV_IS_IN_FLASH
/* place u-boot env in flash sector after u-boot */
#define CONFIG_ENV_SIZE			0x10000
#define CONFIG_ENV_ADDR			0x20000

#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INTRAM_BASE + \
					 CONFIG_SYS_INTRAM_SIZE)

#define CONFIG_SYS_MALLOC_LEN		(256*1024)
#define CONFIG_SYS_DMA_ALLOC_LEN	(16384)

/* Allow 4MB for the kernel run-time image */
#define CONFIG_SYS_LOAD_ADDR		(EBI_SDRAM_BASE + 0x00400000)
#define CONFIG_SYS_BOOTPARAMS_LEN	(16 * 1024)

/* Other configuration settings that shouldn't have to change all that often */
#define CONFIG_SYS_PROMPT		"U-Boot> "
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					 sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP

#define CONFIG_SYS_MEMTEST_START	EBI_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x700000)

#endif /* __GRASSHOPPER_CONFIG_H */
/* vim: set ts=8 noet: */
Commit	Line	Data
ad7a1785 AB	1	/*
	2	* Copyright (C) 2011
	3	* Corscience GmbH & Co.KG, Andreas Bießmann <[email protected]>
	4	*
	5	* Configuration settings for the grasshopper (ICnova AP7000) board
	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
ad7a1785 AB	8	*/
	9	#ifndef __GRASSHOPPER_CONFIG_H
	10	#define __GRASSHOPPER_CONFIG_H
	11
	12	#include <asm/arch/hardware.h>
	13
ad7a1785 AB	14	#define CONFIG_AT32AP
	15	#define CONFIG_AT32AP7000
	16
ad7a1785 AB	17	/*
	18	* Set up the PLL to run at 140 MHz, the CPU to run at the PLL
	19	* frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
	20	* PLL frequency.
	21	* (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
	22	*/
	23	#define CONFIG_PLL
	24	#define CONFIG_SYS_POWER_MANAGER
	25	#define CONFIG_SYS_OSC0_HZ 20000000
	26	#define CONFIG_SYS_PLL0_DIV 1
	27	#define CONFIG_SYS_PLL0_MUL 7
	28	#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
	29	/*
	30	* Set the CPU running at:
	31	* PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
	32	*/
	33	#define CONFIG_SYS_CLKDIV_CPU 0
	34	/*
	35	* Set the HSB running at:
	36	* PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
	37	*/
	38	#define CONFIG_SYS_CLKDIV_HSB 1
	39	/*
	40	* Set the PBA running at:
	41	* PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
	42	*/
	43	#define CONFIG_SYS_CLKDIV_PBA 2
	44	/*
	45	* Set the PBB running at:
	46	* PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
	47	*/
	48	#define CONFIG_SYS_CLKDIV_PBB 1
	49
	50	/* Reserve VM regions for SDRAM and NOR flash */
	51	#define CONFIG_SYS_NR_VM_REGIONS 2
	52
	53	/*
	54	* The PLLOPT register controls the PLL like this:
	55	* icp = PLLOPT<2>
	56	* ivco = PLLOPT<1:0>
	57	*
	58	* We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
	59	*/
	60	#define CONFIG_SYS_PLL0_OPT 0x04
	61
	62	#define CONFIG_USART_BASE ATMEL_BASE_USART1
	63	#define CONFIG_USART_ID 1
	64
	65	/* User serviceable stuff */
	66	#define CONFIG_CMDLINE_TAG
	67	#define CONFIG_SETUP_MEMORY_TAGS
	68	#define CONFIG_INITRD_TAG
	69
	70	#define CONFIG_STACKSIZE (2048)
	71
	72	#define CONFIG_BAUDRATE 115200
	73
	74	/*
	75	* Only interrupt autoboot if <space> is pressed. Otherwise, garbage
	76	* data on the serial line may interrupt the boot sequence.
	77	*/
	78	#define CONFIG_BOOTDELAY 1
	79	#define CONFIG_AUTOBOOT
	80	#define CONFIG_AUTOBOOT_KEYED
81	#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d" \
82	" seconds\n", bootdelay
83	#define CONFIG_AUTOBOOT_DELAY_STR "d"
84	#define CONFIG_AUTOBOOT_STOP_STR " "
85
86	/*
87	* After booting the board for the first time, new ethernet addresses
88	* should be generated and assigned to the environment variables
89	* "ethaddr". This is normally done during production.
90	*/
91	#define CONFIG_OVERWRITE_ETHADDR_ONCE
ad7a1785 AB	92
	93	/*
	94	* BOOTP options
	95	*/
	96	#define CONFIG_BOOTP_SUBNETMASK
	97	#define CONFIG_BOOTP_GATEWAY
	98
	99	/*
	100	* Command line configuration.
	101	*/
	102	#include <config_cmd_default.h>
	103
	104	/* remove unneeded commands */
	105	#undef CONFIG_CMD_FPGA
	106	#undef CONFIG_CMD_SETGETDCR
	107
	108	/* add useful commands */
	109	#define CONFIG_CMD_ASKENV
	110	#define CONFIG_CMD_DHCP
	111	#define CONFIG_CMD_JFFS2
	112	#define CONFIG_CMD_PING
	113	#define CONFIG_CMD_REGINFO
	114
	115	#define CONFIG_SYS_HUSH_PARSER
	116	#define CONFIG_AUTO_COMPLETE
ad7a1785 AB	117	#define CONFIG_CMDLINE_EDITING
	118
	119	#define CONFIG_ATMEL_USART
	120	#define CONFIG_MACB
	121	#define CONFIG_PORTMUX_PIO
	122	#define CONFIG_SYS_NR_PIOS 5
	123	#define CONFIG_SYS_HSDRAMC
	124
	125	#define CONFIG_SYS_DCACHE_LINESZ 32
	126	#define CONFIG_SYS_ICACHE_LINESZ 32
	127
	128	#define CONFIG_NR_DRAM_BANKS 1
	129
	130	#define CONFIG_SYS_FLASH_CFI
	131	#define CONFIG_FLASH_CFI_DRIVER
	132
	133	#define CONFIG_SYS_FLASH_BASE 0x00000000
	134	#define CONFIG_SYS_FLASH_SIZE 0x800000
	135	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	136	#define CONFIG_SYS_MAX_FLASH_SECT 135
	137
	138	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	139	#define CONFIG_SYS_TEXT_BASE 0x00000000
	140
	141	#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
	142	#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
	143	#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
	144
	145	#define CONFIG_ENV_IS_IN_FLASH
	146	/* place u-boot env in flash sector after u-boot */
	147	#define CONFIG_ENV_SIZE 0x10000
	148	#define CONFIG_ENV_ADDR 0x20000
	149
	150	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + \
	151	CONFIG_SYS_INTRAM_SIZE)
	152
	153	#define CONFIG_SYS_MALLOC_LEN (256*1024)
	154	#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
	155
	156	/* Allow 4MB for the kernel run-time image */
	157	#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
	158	#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
	159
	160	/* Other configuration settings that shouldn't have to change all that often */
	161	#define CONFIG_SYS_PROMPT "U-Boot> "
	162	#define CONFIG_SYS_CBSIZE 256
	163	#define CONFIG_SYS_MAXARGS 16
	164	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	165	sizeof(CONFIG_SYS_PROMPT) + 16)
	166	#define CONFIG_SYS_LONGHELP
	167
	168	#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
	169	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000)
ad7a1785 AB	170
	171	#endif /* __GRASSHOPPER_CONFIG_H */
	172	/* vim: set ts=8 noet: */