[J-u-boot.git] / doc / README.PXA_CF


These are brief instructions on how to add support for CF adapters to
custom designed  PXA boards. You need to set the parameters in the
config file. This should work for most implementations especially if you
follow the connections of the standard lubbock. Anyway just the block
marked memory configuration should be touched since the other parameters
are imposed by the PXA architecture.

#define CONFIG_PXA_PCMCIA 1
#define CONFIG_PXA_IDE 1

#define CONFIG_PCMCIA_SLOT_A 1
/* just to keep build system happy  */

#define CFG_PCMCIA_MEM_ADDR     0x28000000
#define CFG_PCMCIA_MEM_SIZE     0x10000000

#define CFG_MECR_VAL		0x00000000
#define CFG_MCMEM0_VAL		0x00004204
#define CFG_MCMEM1_VAL		0x00000000
#define CFG_MCATT0_VAL		0x00010504
#define CFG_MCATT1_VAL		0x00000000
#define CFG_MCIO0_VAL		0x00008407
#define CFG_MCIO1_VAL		0x00000000
/* memory configuration */

#define CFG_IDE_MAXBUS		1
/* max. 1 IDE bus		*/
#define CFG_IDE_MAXDEVICE	1
/* max. 1 drive per IDE bus	*/

#define CFG_ATA_IDE0_OFFSET	0x0000

#define CFG_ATA_BASE_ADDR	0x20000000

/* Offset for data I/O			*/
#define CFG_ATA_DATA_OFFSET	0x1f0

/* Offset for normal register accesses	*/
#define CFG_ATA_REG_OFFSET	0x1f0

/* Offset for alternate registers	*/
#define CFG_ATA_ALT_OFFSET	0x3f0


Another important point is that maybe you have to power the pcmcia
subsystem. This is very board specific, for an example on how to
do it please search for CONFIG_EXADRON1 in cmd_pcmcia.c
Commit	Line	Data
db01a2ea	1
ea66bc88 WD	2	These are brief instructions on how to add support for CF adapters to
ea66bc88 WD	3	custom designed PXA boards. You need to set the parameters in the
db01a2ea WD	4	config file. This should work for most implementations especially if you
db01a2ea WD	5	follow the connections of the standard lubbock. Anyway just the block
ea66bc88	6	marked memory configuration should be touched since the other parameters
db01a2ea WD	7	are imposed by the PXA architecture.
	8
	9	#define CONFIG_PXA_PCMCIA 1
	10	#define CONFIG_PXA_IDE 1
	11
ea66bc88	12	#define CONFIG_PCMCIA_SLOT_A 1
db01a2ea WD	13	/* just to keep build system happy */
	14
	15	#define CFG_PCMCIA_MEM_ADDR 0x28000000
	16	#define CFG_PCMCIA_MEM_SIZE 0x10000000
	17
	18	#define CFG_MECR_VAL 0x00000000
	19	#define CFG_MCMEM0_VAL 0x00004204
	20	#define CFG_MCMEM1_VAL 0x00000000
	21	#define CFG_MCATT0_VAL 0x00010504
	22	#define CFG_MCATT1_VAL 0x00000000
	23	#define CFG_MCIO0_VAL 0x00008407
	24	#define CFG_MCIO1_VAL 0x00000000
	25	/* memory configuration */
	26
ea66bc88	27	#define CFG_IDE_MAXBUS 1
db01a2ea	28	/* max. 1 IDE bus */
ea66bc88	29	#define CFG_IDE_MAXDEVICE 1
db01a2ea WD	30	/* max. 1 drive per IDE bus */
	31
	32	#define CFG_ATA_IDE0_OFFSET 0x0000
	33
	34	#define CFG_ATA_BASE_ADDR 0x20000000
	35
	36	/* Offset for data I/O */
	37	#define CFG_ATA_DATA_OFFSET 0x1f0
	38
	39	/* Offset for normal register accesses */
	40	#define CFG_ATA_REG_OFFSET 0x1f0
	41
	42	/* Offset for alternate registers */
	43	#define CFG_ATA_ALT_OFFSET 0x3f0
db01a2ea	44
ea66bc88 WD	45
ea66bc88 WD	46	Another important point is that maybe you have to power the pcmcia
db01a2ea WD	47	subsystem. This is very board specific, for an example on how to
db01a2ea WD	48	do it please search for CONFIG_EXADRON1 in cmd_pcmcia.c