]> Git Repo - J-u-boot.git/blame - configs/socfpga_sr1500_defconfig
input: Move input.o to be built only in some cases
[J-u-boot.git] / configs / socfpga_sr1500_defconfig
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ae9996c8
SR
1CONFIG_ARM=y
2CONFIG_ARCH_SOCFPGA=y
ae9996c8 3CONFIG_TARGET_SOCFPGA_SR1500=y
344a0e43 4CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
665c35a7 5CONFIG_SPL_TEXT_BASE=0xFFFF0000
fa2c1467 6CONFIG_DISTRO_DEFAULTS=y
c2ae7d82 7CONFIG_FIT=y
fa2c1467 8# CONFIG_USE_BOOTCOMMAND is not set
ef26d603 9CONFIG_SYS_CONSOLE_IS_IN_ENV=y
84f2a5d0 10CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
3505bc55 11CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
f3f3efff 12CONFIG_SYS_CONSOLE_INFO_QUIET=y
2681e78a 13CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb"
c2ae7d82 14CONFIG_VERSION_VARIABLE=y
84351792 15# CONFIG_DISPLAY_BOARDINFO is not set
78eba69d 16CONFIG_DISPLAY_BOARDINFO_LATE=y
a5d67547 17CONFIG_BOARD_EARLY_INIT_F=y
55500438 18CONFIG_SPL_SPI_LOAD=y
1ee774d2 19CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
89cb2b5f
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20CONFIG_CMD_ASKENV=y
21CONFIG_CMD_GREPENV=y
78d1e1d0 22CONFIG_CMD_MEMTEST=y
ae9996c8 23# CONFIG_CMD_FLASH is not set
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24CONFIG_CMD_GPIO=y
25CONFIG_CMD_I2C=y
89cb2b5f 26CONFIG_CMD_MMC=y
78d1e1d0 27CONFIG_CMD_SPI=y
89cb2b5f 28CONFIG_CMD_CACHE=y
78d1e1d0 29CONFIG_CMD_TIME=y
89cb2b5f 30CONFIG_CMD_EXT4_WRITE=y
43ede0bc
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31CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
32CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0"
8f2fe0c8 33CONFIG_CMD_UBI=y
37dc72f5
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34# CONFIG_ISO_PARTITION is not set
35# CONFIG_EFI_PARTITION is not set
8c5cad05 36CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
5dc4dfd2 37CONFIG_ENV_IS_IN_SPI_FLASH=y
cb6617a7 38CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
4edb9458 39CONFIG_SPL_DM_SEQ_ALIAS=y
d1ec9461 40CONFIG_BOOTCOUNT_LIMIT=y
aca5cd27 41CONFIG_DM_GPIO=y
ae9996c8 42CONFIG_DWAPB_GPIO=y
2878942a 43CONFIG_DM_I2C=y
4d5e9b39 44CONFIG_SYS_I2C_DW=y
4edb9458 45CONFIG_DM_MMC=y
55ed3b46 46CONFIG_MMC_DW=y
9c5b0097 47CONFIG_MTD_DEVICE=y
14453fbf 48CONFIG_SF_DEFAULT_SPEED=100000000
93d9fc26 49CONFIG_SPI_FLASH_STMICRO=y
4edb9458 50# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
832ce202 51CONFIG_SPI_FLASH_MTD=y
a8ca5c8a 52CONFIG_PHY_MARVELL=y
ae9996c8 53CONFIG_DM_ETH=y
1989374b 54CONFIG_PHY_GIGE=y
ae9996c8 55CONFIG_ETH_DESIGNWARE=y
d7869b21 56CONFIG_MII=y
a8c2dcf0 57CONFIG_DM_RESET=y
f1b1f770 58CONFIG_SPI=y
93d9fc26 59CONFIG_CADENCE_QSPI=y
e263607a 60# CONFIG_SPL_WDT is not set
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