]>
Commit | Line | Data |
---|---|---|
bcfc7118 FE |
1 | /* |
2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * Configuration settings for the Freescale i.MX6Q SabreSD board. | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
bcfc7118 FE |
7 | */ |
8 | ||
9 | #ifndef __MX6QSABRE_COMMON_CONFIG_H | |
10 | #define __MX6QSABRE_COMMON_CONFIG_H | |
11 | ||
8f393776 SW |
12 | #include "mx6_common.h" |
13 | ||
6c920ee9 YL |
14 | #define CONFIG_IMX6_THERMAL |
15 | ||
bcfc7118 | 16 | /* Size of malloc() pool */ |
58cc9787 | 17 | #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) |
bcfc7118 FE |
18 | |
19 | #define CONFIG_BOARD_EARLY_INIT_F | |
85449dbd | 20 | #define CONFIG_BOARD_LATE_INIT |
bcfc7118 FE |
21 | |
22 | #define CONFIG_MXC_UART | |
23 | ||
5dc64ab7 | 24 | #define CONFIG_CMD_FUSE |
6c920ee9 | 25 | #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL) |
5dc64ab7 FE |
26 | #define CONFIG_MXC_OCOTP |
27 | #endif | |
28 | ||
bcfc7118 FE |
29 | /* MMC Configs */ |
30 | #define CONFIG_FSL_ESDHC | |
31 | #define CONFIG_FSL_USDHC | |
32 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
bcfc7118 FE |
33 | |
34 | #define CONFIG_MMC | |
35 | #define CONFIG_CMD_MMC | |
36 | #define CONFIG_GENERIC_MMC | |
640fb607 | 37 | #define CONFIG_BOUNCE_BUFFER |
bcfc7118 | 38 | #define CONFIG_CMD_EXT2 |
b5cd10b9 FE |
39 | #define CONFIG_CMD_EXT4 |
40 | #define CONFIG_CMD_EXT4_WRITE | |
bcfc7118 FE |
41 | #define CONFIG_CMD_FAT |
42 | #define CONFIG_DOS_PARTITION | |
43 | ||
44 | #define CONFIG_CMD_PING | |
45 | #define CONFIG_CMD_DHCP | |
46 | #define CONFIG_CMD_MII | |
47 | #define CONFIG_CMD_NET | |
48 | #define CONFIG_FEC_MXC | |
49 | #define CONFIG_MII | |
50 | #define IMX_FEC_BASE ENET_BASE_ADDR | |
51 | #define CONFIG_FEC_XCV_TYPE RGMII | |
52 | #define CONFIG_ETHPRIME "FEC" | |
53 | #define CONFIG_FEC_MXC_PHYADDR 1 | |
54 | ||
55 | #define CONFIG_PHYLIB | |
56 | #define CONFIG_PHY_ATHEROS | |
57 | ||
8bfa9c69 FE |
58 | #define CONFIG_CMD_SF |
59 | #ifdef CONFIG_CMD_SF | |
60 | #define CONFIG_SPI_FLASH | |
61 | #define CONFIG_SPI_FLASH_STMICRO | |
62 | #define CONFIG_MXC_SPI | |
63 | #define CONFIG_SF_DEFAULT_BUS 0 | |
155fa9af | 64 | #define CONFIG_SF_DEFAULT_CS 0 |
8bfa9c69 FE |
65 | #define CONFIG_SF_DEFAULT_SPEED 20000000 |
66 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 | |
67 | #endif | |
68 | ||
bcfc7118 FE |
69 | /* allow to overwrite serial and ethaddr */ |
70 | #define CONFIG_ENV_OVERWRITE | |
71 | #define CONFIG_CONS_INDEX 1 | |
72 | #define CONFIG_BAUDRATE 115200 | |
73 | ||
74 | /* Command definition */ | |
85449dbd | 75 | #define CONFIG_CMD_BMODE |
ea215cdf | 76 | #define CONFIG_CMD_BOOTZ |
810d6df0 | 77 | #define CONFIG_CMD_SETEXPR |
bcfc7118 | 78 | |
072f26b1 | 79 | #define CONFIG_BOOTDELAY 1 |
bcfc7118 | 80 | |
2f994fe6 | 81 | #define CONFIG_LOADADDR 0x12000000 |
bcfc7118 FE |
82 | #define CONFIG_SYS_TEXT_BASE 0x17800000 |
83 | ||
03ce3302 OS |
84 | #ifdef CONFIG_SUPPORT_EMMC_BOOT |
85 | #define EMMC_ENV \ | |
86 | "emmcdev=2\0" \ | |
87 | "update_emmc_firmware=" \ | |
88 | "if test ${ip_dyn} = yes; then " \ | |
89 | "setenv get_cmd dhcp; " \ | |
90 | "else " \ | |
91 | "setenv get_cmd tftp; " \ | |
92 | "fi; " \ | |
93 | "if ${get_cmd} ${update_sd_firmware_filename}; then " \ | |
4bf83961 | 94 | "if mmc dev ${emmcdev} 1; then " \ |
03ce3302 OS |
95 | "setexpr fw_sz ${filesize} / 0x200; " \ |
96 | "setexpr fw_sz ${fw_sz} + 1; " \ | |
97 | "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ | |
03ce3302 OS |
98 | "fi; " \ |
99 | "fi\0" | |
100 | #else | |
101 | #define EMMC_ENV "" | |
102 | #endif | |
103 | ||
bcfc7118 FE |
104 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
105 | "script=boot.scr\0" \ | |
f2e4288a | 106 | "image=zImage\0" \ |
bf0c2245 | 107 | "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ |
6584a1b5 | 108 | "fdt_addr=0x18000000\0" \ |
bf0c2245 OS |
109 | "boot_fdt=try\0" \ |
110 | "ip_dyn=yes\0" \ | |
51535d9f | 111 | "console=" CONFIG_CONSOLE_DEV "\0" \ |
bcfc7118 FE |
112 | "fdt_high=0xffffffff\0" \ |
113 | "initrd_high=0xffffffff\0" \ | |
acbb4457 | 114 | "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ |
7fb72c79 | 115 | "mmcpart=1\0" \ |
903e779c | 116 | "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ |
810d6df0 OS |
117 | "update_sd_firmware=" \ |
118 | "if test ${ip_dyn} = yes; then " \ | |
119 | "setenv get_cmd dhcp; " \ | |
120 | "else " \ | |
121 | "setenv get_cmd tftp; " \ | |
122 | "fi; " \ | |
123 | "if mmc dev ${mmcdev}; then " \ | |
124 | "if ${get_cmd} ${update_sd_firmware_filename}; then " \ | |
125 | "setexpr fw_sz ${filesize} / 0x200; " \ | |
126 | "setexpr fw_sz ${fw_sz} + 1; " \ | |
127 | "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ | |
128 | "fi; " \ | |
129 | "fi\0" \ | |
03ce3302 | 130 | EMMC_ENV \ |
bcfc7118 FE |
131 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ |
132 | "root=${mmcroot}\0" \ | |
133 | "loadbootscript=" \ | |
134 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
135 | "bootscript=echo Running bootscript from mmc ...; " \ | |
136 | "source\0" \ | |
f2e4288a | 137 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
bf0c2245 OS |
138 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
139 | "mmcboot=echo Booting from mmc ...; " \ | |
bcfc7118 | 140 | "run mmcargs; " \ |
bf0c2245 OS |
141 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
142 | "if run loadfdt; then " \ | |
f2e4288a | 143 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
bf0c2245 OS |
144 | "else " \ |
145 | "if test ${boot_fdt} = try; then " \ | |
f2e4288a | 146 | "bootz; " \ |
bf0c2245 OS |
147 | "else " \ |
148 | "echo WARN: Cannot load the DT; " \ | |
149 | "fi; " \ | |
150 | "fi; " \ | |
151 | "else " \ | |
f2e4288a | 152 | "bootz; " \ |
bf0c2245 | 153 | "fi;\0" \ |
bcfc7118 FE |
154 | "netargs=setenv bootargs console=${console},${baudrate} " \ |
155 | "root=/dev/nfs " \ | |
156 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ | |
157 | "netboot=echo Booting from net ...; " \ | |
158 | "run netargs; " \ | |
bf0c2245 OS |
159 | "if test ${ip_dyn} = yes; then " \ |
160 | "setenv get_cmd dhcp; " \ | |
161 | "else " \ | |
162 | "setenv get_cmd tftp; " \ | |
163 | "fi; " \ | |
f2e4288a | 164 | "${get_cmd} ${image}; " \ |
bf0c2245 OS |
165 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
166 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | |
f2e4288a | 167 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
bf0c2245 OS |
168 | "else " \ |
169 | "if test ${boot_fdt} = try; then " \ | |
f2e4288a | 170 | "bootz; " \ |
bf0c2245 OS |
171 | "else " \ |
172 | "echo WARN: Cannot load the DT; " \ | |
173 | "fi; " \ | |
174 | "fi; " \ | |
175 | "else " \ | |
f2e4288a | 176 | "bootz; " \ |
bf0c2245 | 177 | "fi;\0" |
bcfc7118 FE |
178 | |
179 | #define CONFIG_BOOTCOMMAND \ | |
180 | "mmc dev ${mmcdev};" \ | |
66300ac2 | 181 | "if mmc rescan; then " \ |
bcfc7118 FE |
182 | "if run loadbootscript; then " \ |
183 | "run bootscript; " \ | |
184 | "else " \ | |
f2e4288a | 185 | "if run loadimage; then " \ |
bcfc7118 FE |
186 | "run mmcboot; " \ |
187 | "else run netboot; " \ | |
188 | "fi; " \ | |
189 | "fi; " \ | |
190 | "else run netboot; fi" | |
191 | ||
192 | #define CONFIG_ARP_TIMEOUT 200UL | |
193 | ||
194 | /* Miscellaneous configurable options */ | |
195 | #define CONFIG_SYS_LONGHELP | |
196 | #define CONFIG_SYS_HUSH_PARSER | |
197 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
bcfc7118 FE |
198 | #define CONFIG_AUTO_COMPLETE |
199 | #define CONFIG_SYS_CBSIZE 256 | |
bcfc7118 FE |
200 | #define CONFIG_SYS_MAXARGS 16 |
201 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
202 | ||
203 | #define CONFIG_SYS_MEMTEST_START 0x10000000 | |
204 | #define CONFIG_SYS_MEMTEST_END 0x10010000 | |
bec0160e | 205 | #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 |
bcfc7118 FE |
206 | |
207 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
bcfc7118 FE |
208 | |
209 | #define CONFIG_CMDLINE_EDITING | |
210 | #define CONFIG_STACKSIZE (128 * 1024) | |
211 | ||
212 | /* Physical Memory Map */ | |
213 | #define CONFIG_NR_DRAM_BANKS 1 | |
214 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
215 | ||
216 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
217 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
218 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
219 | ||
220 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
221 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
222 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
223 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
224 | ||
056845c2 | 225 | /* Environment organization */ |
bcfc7118 FE |
226 | #define CONFIG_ENV_SIZE (8 * 1024) |
227 | ||
228 | #define CONFIG_ENV_IS_IN_MMC | |
229 | ||
230 | #if defined(CONFIG_ENV_IS_IN_MMC) | |
610efbe0 | 231 | #define CONFIG_ENV_OFFSET (8 * 64 * 1024) |
bcfc7118 FE |
232 | #endif |
233 | ||
234 | #define CONFIG_OF_LIBFDT | |
235 | ||
bcfc7118 FE |
236 | #ifndef CONFIG_SYS_DCACHE_OFF |
237 | #define CONFIG_CMD_CACHE | |
238 | #endif | |
239 | ||
04451ba3 FE |
240 | /* Framebuffer */ |
241 | #define CONFIG_VIDEO | |
242 | #define CONFIG_VIDEO_IPUV3 | |
243 | #define CONFIG_CFB_CONSOLE | |
244 | #define CONFIG_VGA_AS_SINGLE_DEVICE | |
245 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
246 | #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE | |
247 | #define CONFIG_VIDEO_BMP_RLE8 | |
248 | #define CONFIG_SPLASH_SCREEN | |
249 | #define CONFIG_SPLASH_SCREEN_ALIGN | |
250 | #define CONFIG_BMP_16BPP | |
251 | #define CONFIG_VIDEO_LOGO | |
252 | #define CONFIG_VIDEO_BMP_LOGO | |
253 | #define CONFIG_IPUV3_CLK 260000000 | |
254 | #define CONFIG_IMX_HDMI | |
255 | #define CONFIG_IMX_VIDEO_SKIP | |
256 | ||
d5eb6dcf | 257 | #ifndef CONFIG_SPL |
ad8aae82 FE |
258 | #define CONFIG_CI_UDC |
259 | #define CONFIG_USBD_HS | |
260 | #define CONFIG_USB_GADGET_DUALSPEED | |
261 | ||
262 | #define CONFIG_USB_GADGET | |
263 | #define CONFIG_CMD_USB_MASS_STORAGE | |
264 | #define CONFIG_USB_GADGET_MASS_STORAGE | |
265 | #define CONFIG_USBDOWNLOAD_GADGET | |
266 | #define CONFIG_USB_GADGET_VBUS_DRAW 2 | |
267 | ||
268 | #define CONFIG_G_DNL_VENDOR_NUM 0x0525 | |
269 | #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 | |
270 | #define CONFIG_G_DNL_MANUFACTURER "FSL" | |
d5eb6dcf | 271 | #endif |
ad8aae82 | 272 | |
bcfc7118 | 273 | #endif /* __MX6QSABRE_COMMON_CONFIG_H */ |