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Commit | Line | Data |
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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
8bde7f77 WD |
2 | /* |
3 | * (C) Copyright 2003 | |
4 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
8bde7f77 WD |
5 | */ |
6 | ||
7 | /* | |
8 | * Boot support | |
9 | */ | |
10 | #include <common.h> | |
11 | #include <command.h> | |
7b51b576 | 12 | #include <env.h> |
90526e9f | 13 | #include <net.h> |
2189d5f1 | 14 | #include <vsprintf.h> |
90526e9f | 15 | #include <asm/cache.h> |
d88af4da | 16 | #include <linux/compiler.h> |
8bde7f77 | 17 | |
d87080b7 | 18 | DECLARE_GLOBAL_DATA_PTR; |
8bde7f77 | 19 | |
8d99d543 SG |
20 | __maybe_unused void print_cpu_word_size(void) |
21 | { | |
22 | printf("%-12s= %u-bit\n", "Build", (uint)sizeof(void *) * 8); | |
23 | } | |
24 | ||
d88af4da MF |
25 | __maybe_unused |
26 | static void print_num(const char *name, ulong value) | |
27 | { | |
95187bb7 | 28 | printf("%-12s= 0x%0*lx\n", name, 2 * (int)sizeof(value), value); |
d88af4da | 29 | } |
8bde7f77 | 30 | |
5f3dfadc | 31 | __maybe_unused |
d88af4da MF |
32 | static void print_eth(int idx) |
33 | { | |
34 | char name[10], *val; | |
35 | if (idx) | |
36 | sprintf(name, "eth%iaddr", idx); | |
37 | else | |
38 | strcpy(name, "ethaddr"); | |
00caae6d | 39 | val = env_get(name); |
d88af4da MF |
40 | if (!val) |
41 | val = "(not set)"; | |
42 | printf("%-12s= %s\n", name, val); | |
43 | } | |
de2dff6f | 44 | |
05c3e68f | 45 | #ifndef CONFIG_DM_ETH |
9fc6a06a MS |
46 | __maybe_unused |
47 | static void print_eths(void) | |
48 | { | |
49 | struct eth_device *dev; | |
50 | int i = 0; | |
51 | ||
52 | do { | |
53 | dev = eth_get_dev_by_index(i); | |
54 | if (dev) { | |
55 | printf("eth%dname = %s\n", i, dev->name); | |
56 | print_eth(i); | |
57 | i++; | |
58 | } | |
59 | } while (dev); | |
60 | ||
61 | printf("current eth = %s\n", eth_get_name()); | |
00caae6d | 62 | printf("ip_addr = %s\n", env_get("ipaddr")); |
9fc6a06a | 63 | } |
05c3e68f | 64 | #endif |
9fc6a06a | 65 | |
d88af4da | 66 | __maybe_unused |
47708457 | 67 | static void print_lnum(const char *name, unsigned long long value) |
d88af4da MF |
68 | { |
69 | printf("%-12s= 0x%.8llX\n", name, value); | |
70 | } | |
71 | ||
72 | __maybe_unused | |
73 | static void print_mhz(const char *name, unsigned long hz) | |
74 | { | |
75 | char buf[32]; | |
76 | ||
77 | printf("%-12s= %6s MHz\n", name, strmhz(buf, hz)); | |
78 | } | |
8bde7f77 | 79 | |
171e5396 MF |
80 | |
81 | static inline void print_bi_boot_params(const bd_t *bd) | |
82 | { | |
83 | print_num("boot_params", (ulong)bd->bi_boot_params); | |
84 | } | |
85 | ||
12feb364 MF |
86 | static inline void print_bi_mem(const bd_t *bd) |
87 | { | |
88 | #if defined(CONFIG_SH) | |
89 | print_num("mem start ", (ulong)bd->bi_memstart); | |
90 | print_lnum("mem size ", (u64)bd->bi_memsize); | |
91 | #elif defined(CONFIG_ARC) | |
92 | print_num("mem start", (ulong)bd->bi_memstart); | |
93 | print_lnum("mem size", (u64)bd->bi_memsize); | |
12feb364 MF |
94 | #else |
95 | print_num("memstart", (ulong)bd->bi_memstart); | |
96 | print_lnum("memsize", (u64)bd->bi_memsize); | |
97 | #endif | |
98 | } | |
99 | ||
fd60e99f MF |
100 | static inline void print_bi_dram(const bd_t *bd) |
101 | { | |
102 | #ifdef CONFIG_NR_DRAM_BANKS | |
103 | int i; | |
104 | ||
105 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { | |
ddd917b8 SG |
106 | if (bd->bi_dram[i].size) { |
107 | print_num("DRAM bank", i); | |
108 | print_num("-> start", bd->bi_dram[i].start); | |
109 | print_num("-> size", bd->bi_dram[i].size); | |
110 | } | |
fd60e99f MF |
111 | } |
112 | #endif | |
113 | } | |
114 | ||
f80e5359 MF |
115 | static inline void print_bi_flash(const bd_t *bd) |
116 | { | |
117 | #if defined(CONFIG_MICROBLAZE) || defined(CONFIG_SH) | |
118 | print_num("flash start ", (ulong)bd->bi_flashstart); | |
119 | print_num("flash size ", (ulong)bd->bi_flashsize); | |
120 | print_num("flash offset ", (ulong)bd->bi_flashoffset); | |
121 | ||
70cc0c34 | 122 | #elif defined(CONFIG_NIOS2) |
f80e5359 MF |
123 | print_num("flash start", (ulong)bd->bi_flashstart); |
124 | print_num("flash size", (ulong)bd->bi_flashsize); | |
125 | print_num("flash offset", (ulong)bd->bi_flashoffset); | |
126 | #else | |
127 | print_num("flashstart", (ulong)bd->bi_flashstart); | |
128 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
129 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
130 | #endif | |
131 | } | |
132 | ||
8752e260 MF |
133 | static inline void print_eth_ip_addr(void) |
134 | { | |
135 | #if defined(CONFIG_CMD_NET) | |
136 | print_eth(0); | |
137 | #if defined(CONFIG_HAS_ETH1) | |
138 | print_eth(1); | |
139 | #endif | |
140 | #if defined(CONFIG_HAS_ETH2) | |
141 | print_eth(2); | |
142 | #endif | |
143 | #if defined(CONFIG_HAS_ETH3) | |
144 | print_eth(3); | |
145 | #endif | |
146 | #if defined(CONFIG_HAS_ETH4) | |
147 | print_eth(4); | |
148 | #endif | |
149 | #if defined(CONFIG_HAS_ETH5) | |
150 | print_eth(5); | |
151 | #endif | |
00caae6d | 152 | printf("IP addr = %s\n", env_get("ipaddr")); |
8752e260 MF |
153 | #endif |
154 | } | |
155 | ||
4e3fa7d8 MF |
156 | static inline void print_baudrate(void) |
157 | { | |
158 | #if defined(CONFIG_PPC) | |
159 | printf("baudrate = %6u bps\n", gd->baudrate); | |
4e3fa7d8 MF |
160 | #else |
161 | printf("baudrate = %u bps\n", gd->baudrate); | |
162 | #endif | |
163 | } | |
164 | ||
b37483c4 | 165 | static inline void __maybe_unused print_std_bdinfo(const bd_t *bd) |
e3795084 MF |
166 | { |
167 | print_bi_boot_params(bd); | |
168 | print_bi_mem(bd); | |
169 | print_bi_flash(bd); | |
170 | print_eth_ip_addr(); | |
171 | print_baudrate(); | |
172 | } | |
173 | ||
c99ea790 | 174 | #if defined(CONFIG_PPC) |
8d99d543 | 175 | |
2e0fa217 | 176 | #define USE_GENERIC |
8bde7f77 | 177 | |
c99ea790 | 178 | #elif defined(CONFIG_NIOS2) |
5c952cf0 | 179 | |
08c56d19 | 180 | #define USE_GENERIC |
c99ea790 RM |
181 | |
182 | #elif defined(CONFIG_MICROBLAZE) | |
cfc67116 | 183 | |
271db508 | 184 | #define USE_GENERIC |
4a551709 | 185 | |
c99ea790 RM |
186 | #elif defined(CONFIG_M68K) |
187 | ||
09140113 | 188 | int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) |
8e585f02 | 189 | { |
8e585f02 | 190 | bd_t *bd = gd->bd; |
8ae158cd | 191 | |
12feb364 | 192 | print_bi_mem(bd); |
f80e5359 | 193 | print_bi_flash(bd); |
6d0f6bcf | 194 | #if defined(CONFIG_SYS_INIT_RAM_ADDR) |
5902e8f7 ML |
195 | print_num("sramstart", (ulong)bd->bi_sramstart); |
196 | print_num("sramsize", (ulong)bd->bi_sramsize); | |
8e585f02 | 197 | #endif |
6d0f6bcf | 198 | #if defined(CONFIG_SYS_MBAR) |
5902e8f7 | 199 | print_num("mbar", bd->bi_mbar_base); |
8e585f02 | 200 | #endif |
0c277ef9 TT |
201 | print_mhz("cpufreq", bd->bi_intfreq); |
202 | print_mhz("busfreq", bd->bi_busfreq); | |
8ae158cd | 203 | #ifdef CONFIG_PCI |
0c277ef9 | 204 | print_mhz("pcifreq", bd->bi_pcifreq); |
8ae158cd TL |
205 | #endif |
206 | #ifdef CONFIG_EXTRA_CLOCK | |
0c277ef9 TT |
207 | print_mhz("flbfreq", bd->bi_flbfreq); |
208 | print_mhz("inpfreq", bd->bi_inpfreq); | |
209 | print_mhz("vcofreq", bd->bi_vcofreq); | |
8ae158cd | 210 | #endif |
8752e260 | 211 | print_eth_ip_addr(); |
4e3fa7d8 | 212 | print_baudrate(); |
8d99d543 | 213 | print_cpu_word_size(); |
8e585f02 TL |
214 | |
215 | return 0; | |
216 | } | |
217 | ||
c99ea790 | 218 | #elif defined(CONFIG_MIPS) |
8bde7f77 | 219 | |
df529b5a | 220 | #define USE_GENERIC |
8bde7f77 | 221 | |
c99ea790 | 222 | #elif defined(CONFIG_ARM) |
8bde7f77 | 223 | |
09140113 SG |
224 | static int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, |
225 | char *const argv[]) | |
8bde7f77 | 226 | { |
8bde7f77 WD |
227 | bd_t *bd = gd->bd; |
228 | ||
5902e8f7 | 229 | print_num("arch_number", bd->bi_arch_number); |
171e5396 | 230 | print_bi_boot_params(bd); |
fd60e99f | 231 | print_bi_dram(bd); |
8bde7f77 | 232 | |
e8149522 | 233 | #ifdef CONFIG_SYS_MEM_RESERVE_SECURE |
e61a7534 | 234 | if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) { |
e8149522 | 235 | print_num("Secure ram", |
e61a7534 | 236 | gd->arch.secure_ram & MEM_RESERVE_SECURE_ADDR_MASK); |
e8149522 YS |
237 | } |
238 | #endif | |
f2ccf7f7 YS |
239 | #ifdef CONFIG_RESV_RAM |
240 | if (gd->arch.resv_ram) | |
241 | print_num("Reserved ram", gd->arch.resv_ram); | |
242 | #endif | |
ff973800 | 243 | #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH) |
9fc6a06a | 244 | print_eths(); |
a41dbbd9 | 245 | #endif |
4e3fa7d8 | 246 | print_baudrate(); |
10015025 | 247 | #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) |
34fd5d25 | 248 | print_num("TLB addr", gd->arch.tlb_addr); |
f1d2b313 | 249 | #endif |
5902e8f7 ML |
250 | print_num("relocaddr", gd->relocaddr); |
251 | print_num("reloc off", gd->reloc_off); | |
252 | print_num("irq_sp", gd->irq_sp); /* irq stack pointer */ | |
253 | print_num("sp start ", gd->start_addr_sp); | |
5a760f61 | 254 | #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) || defined(CONFIG_DM_VIDEO) |
5902e8f7 | 255 | print_num("FB base ", gd->fb_base); |
c8fcd0f2 | 256 | #endif |
8f5d4687 HM |
257 | /* |
258 | * TODO: Currently only support for davinci SOC's is added. | |
259 | * Remove this check once all the board implement this. | |
260 | */ | |
261 | #ifdef CONFIG_CLOCKS | |
262 | printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq); | |
263 | printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq); | |
264 | printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq); | |
7bb7d672 HS |
265 | #endif |
266 | #ifdef CONFIG_BOARD_TYPES | |
267 | printf("Board Type = %ld\n", gd->board_type); | |
8f5d4687 | 268 | #endif |
f1896c45 | 269 | #if CONFIG_VAL(SYS_MALLOC_F_LEN) |
7f7ddf2a | 270 | printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr, |
f1896c45 | 271 | CONFIG_VAL(SYS_MALLOC_F_LEN)); |
8ad0c664 HS |
272 | #endif |
273 | #if CONFIG_IS_ENABLED(MULTI_DTB_FIT) | |
274 | print_num("multi_dtb_fit", (ulong)gd->multi_dtb_fit); | |
7f7ddf2a | 275 | #endif |
53539533 | 276 | if (gd->fdt_blob) |
95187bb7 | 277 | print_num("fdt_blob", (ulong)gd->fdt_blob); |
8d99d543 | 278 | print_cpu_word_size(); |
7f7ddf2a | 279 | |
8bde7f77 WD |
280 | return 0; |
281 | } | |
282 | ||
ebd0d062 NI |
283 | #elif defined(CONFIG_SH) |
284 | ||
f41b830f | 285 | #define USE_GENERIC |
ebd0d062 | 286 | |
a806ee6f GR |
287 | #elif defined(CONFIG_X86) |
288 | ||
41ec71d1 | 289 | #define USE_GENERIC |
a806ee6f | 290 | |
6fcc3be4 SG |
291 | #elif defined(CONFIG_SANDBOX) |
292 | ||
c66981cc | 293 | #define USE_GENERIC |
6fcc3be4 | 294 | |
64d61461 ML |
295 | #elif defined(CONFIG_NDS32) |
296 | ||
aa6b898f | 297 | #define USE_GENERIC |
64d61461 | 298 | |
068feb9b RC |
299 | #elif defined(CONFIG_RISCV) |
300 | ||
628c85ae | 301 | #define USE_GENERIC |
068feb9b | 302 | |
946f6f24 | 303 | #elif defined(CONFIG_ARC) |
bc5d5428 | 304 | |
09140113 | 305 | int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) |
bc5d5428 AB |
306 | { |
307 | bd_t *bd = gd->bd; | |
308 | ||
12feb364 | 309 | print_bi_mem(bd); |
8752e260 | 310 | print_eth_ip_addr(); |
4e3fa7d8 | 311 | print_baudrate(); |
8d99d543 | 312 | print_cpu_word_size(); |
bc5d5428 AB |
313 | |
314 | return 0; | |
315 | } | |
316 | ||
de5e5cea CZ |
317 | #elif defined(CONFIG_XTENSA) |
318 | ||
1af9756d SG |
319 | #define USE_GENERIC |
320 | ||
321 | #else | |
322 | #error "a case for this architecture does not exist!" | |
323 | #endif | |
324 | ||
325 | /* Temporary check for archs that use generic bdinfo. Eventually all will */ | |
326 | #ifdef USE_GENERIC | |
2e0fa217 SG |
327 | void __weak board_detail(void) |
328 | { | |
329 | /* Please define board_detail() for your PPC platform */ | |
330 | } | |
331 | ||
09140113 | 332 | int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) |
de5e5cea | 333 | { |
2e0fa217 SG |
334 | bd_t *bd = gd->bd; |
335 | ||
336 | #ifdef DEBUG | |
337 | print_num("bd address", (ulong)bd); | |
338 | #endif | |
339 | print_bi_dram(bd); | |
340 | print_std_bdinfo(bd); | |
df529b5a SG |
341 | print_num("relocaddr", gd->relocaddr); |
342 | print_num("reloc off", gd->reloc_off); | |
343 | print_cpu_word_size(); | |
271db508 SG |
344 | #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH) |
345 | print_eths(); | |
346 | #endif | |
347 | print_num("fdt_blob", (ulong)gd->fdt_blob); | |
348 | print_num("new_fdt", (ulong)gd->new_fdt); | |
349 | print_num("fdt_size", (ulong)gd->fdt_size); | |
1af9756d | 350 | |
2e0fa217 SG |
351 | /* This section is used only by ppc */ |
352 | #if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) | |
353 | print_num("immr_base", bd->bi_immr_base); | |
354 | #endif | |
355 | if (IS_ENABLED(CONFIG_PPC)) { | |
356 | print_num("bootflags", bd->bi_bootflags); | |
357 | print_mhz("intfreq", bd->bi_intfreq); | |
358 | #ifdef CONFIG_ENABLE_36BIT_PHYS | |
359 | if (IS_ENABLED(CONFIG_PHYS_64BIT)) | |
360 | puts("addressing = 36-bit\n"); | |
361 | else | |
362 | puts("addressing = 32-bit\n"); | |
363 | #endif | |
364 | print_mhz("busfreq", bd->bi_busfreq); | |
365 | board_detail(); | |
366 | } | |
367 | #if defined(CONFIG_CPM2) | |
368 | print_mhz("cpmfreq", bd->bi_cpmfreq); | |
369 | print_mhz("vco", bd->bi_vco); | |
370 | print_mhz("sccfreq", bd->bi_sccfreq); | |
371 | print_mhz("brgfreq", bd->bi_brgfreq); | |
372 | #endif | |
373 | ||
374 | #if defined(CONFIG_SYS_INIT_RAM_ADDR) | |
375 | print_num("sramstart", (ulong)bd->bi_sramstart); | |
376 | print_num("sramsize", (ulong)bd->bi_sramsize); | |
377 | #endif | |
378 | ||
de5e5cea CZ |
379 | return 0; |
380 | } | |
c99ea790 | 381 | #endif |
8bde7f77 | 382 | |
8bde7f77 WD |
383 | /* -------------------------------------------------------------------- */ |
384 | ||
0d498393 WD |
385 | U_BOOT_CMD( |
386 | bdinfo, 1, 1, do_bdinfo, | |
2fb2604d | 387 | "print Board Info structure", |
a89c33db | 388 | "" |
8bde7f77 | 389 | ); |